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author | Alan Modra <amodra@gmail.com> | 2015-01-20 17:19:15 +1030 |
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committer | Alan Modra <amodra@gmail.com> | 2015-01-20 19:52:42 +1030 |
commit | 23283c1be02de06666e4d934b1fc499c0d72f9c2 (patch) | |
tree | cd6bc9ab21af319ff36832b68394d152bd3e1946 /ld/testsuite/ld-powerpc/elfv2so.d | |
parent | 3e2b0f3116a46c8a9a6ffbcb5ae4847b6601467a (diff) | |
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Reorder more powerpc64 sections for -z relro
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
Diffstat (limited to 'ld/testsuite/ld-powerpc/elfv2so.d')
-rw-r--r-- | ld/testsuite/ld-powerpc/elfv2so.d | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d index 963dbb6..28cfdb0 100644 --- a/ld/testsuite/ld-powerpc/elfv2so.d +++ b/ld/testsuite/ld-powerpc/elfv2so.d @@ -7,33 +7,33 @@ Disassembly of section \.text: -0+300 <.*\.plt_call\.f4>: +0+320 <.*\.plt_call\.f4>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (38 80 82 e9|e9 82 80 38) ld r12,-32712\(r2\) .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 .*: (20 04 80 4e|4e 80 04 20) bctr -0+310 <.*\.plt_call\.f3>: +0+330 <.*\.plt_call\.f3>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\) .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 .*: (20 04 80 4e|4e 80 04 20) bctr -0+320 <.*\.plt_call\.f2>: +0+340 <.*\.plt_call\.f2>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\) .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 .*: (20 04 80 4e|4e 80 04 20) bctr -0+330 <.*\.plt_call\.f1>: +0+350 <.*\.plt_call\.f1>: .*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) .*: (40 80 82 e9|e9 82 80 40) ld r12,-32704\(r2\) .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 .*: (20 04 80 4e|4e 80 04 20) bctr -0+340 <f1>: +0+360 <f1>: .*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2 -.*: (e0 81 42 38|38 42 81 e0) addi r2,r2,-32288 +.*: (d8 81 42 38|38 42 81 d8) addi r2,r2,-32296 .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 .*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\) .*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\) @@ -50,10 +50,10 @@ Disassembly of section \.text: .*: (20 00 21 38|38 21 00 20) addi r1,r1,32 .*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 .*: (20 00 80 4e|4e 80 00 20) blr -.*: (a0 01 01 00|00 00 00 00) .* -.*: (00 00 00 00|00 01 01 a0) .* +.*: (98 01 01 00|00 00 00 00) .* +.*: (00 00 00 00|00 01 01 98) .* -0+390 <__glink_PLTresolve>: +0+3b0 <__glink_PLTresolve>: .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 .*: (05 00 9f 42|42 9f 00 05) bcl .* .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 |