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author | Maciej W. Rozycki <macro@imgtec.com> | 2017-02-01 22:09:33 +0000 |
---|---|---|
committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-02-01 22:17:33 +0000 |
commit | c0c237fcdd133e84e67657cc6b7e4678f106bdcb (patch) | |
tree | 4475adef702ab50113acf6ef36a013f0e8c154bc /ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d | |
parent | 5139cfdb5515407900d0c3934c13712a5819456c (diff) | |
download | gdb-c0c237fcdd133e84e67657cc6b7e4678f106bdcb.zip gdb-c0c237fcdd133e84e67657cc6b7e4678f106bdcb.tar.gz gdb-c0c237fcdd133e84e67657cc6b7e4678f106bdcb.tar.bz2 |
MIPS/LD/testsuite: Correct relocation addends in VxWorks tests
Fix commit 171191bac50e ("Add support for STT_IFUNC"),
<https://sourceware.org/ml/binutils/2008-12/msg00052.html>, commit
e04d7088afe0 ("PR ld/14088: Always display addend as signed hex
number"), <https://sourceware.org/ml/binutils/2012-05/msg00123.html> and
commit 343dbc36ffae ("Print addend as signed in objdump"),
<https://sourceware.org/ml/binutils/2012-05/msg00163.html> regressions:
FAIL: VxWorks executable test 1 (dynamic)
FAIL: ld-mips-elf/vxworks-forced-local-1
seen with `mips-vxworks' and `mipsel-vxworks' targets and adjust dump
patterns according to changes made to the presentation of relocation
addends in `readelf -r' and `objdump -r' output.
ld/
* testsuite/ld-mips-elf/vxworks-forced-local-1.d: Correct the
presentation of relocation addends.
* testsuite/ld-mips-elf/vxworks1-lib.rd: Likewise.
* testsuite/ld-mips-elf/vxworks1.dd: Likewise.
* testsuite/ld-mips-elf/vxworks1.rd: Likewise.
Diffstat (limited to 'ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d')
-rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d index dc02a3b..766987f 100644 --- a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d +++ b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d @@ -5,8 +5,8 @@ Relocation section '\.rela\.dyn' .* .* -0008140c 00000002 R_MIPS_32 *00080810 -00081410 00000002 R_MIPS_32 *00080814 -00081414 00000002 R_MIPS_32 *00080818 +0008140c 00000002 R_MIPS_32 *80810 +00081410 00000002 R_MIPS_32 *80814 +00081414 00000002 R_MIPS_32 *80818 00081418 00000302 R_MIPS_32 *00000000 *bar \+ 0 #pass |