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authorNelson Chu <nelson.chu@sifive.com>2021-01-08 04:04:13 -0800
committerNelson Chu <nelson.chu@sifive.com>2021-01-19 09:40:18 +0800
commit85e963f185884ffec4ed9577da9b9fbd028b62ee (patch)
treecda0d545109641321b3e9b348db0afb4ddefe5ee /ld/testsuite/ld-elf
parentf0c1efa53d78b335dfc0f86166121f051ecc3d02 (diff)
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ld: Just xfail riscv little endian targets for compressed1d.d test.
The sizes of compressed and uncompressed .debug_aranges are the same for the riscv big endian targets, but different for the little endian targets. The compress rule is fine and isn't broken by riscv, just the original compressed1d.d fails by accident. Ideally, we should fill the R_RISCV_ADD/SUB relocations when disabling relaxations in the assembler. But before that, Jim already had written an alternative test compressed1d-alt to relpace compressed1d.d for riscv, so we can only xfail the riscv little endian targets in the short-term. ld/ * testsuite/ld-elf/elf.exp (riscv_little_endian): Added. Return true if target is riscv little endian. Otherwise, return false. * testsuite/ld-elf/compressed1d.d: Only xfail the riscv little endian targets by [riscv_little_endian].
Diffstat (limited to 'ld/testsuite/ld-elf')
-rw-r--r--ld/testsuite/ld-elf/compressed1d.d5
-rw-r--r--ld/testsuite/ld-elf/elf.exp13
2 files changed, 16 insertions, 2 deletions
diff --git a/ld/testsuite/ld-elf/compressed1d.d b/ld/testsuite/ld-elf/compressed1d.d
index df7ce34..9d891c1 100644
--- a/ld/testsuite/ld-elf/compressed1d.d
+++ b/ld/testsuite/ld-elf/compressed1d.d
@@ -3,10 +3,11 @@
#ld: -r --compress-debug-sections=zlib-gnu
#readelf: -SW
#xfail: [uses_genelf]
-#xfail: riscv*-*-*
+#xfail: [riscv_little_endian]
# Not all ELF targets use the elf.em emulation...
# RISC-V has linker relaxations that delete code, so text label subtractions
-# do not get resolved at assembly time, which results in a compressed section.
+# do not get resolved at assembly time, which results in a compressed section
+# for little endian targets; but it is uncompressed for big endian targets.
#failif
#...
diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp
index 7179cec..e98bffc 100644
--- a/ld/testsuite/ld-elf/elf.exp
+++ b/ld/testsuite/ld-elf/elf.exp
@@ -25,6 +25,19 @@ if ![is_elf_format] {
return
}
+# Return true if target is riscv little endian.
+# xfail the riscv little endain targets for the compressed1d1 test;
+# The riscv big endian targets and others should pass.
+proc riscv_little_endian { } {
+ if { [istarget "riscv32-*-*"]
+ || [istarget "riscv64-*-*"]
+ || [istarget "riscv32le-*-*"]
+ || [istarget "riscv64le-*-*"] } {
+ return 1
+ }
+ return 0
+}
+
set old_ldflags $LDFLAGS
if { [istarget spu*-*-*] } {
set LDFLAGS "$LDFLAGS --local-store 0:0"