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author | Nick Clifton <nickc@redhat.com> | 2013-07-31 16:26:02 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2013-07-31 16:26:02 +0000 |
commit | 31a91d61f9ea4504812349166ef6ad5308270927 (patch) | |
tree | aad0e1f44dea516ba6e3fdf1a6f99a02f217449a /ld/testsuite/ld-arm/group-relocs.d | |
parent | 16f92dd4d4a4e637f7910c32cd6fd4b0ff78149a (diff) | |
download | gdb-31a91d61f9ea4504812349166ef6ad5308270927.zip gdb-31a91d61f9ea4504812349166ef6ad5308270927.tar.gz gdb-31a91d61f9ea4504812349166ef6ad5308270927.tar.bz2 |
PR ld/15787
* elf32-arm.c (elf32_arm_final_link_relocate): Base SB on the
output section VMA.
* ld-arm/group-relocs-alu-bad-2.d; New.
* ld-arm/group-relocs-alu-bad-2.s: New.
* ld-arm/group-relocs-ldc-bad-2.d: New.
* ld-arm/group-relocs-ldc-bad-2.s: New.
* ld-arm/group-relocs-ldr-bad-2.d: New.
* ld-arm/group-relocs-ldr-bad-2.s: New.
* ld-arm/group-relocs-ldrs-bad-2.d: New.
* ld-arm/group-relocs-ldrs-bad-2: New.
* ld-arm/arm-elf.exp: Add the new tests.
* ld-arm/group-relocs-ldr-bad.d: Update expected output.
* ld-arm/group-relocs-ldr-bad.s: Likewise.
* ld-arm/group-relocs-ldrs-bad.d: Likewise.
* ld-arm/group-relocs-ldrs-bad.s: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/group-relocs.s: Likewise.
Diffstat (limited to 'ld/testsuite/ld-arm/group-relocs.d')
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs.d | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/ld/testsuite/ld-arm/group-relocs.d b/ld/testsuite/ld-arm/group-relocs.d index 7d6f102..d928261 100644 --- a/ld/testsuite/ld-arm/group-relocs.d +++ b/ld/testsuite/ld-arm/group-relocs.d @@ -10,42 +10,42 @@ Disassembly of section .text: 800c: e28f08ff add r0, pc, #16711680 ; 0xff0000 8010: e2800c6e add r0, r0, #28160 ; 0x6e00 8014: e28000e4 add r0, r0, #228 ; 0xe4 - 8018: e2800000 add r0, r0, #0 - 801c: e28f0cee add r0, pc, #60928 ; 0xee00 + 8018: e280000c add r0, r0, #12 + 801c: e2800cee add r0, r0, #60928 ; 0xee00 8020: e28000f0 add r0, r0, #240 ; 0xf0 8024: e28008ff add r0, r0, #16711680 ; 0xff0000 8028: e2800cee add r0, r0, #60928 ; 0xee00 802c: e28000f0 add r0, r0, #240 ; 0xf0 - 8030: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8030: e28f0c6e add r0, pc, #28160 ; 0x6e00 8034: e59010c0 ldr r1, \[r0, #192\].* - 8038: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8038: e28f08ff add r0, pc, #16711680 ; 0xff0000 803c: e2800c6e add r0, r0, #28160 ; 0x6e00 8040: e59010b8 ldr r1, \[r0, #184\].* - 8044: e5901000 ldr r1, \[r0\] + 8044: e590100c ldr r1, \[r0, #12\] 8048: e2800cee add r0, r0, #60928 ; 0xee00 804c: e59010f0 ldr r1, \[r0, #240\].* 8050: e28008ff add r0, r0, #16711680 ; 0xff0000 8054: e2800cee add r0, r0, #60928 ; 0xee00 8058: e59010f0 ldr r1, \[r0, #240\].* - 805c: e1c026d0 ldrd r2, \[r0, #96\].* - 8060: e2800c6e add r0, r0, #28160 ; 0x6e00 + 805c: e1cf26d0 ldrd r2, \[pc, #96\].* + 8060: e28f0c6e add r0, pc, #28160 ; 0x6e00 8064: e1c029d0 ldrd r2, \[r0, #144\].* - 8068: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8068: e28f08ff add r0, pc, #16711680 ; 0xff0000 806c: e2800c6e add r0, r0, #28160 ; 0x6e00 8070: e1c028d8 ldrd r2, \[r0, #136\].* - 8074: e1c020d0 ldrd r2, \[r0\] + 8074: e1c020dc ldrd r2, \[r0, #12\] 8078: e2800cee add r0, r0, #60928 ; 0xee00 807c: e1c02fd0 ldrd r2, \[r0, #240\].* 8080: e28008ff add r0, r0, #16711680 ; 0xff0000 8084: e2800cee add r0, r0, #60928 ; 0xee00 8088: e1c02fd0 ldrd r2, \[r0, #240\].* - 808c: ed90000c ldc 0, cr0, \[r0, #48\].* - 8090: e2800c6e add r0, r0, #28160 ; 0x6e00 + 808c: ed9f000c ldc 0, cr0, \[pc, #48\].* + 8090: e28f0c6e add r0, pc, #28160 ; 0x6e00 8094: ed900018 ldc 0, cr0, \[r0, #96\].* - 8098: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8098: e28f08ff add r0, pc, #16711680 ; 0xff0000 809c: e2800c6e add r0, r0, #28160 ; 0x6e00 80a0: ed900016 ldc 0, cr0, \[r0, #88\].* - 80a4: ed900000 ldc 0, cr0, \[r0\] + 80a4: ed900003 ldc 0, cr0, \[r0, #12\] 80a8: e2800cee add r0, r0, #60928 ; 0xee00 80ac: ed90003c ldc 0, cr0, \[r0, #240\].* 80b0: e28008ff add r0, r0, #16711680 ; 0xff0000 @@ -54,14 +54,12 @@ Disassembly of section .text: 000080bc <one_group_needed_alu_pc>: 80bc: e3a00000 mov r0, #0 -Disassembly of section zero: -00000000 <one_group_needed_alu_sb>: - 0: e3a00000 mov r0, #0 Disassembly of section alpha: 0000eef0 <two_groups_needed_alu_pc>: eef0: e3a00000 mov r0, #0 + Disassembly of section beta: 00ffeef0 <three_groups_needed_alu_pc>: |