opcodes/arm: use '@' consistently for the comment character

Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.

I then spotted a couple of places where there was no ';', but instead,
just a '@' character.  I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.

Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator.  Thus this:

    nop    ;@ comment

is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.

This:

    nop    @ comment

is a single 'nop' instruction followed by a comment.  And finally,
this:

    nop    ; comment

is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.

Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.

The question then is how should the disassembler style the three cases
above?

As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment.  But what about ';' in
the second example?  Style as text?  Style as a comment?

And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic?  Style as text?  Style as a comment?

I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.

Then, in the next commit, it's obvious what to do.

There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.

1 files changed, 18 insertions, 18 deletions

diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d
index 1b15879..6e2fbc9 100644
--- a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d
+++ b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d
@@ -6,8 +6,8 @@ start address 0x.*
 Disassembly of section .plt:
 
 .* <.plt>:
- .*:	e52de004 	push	{lr}		; \(str lr, \[sp, #-4\]!\)
- .*:	e59fe004 	ldr	lr, \[pc, #4\]	; .* <.*>
+ .*:	e52de004 	push	{lr}		@ \(str lr, \[sp, #-4\]!\)
+ .*:	e59fe004 	ldr	lr, \[pc, #4\]	@ .* <.*>
  .*:	e08fe00e 	add	lr, pc, lr
  .*:	e5bef008 	ldr	pc, \[lr, #8\]!
  .*:	.* 	.word	.*
@@ -15,26 +15,26 @@ Disassembly of section .plt:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
  .*:	e28fc6.* 	add	ip, pc, #.*
- .*:	e28cca.* 	add	ip, ip, #.*	; 0x.*
- .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	; .*
+ .*:	e28cca.* 	add	ip, ip, #.*	@ 0x.*
+ .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	@ .*
 .* <app_func_weak@plt>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
  .*:	e28fc6.* 	add	ip, pc, #.*
- .*:	e28cca.* 	add	ip, ip, #.*	; 0x.*
- .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	; 0x.*
+ .*:	e28cca.* 	add	ip, ip, #.*	@ 0x.*
+ .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	@ 0x.*
 .* <lib_func3@plt>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
  .*:	e28fc6.* 	add	ip, pc, #.*
- .*:	e28cca.* 	add	ip, ip, #.*	; 0x.*
- .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	; 0x.*
+ .*:	e28cca.* 	add	ip, ip, #.*	@ 0x.*
+ .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	@ 0x.*
 .* <lib_func4@plt>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
  .*:	e28fc6.* 	add	ip, pc, #.*
- .*:	e28cca.* 	add	ip, ip, #.*	; 0x.*
- .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	; 0x.*
+ .*:	e28cca.* 	add	ip, ip, #.*	@ 0x.*
+ .*:	e5bcf.* 	ldr	pc, \[ip, #.*\]!	@ 0x.*
 
 Disassembly of section .text:
 
@@ -60,28 +60,28 @@ Disassembly of section .text:
 .* <__app_func_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__app_func_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__app_func_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff.. 	.word	0xfeffff..
 
 .* <__lib_func4_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__lib_func4_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__lib_func4_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff.. 	.word	0xfeffff..
 
 .* <__app_func_weak_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__app_func_weak_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__app_func_weak_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff.. 	.word	0xfeffff..
 
 .* <__lib_func3_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__lib_func3_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__lib_func3_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	feffff.. 	.word	0xfeffff..
 	...
@@ -95,25 +95,25 @@ Disassembly of section .text:
 .* <__app_func_weak_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__app_func_weak_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__app_func_weak_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	fdffff34 	.word	0xfdffff34
 
 .* <__app_func_from_thumb>:
  .*:	4778      	bx	pc
  .*:	e7fd      	b.n	.+ <.+>
- .*:	e59fc000 	ldr	ip, \[pc\]	; .* <__app_func_from_thumb\+0xc>
+ .*:	e59fc000 	ldr	ip, \[pc\]	@ .* <__app_func_from_thumb\+0xc>
  .*:	e08cf00f 	add	pc, ip, pc
  .*:	fdffff14 	.word	0xfdffff14
 
 .* <lib_func3>:
- .*:	e59fc004 	ldr	ip, \[pc, #4\]	; .* <lib_func3\+0xc>
+ .*:	e59fc004 	ldr	ip, \[pc, #4\]	@ .* <lib_func3\+0xc>
  .*:	e08cc00f 	add	ip, ip, pc
  .*:	e12fff1c 	bx	ip
  .*:	ffffffc5 	.word	0xffffffc5
 
 .* <lib_func2>:
- .*:	e59fc004 	ldr	ip, \[pc, #4\]	; .* <lib_func2\+0xc>
+ .*:	e59fc004 	ldr	ip, \[pc, #4\]	@ .* <lib_func2\+0xc>
  .*:	e08cc00f 	add	ip, ip, pc
  .*:	e12fff1c 	bx	ip
  .*:	feffff55 	.word	0xfeffff55