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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-08 10:06:26 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-08 10:06:38 +0000 |
| commit | 2c9d089c901afe818f4daa841ced44b87c517d82 (patch) | |
| tree | e27d8ec7783e9d8feac433ebda912d05a51c50ff /ld/testsuite/ld-arm/armv4-bx.d | |
| parent | 39d45a7031659fcc9f169fa90d6eb2e4cb88167b (diff) | |
| download | gdb-2c9d089c901afe818f4daa841ced44b87c517d82.zip gdb-2c9d089c901afe818f4daa841ced44b87c517d82.tar.gz gdb-2c9d089c901afe818f4daa841ced44b87c517d82.tar.bz2 | |
arm, objdump: Make objdump use bfd's machine detection to drive disassembly
For any arm elf target, disable an old piece of code that forced disassembly to
disassemble for 'unknown architecture' which once upon a time meant it would
disassemble ANY arm instruction. This is no longer true with the addition of
Armv8.1-M Mainline, as there are conflicting encodings for different thumb
instructions.
BFD however can detect what architecture the object file was assembled for
using information in the notes section. So if available, we use that,
otherwise we default to the old 'unknown' behaviour.
With the changes above code, a mode changing 'bx lr' assembled for armv4 with
the option --fix-v4bx will result in an object file that is recognized by bfd
as one for the armv4 architecture. The disassembler now disassembles this
encoding as a BX even for Armv4 architectures, but warns the user when
disassembling for Armv4 that this instruction is only valid from Armv4T
onwards.
Remove the unused and wrongfully defined ARM_ARCH_V8A_CRC, and
define and use a ARM_ARCH_V8R_CRC to make sure instructions enabled by
-march=armv8-r+crc are disassembled correctly.
Patch up some of the tests cases, see a brief explanation for each below.
inst.d:
This test checks the assembly & disassembly of basic instructions in armv3m. I
changed the expected behaviour for teqp, cmnp cmpp and testp instructions to
properly print p when disassembling, whereas before, in the 'unknown' case it
would disassemble these as UNPREDICTABLE as they were changed in later
architectures.
nops.d:
Was missing an -march, added one to make sure we were testing the right
behavior of NOP<c> instructions.
unpredictable.d:
Was missing an -march, added armv6 as that reproduced the behaviour being
tested.
Diffstat (limited to 'ld/testsuite/ld-arm/armv4-bx.d')
| -rw-r--r-- | ld/testsuite/ld-arm/armv4-bx.d | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ld/testsuite/ld-arm/armv4-bx.d b/ld/testsuite/ld-arm/armv4-bx.d index be2a4da..5ff0f82 100644 --- a/ld/testsuite/ld-arm/armv4-bx.d +++ b/ld/testsuite/ld-arm/armv4-bx.d @@ -11,9 +11,9 @@ Disassembly of section \.text: 0000800c <__bx_r14>: 800c: e31e0001 tst lr, #1 8010: 01a0f00e moveq pc, lr - 8014: e12fff1e bx lr + 8014: e12fff1e bx lr @ from Armv4T onwards 00008018 <__bx_r0>: 8018: e3100001 tst r0, #1 801c: 01a0f000 moveq pc, r0 - 8020: e12fff10 bx r0 + 8020: e12fff10 bx r0 @ from Armv4T onwards |