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authorJin Ma <jinma@linux.alibaba.com>2023-11-18 15:07:39 +0800
committerNelson Chu <nelson@rivosinc.com>2023-11-23 09:32:03 +0800
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parent9a51da2636778dce2e2635cb10822a92a51b2b9e (diff)
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RISC-V: Add floating-point arithmetic instructions for T-Head VECTOR vendor extension
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds floating-point arithmetic instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for floating-point arithmetic instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VFSQRTV): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
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