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authorH.J. Lu <hjl.tools@gmail.com>2016-06-12 07:28:58 -0700
committerH.J. Lu <hjl.tools@gmail.com>2016-06-12 07:28:58 -0700
commit6d84fed1a0e39acec9283e7aabfa6c9bbce9fa5d (patch)
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Update x86-64 no-PLT tests for x32
X32 has different output formats for readelf and objdump as well as a different conversion of load symbol address via GOT. * testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32. * testsuite/ld-x86-64/libno-plt-1b.rd: Likewise. * testsuite/ld-x86-64/no-plt-1a.dd: Likewise. * testsuite/ld-x86-64/no-plt-1a.rd: Likewise. * testsuite/ld-x86-64/no-plt-1b.dd: Likewise. * testsuite/ld-x86-64/no-plt-1b.rd: Likewise. * testsuite/ld-x86-64/no-plt-1c.dd: Likewise. * testsuite/ld-x86-64/no-plt-1c.rd: Likewise. * testsuite/ld-x86-64/no-plt-1d.dd: Likewise. * testsuite/ld-x86-64/no-plt-1e.dd: Likewise. * testsuite/ld-x86-64/no-plt-1e.rd: Likewise. * testsuite/ld-x86-64/no-plt-1f.dd: Likewise. * testsuite/ld-x86-64/no-plt-1f.rd: Likewise. * testsuite/ld-x86-64/no-plt-1g.dd: Likewise. * testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
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+2016-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
+ * testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
+ * testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
+
2016-06-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/20244