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authorCatherine Moore <clm@redhat.com>2008-11-18 15:45:05 +0000
committerCatherine Moore <clm@redhat.com>2008-11-18 15:45:05 +0000
commit8e79c3df515af53e2f21aed2d8ad7226af33f447 (patch)
treed2d0bcdd9e2019944eaf2edf8b5090f3368bc041 /include/opcode
parentdc80fd5cfc9fbf3a658a90c67edd321e7a40bf0b (diff)
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Add support for ARM half-precision conversion instructions.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/arm.h3
2 files changed, 8 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 33719b5..b64a8b6 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2008-11-18 Catherine Moore <clm@codesourcery.com>
+
+ * arm.h (FPU_NEON_FP16): New.
+ (FPU_ARCH_NEON_FP16): New.
+
2008-11-06 Chao-ying Fu <fu@mips.com>
* mips.h: Doucument '1' for 5-bit sync type.
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 11cab3e..a639a8b 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -65,6 +65,7 @@
#define FPU_VFP_EXT_V3 0x01000000 /* VFPv3 insns. */
#define FPU_NEON_EXT_V1 0x00800000 /* Neon (SIMD) insns. */
#define FPU_VFP_EXT_D32 0x00400000 /* Registers D16-D31. */
+#define FPU_NEON_FP16 0x00200000 /* Half-precision extensions. */
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
@@ -139,6 +140,8 @@
#define FPU_ARCH_NEON_V1 ARM_FEATURE (0, FPU_NEON_EXT_V1)
#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
+#define FPU_ARCH_NEON_FP16 \
+ ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_NEON_FP16)
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)