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authorH.J. Lu <hjl.tools@gmail.com>2006-06-12 18:55:44 +0000
committerH.J. Lu <hjl.tools@gmail.com>2006-06-12 18:55:44 +0000
commit46e883c5a969e151f282e0bf555cbd27bf10b66e (patch)
tree414a85d371f1eab1fbb2f9229bdb6123c1c72b74 /include/opcode
parent4e9d3b813b857193778390d2a0f56000215bbab0 (diff)
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gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Don't add rex64 for "xchg %rax,%rax". gas/testsuite/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/opcode.s: Add "xchg %ax,%ax". * gas/i386/opcode.d: Updated. * gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax, xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8. * gas/i386/x86-64-opcode.d: Updated. include/opcode/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Update comment for 64bit NOP. opcodes/ 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (NOP_Fixup): Removed. (NOP_Fixup1): New. (NOP_Fixup2): Likewise. (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/i386.h10
2 files changed, 5 insertions, 9 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index ab1793e..edc00fa 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386.h (i386_optab): Update comment for 64bit NOP.
+
2006-06-06 Ben Elliston <bje@au.ibm.com>
Anton Blanchard <anton@samba.org>
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 2b2c1e0..c46c86d 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -179,19 +179,11 @@ static const template i386_optab[] =
/* Exchange instructions.
xchg commutes: we allow both operand orders.
- In the 64bit code, xchg eax, eax is reused for new nop instruction. */
-#if 0 /* While the two entries that are disabled generate shorter code
- for xchg eax, reg (on x86_64), the special case xchg eax, eax
- does not get handled correctly - it degenerates into nop, but
- that way the side effect of zero-extending eax to rax is lost. */
-{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { WordReg, Acc, 0 } },
-{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { Acc, WordReg, 0 } },
-#else
+ In the 64bit code, xchg rax, rax is reused for new nop instruction. */
{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { WordReg, Acc, 0 } },
{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { Acc, WordReg, 0 } },
{"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Reg16|Reg64, Acc, 0 } },
{"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Acc, Reg16|Reg64, 0 } },
-#endif
{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } },
{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } },