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| author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:54:07 +0100 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:39:29 +0100 |
| commit | 3fd229a447cd28a70bfd921f617bc6c3553b8fdd (patch) | |
| tree | 2cd068813b2afc460cb15b8cc774eaa187374939 /include/opcode | |
| parent | 2ac435d46608be7ef90f80aaf9ff48443aea571e (diff) | |
| download | gdb-3fd229a447cd28a70bfd921f617bc6c3553b8fdd.zip gdb-3fd229a447cd28a70bfd921f617bc6c3553b8fdd.tar.gz gdb-3fd229a447cd28a70bfd921f617bc6c3553b8fdd.tar.bz2 | |
[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/dc-data-cache-operation-an-alias-of-sys)
This patch adds the DC CVADP instruction. Since this has a separate
identification mechanism a new feature bit is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs_dc): New entry for cvadp.
(aarch64_sys_ins_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/sysreg-4.s: Test instruction.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/aarch64.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 7b542c9..7656a57 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -72,6 +72,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_SB 0x10000000000ULL /* Execution and Data Prediction Restriction instructions. */ #define AARCH64_FEATURE_PREDRES 0x20000000000ULL +/* DC CVADP. */ +#define AARCH64_FEATURE_CVADP 0x40000000000ULL /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -100,7 +102,8 @@ typedef uint32_t aarch64_insn; | AARCH64_FEATURE_FLAGMANIP \ | AARCH64_FEATURE_FRINTTS \ | AARCH64_FEATURE_SB \ - | AARCH64_FEATURE_PREDRES) + | AARCH64_FEATURE_PREDRES \ + | AARCH64_FEATURE_CVADP) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) |