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authorJin Ma <jinma@linux.alibaba.com>2023-11-18 15:07:00 +0800
committerNelson Chu <nelson@rivosinc.com>2023-11-23 09:31:52 +0800
commitc63af675b9b69abbbf5e48d7b77ec2d311c5b6a8 (patch)
tree53be9708af2762146c7cc787b284414a1b3b043e /include/opcode/tic30.h
parent4d8f1ff3bc75dde16f52513de77c7b22a0650f7a (diff)
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RISC-V: Add integer arithmetic instructions for T-Head VECTOR vendor extension
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds integer arithmetic instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for integer arithmetic instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VADCVVM): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
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