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authorChristoph Müllner <christoph.muellner@vrull.eu>2022-07-01 05:01:20 +0200
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>2022-09-22 18:06:09 +0200
commit6e17ae625570ff8f3c12c8765b8d45d4db8694bd (patch)
treeb2add49965e7e814881d5987f7c047a7756ea277 /include/opcode/convex.h
parent25236d63fdb138e24cb34aa6c513ae8de2dac7b8 (diff)
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RISC-V: Add T-Head MemPair vendor extension
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the XTheadMemPair extension, a collection of T-Head specific two-GP-register memory operations. The 'th' prefix and the "XTheadMemPair" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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