opcodes/riscv: Hide '.L0 ' fake symbols

The RISC-V assembler generates fake labels with the name '.L0 ' as
part of the debug information (see
gas/config/tc-riscv.h:FAKE_LABEL_NAME).

The problem is that currently, when disassembling an object file, the
output looks like this (this is an example from the GDB testsuite, but
is pretty representative of anything with debug information):

  000000000000001e <main>:
    1e:   7179                    addi    sp,sp,-48
    20:   f406                    sd      ra,40(sp)
    22:   f022                    sd      s0,32(sp)
    24:   1800                    addi    s0,sp,48

  0000000000000026 <.L0 >:
    26:   87aa                    mv      a5,a0
    28:   feb43023                sd      a1,-32(s0)
    2c:   fcc43c23                sd      a2,-40(s0)
    30:   fef42623                sw      a5,-20(s0)

  0000000000000034 <.L0 >:
    34:   fec42783                lw      a5,-20(s0)
    38:   0007871b                sext.w  a4,a5
    3c:   678d                    lui     a5,0x3
    3e:   03978793                addi    a5,a5,57 # 3039 <.LASF30+0x2a9d>
    42:   02f71463                bne     a4,a5,6a <.L0 >

  0000000000000046 <.L0 >:
    46:   000007b7                lui     a5,0x0
    4a:   0007b783                ld      a5,0(a5) # 0 <need_malloc>
    4e:   6f9c                    ld      a5,24(a5)

  0000000000000050 <.L0 >:
    50:   86be                    mv      a3,a5
    52:   466d                    li      a2,27
    54:   4585                    li      a1,1
    56:   000007b7                lui     a5,0x0
    5a:   00078513                mv      a0,a5
    5e:   00000097                auipc   ra,0x0
    62:   000080e7                jalr    ra # 5e <.L0 +0xe>

  0000000000000066 <.L0 >:
    66:   4785                    li      a5,1
    68:   a869                    j       102 <.L0 >

  000000000000006a <.L0 >:
    6a:   000007b7                lui     a5,0x0
    6e:   00078513                mv      a0,a5
    72:   00000097                auipc   ra,0x0
    76:   000080e7                jalr    ra # 72 <.L0 +0x8>

The frequent repeated '.L0 ' labels are pointless, as they are
non-unique there's no way to match a use of '.L0 ' to its appearence
in the output, so we'd be better off just not printing it at all.
That's what this patch does by defining a 'symbol_is_valid' method for
RISC-V.  With this commit, the same disassembly now looks like this:

  000000000000001e <main>:
    1e:   7179                    addi    sp,sp,-48
    20:   f406                    sd      ra,40(sp)
    22:   f022                    sd      s0,32(sp)
    24:   1800                    addi    s0,sp,48
    26:   87aa                    mv      a5,a0
    28:   feb43023                sd      a1,-32(s0)
    2c:   fcc43c23                sd      a2,-40(s0)
    30:   fef42623                sw      a5,-20(s0)
    34:   fec42783                lw      a5,-20(s0)
    38:   0007871b                sext.w  a4,a5
    3c:   678d                    lui     a5,0x3
    3e:   03978793                addi    a5,a5,57 # 3039 <.LASF30+0x2a9d>
    42:   02f71463                bne     a4,a5,6a <.L4>
    46:   000007b7                lui     a5,0x0
    4a:   0007b783                ld      a5,0(a5) # 0 <need_malloc>
    4e:   6f9c                    ld      a5,24(a5)
    50:   86be                    mv      a3,a5
    52:   466d                    li      a2,27
    54:   4585                    li      a1,1
    56:   000007b7                lui     a5,0x0
    5a:   00078513                mv      a0,a5
    5e:   00000097                auipc   ra,0x0
    62:   000080e7                jalr    ra # 5e <main+0x40>
    66:   4785                    li      a5,1
    68:   a869                    j       102 <.L5>

  000000000000006a <.L4>:
    6a:   000007b7                lui     a5,0x0
    6e:   00078513                mv      a0,a5
    72:   00000097                auipc   ra,0x0
    76:   000080e7                jalr    ra # 72 <.L4+0x8>

In order to share the fake label between the assembler and the
libopcodes library, I've added some new defines RISCV_FAKE_LABEL_NAME
and RISCV_FAKE_LABEL_CHAR in include/opcode/riscv.h.  I could have
just moved FAKE_LABEL_NAME to the include file, however, I thnk this
would be confusing, someone working on the assembler would likely not
expect to find FAKE_LABEL_NAME defined outside of the assembler source
tree.  By introducing the RISCV_FAKE_LABEL_* defines I can leave the
assembler standard FAKE_LABEL_ defines in the assembler source, but
still share the RISCV_FAKE_LABEL_* with libopcodes.

gas/ChangeLog:

	* config/tc-riscv.h (FAKE_LABEL_NAME): Define as
	RISCV_FAKE_LABEL_NAME.
	(FAKE_LABEL_CHAR): Define as RISCV_FAKE_LABEL_CHAR.

include/ChangeLog:

	* dis-asm.h (riscv_symbol_is_valid): Declare.
	* opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
	(RISCV_FAKE_LABEL_CHAR): Define.

opcodes/ChangeLog:

        * disassembler.c (disassemble_init_for_target): Add RISC-V
        initialisation.
        * riscv-dis.c (riscv_symbol_is_valid): New function.

1 files changed, 6 insertions, 0 deletions

diff --git a/include/ChangeLog b/include/ChangeLog
index 7375bac..b3fd56b 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* dis-asm.h (riscv_symbol_is_valid): Declare.
+	* opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
+	(RISCV_FAKE_LABEL_CHAR): Define.
+
 2018-12-03  Kito Cheng  <kito@andestech.com>
 
 	* opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to