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authorVladimir Mezentsev <vladimir.mezentsev@oracle.com>2024-02-22 15:30:40 -0800
committerVladimir Mezentsev <vladimir.mezentsev@oracle.com>2024-02-25 17:30:35 -0800
commitf8c018bcd4ef50bc68c01b19da287a9caaa89c15 (patch)
tree5028b160e724ffaad815a352cfd3e9a5b66ae03e /gprofng
parent29c238c5fb4699b463b4c68d5719586b0675afdd (diff)
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gprofng: Add hardware counter profiling for the Ampere system
gprofng should recognize Ampere and other ARM systems. gprofng/ChangeLog 2024-02-22 Vladimir Mezentsev <vladimir.mezentsev@oracle.com> * common/hwc_cpus.h: Declare the enum values ARM_CPU_IMP_*. * common/core_pcbe.c (core_pcbe_init): Accept new systems ARM_CPU_IMP_*.
Diffstat (limited to 'gprofng')
-rw-r--r--gprofng/common/core_pcbe.c5
-rw-r--r--gprofng/common/hwc_cpus.h10
2 files changed, 13 insertions, 2 deletions
diff --git a/gprofng/common/core_pcbe.c b/gprofng/common/core_pcbe.c
index 25bf484..30977f0 100644
--- a/gprofng/common/core_pcbe.c
+++ b/gprofng/common/core_pcbe.c
@@ -2746,6 +2746,11 @@ core_pcbe_init (void)
case ARM_CPU_IMP_CAVIUM:
case ARM_CPU_IMP_APM:
case ARM_CPU_IMP_QCOM:
+ case ARM_CPU_IMP_FUJITSU:
+ case ARM_CPU_IMP_NVIDIA:
+ case ARM_CPU_IMP_HISI:
+ case ARM_CPU_IMP_APPLE:
+ case ARM_CPU_IMP_AMPERE:
snprintf (core_impl_name, sizeof (core_impl_name), "%s", AARCH64_VENDORSTR_ARM);
events_table = events_generic;
num_gpc = 4; // MEZ: a real implementation is needed
diff --git a/gprofng/common/hwc_cpus.h b/gprofng/common/hwc_cpus.h
index 34896d6..4b77083 100644
--- a/gprofng/common/hwc_cpus.h
+++ b/gprofng/common/hwc_cpus.h
@@ -117,13 +117,19 @@ extern cpu_info_t *read_cpuinfo();
#define CPC_SPARC64_X 4006 /* Athena */
#define CPC_SPARC64_XII 4010 /* Athena++ */
-// aarch64. Constants from arch/arm64/include/asm/cputype.h
+// aarch64. Constants from tools/arch/arm64/include/asm/cputype.h
+// in https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
enum {
ARM_CPU_IMP_ARM = 0x41,
ARM_CPU_IMP_BRCM = 0x42,
ARM_CPU_IMP_CAVIUM = 0x43,
+ ARM_CPU_IMP_FUJITSU = 0x46,
+ ARM_CPU_IMP_NVIDIA = 0x4E,
+ ARM_CPU_IMP_HISI = 0x48,
ARM_CPU_IMP_APM = 0x50,
- ARM_CPU_IMP_QCOM = 0x51
+ ARM_CPU_IMP_QCOM = 0x51,
+ ARM_CPU_IMP_APPLE = 0x61,
+ ARM_CPU_IMP_AMPERE = 0xC0
};
#define AARCH64_VENDORSTR_ARM "ARM"