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author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:13:00 +0800 |
---|---|---|
committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:32:30 +0800 |
commit | ac8cb70f3690b4eace1325c7ff918dce9073da7c (patch) | |
tree | 83600872c07a022dcea1d3097dba01eafd5fa197 /gold | |
parent | a693765e23934996abbe4e44c4ba28eabdece4f9 (diff) | |
download | gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.zip gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.tar.gz gdb-ac8cb70f3690b4eace1325c7ff918dce9073da7c.tar.bz2 |
[MIPS] Add Loongson 3A1000 proccessor support.
bfd/
* archures.c (bfd_architecture): Rename
bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (enum I_xxx): Likewise.
(arch_info_struct): Likewise.
* elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Likewise.
(bfd_mips_isa_ext_mach): Likewise.
(bfd_mips_isa_ext): Likewise.
(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
binutils/
* NEWS: Mention Loongson 3A1000 proccessor support.
* readelf.c (get_machine_flags): Rename loongson-3a to gs464.
(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
elfcpp/
* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
E_MIPS_MACH_GS464.
gas/
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
CPU_LOONGSON_3A to CPU_GS464.
(mips_cpu_info_table): Add gs464 descriptors, Keep
loongson3a as an alias of gs464 for compatibility.
* doc/as.texi (march table): Rename loongson3a to gs464.
* testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
flag to None.
gold/
* mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach):
Rename loongson3a to gs464.
(mips_isa_ext_mach, mips_isa_ext): Delete loongson3a.
(infer_abiflags): Use ases instead of isa_ext for infer ABI
flags.
(elf_mips_mach_name): Rename loongson3a to gs464.
include/
* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
E_MIPS_MACH_GS464.
(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a
to gs464.
opcodes/
* mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep
loongson3a as an alias of gs464 for compatibility.
* mips-opc.c (mips_opcodes): Change Comments.
Diffstat (limited to 'gold')
-rw-r--r-- | gold/ChangeLog | 9 | ||||
-rw-r--r-- | gold/mips.cc | 20 |
2 files changed, 16 insertions, 13 deletions
diff --git a/gold/ChangeLog b/gold/ChangeLog index a5f4a85..8f1b02d 100644 --- a/gold/ChangeLog +++ b/gold/ChangeLog @@ -1,3 +1,12 @@ +2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com> + + * mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach): + Rename loongson3a to gs464. + (mips_isa_ext_mach, mips_isa_ext): Delete loongson3a. + (infer_abiflags): Use ases instead of isa_ext for infer ABI + flags. + (elf_mips_mach_name): Rename loongson3a to gs464. + 2018-07-10 Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com> * object.cc (Sized_relobj_file::map_to_kept_section): Initialize diff --git a/gold/mips.cc b/gold/mips.cc index e54f51c..bfe8c41 100644 --- a/gold/mips.cc +++ b/gold/mips.cc @@ -3982,7 +3982,7 @@ class Target_mips : public Sized_target<size, big_endian> mach_mips5 = 5, mach_mips_loongson_2e = 3001, mach_mips_loongson_2f = 3002, - mach_mips_loongson_3a = 3003, + mach_mips_gs464 = 3003, mach_mips_sb1 = 12310201, // octal 'SB', 01 mach_mips_octeon = 6501, mach_mips_octeonp = 6601, @@ -4148,7 +4148,7 @@ class Target_mips : public Sized_target<size, big_endian> this->add_extension(mach_mips_octeon2, mach_mips_octeonp); this->add_extension(mach_mips_octeonp, mach_mips_octeon); this->add_extension(mach_mips_octeon, mach_mipsisa64r2); - this->add_extension(mach_mips_loongson_3a, mach_mipsisa64r2); + this->add_extension(mach_mips_gs464, mach_mipsisa64r2); // MIPS64 extensions. this->add_extension(mach_mipsisa64r2, mach_mipsisa64); @@ -8858,8 +8858,8 @@ Target_mips<size, big_endian>::elf_mips_mach(elfcpp::Elf_Word flags) case elfcpp::E_MIPS_MACH_LS2F: return mach_mips_loongson_2f; - case elfcpp::E_MIPS_MACH_LS3A: - return mach_mips_loongson_3a; + case elfcpp::E_MIPS_MACH_GS464: + return mach_mips_gs464; case elfcpp::E_MIPS_MACH_OCTEON3: return mach_mips_octeon3; @@ -8959,9 +8959,6 @@ Target_mips<size, big_endian>::mips_isa_ext_mach(unsigned int isa_ext) case elfcpp::AFL_EXT_LOONGSON_2F: return mach_mips_loongson_2f; - case elfcpp::AFL_EXT_LOONGSON_3A: - return mach_mips_loongson_3a; - case elfcpp::AFL_EXT_SB1: return mach_mips_sb1; @@ -9026,9 +9023,6 @@ Target_mips<size, big_endian>::mips_isa_ext(unsigned int mips_mach) case mach_mips_loongson_2f: return elfcpp::AFL_EXT_LOONGSON_2F; - case mach_mips_loongson_3a: - return elfcpp::AFL_EXT_LOONGSON_3A; - case mach_mips_sb1: return elfcpp::AFL_EXT_SB1; @@ -9160,7 +9154,7 @@ Target_mips<size, big_endian>::infer_abiflags( && abiflags->fp_abi != elfcpp::Val_GNU_MIPS_ABI_FP_SOFT && abiflags->fp_abi != elfcpp::Val_GNU_MIPS_ABI_FP_64A && abiflags->isa_level >= 32 - && abiflags->isa_ext != elfcpp::AFL_EXT_LOONGSON_3A) + && abiflags->ases != elfcpp::AFL_ASE_LOONGSON_EXT) abiflags->flags1 |= elfcpp::AFL_FLAGS1_ODDSPREG; } @@ -12530,8 +12524,8 @@ Target_mips<size, big_endian>::elf_mips_mach_name(elfcpp::Elf_Word e_flags) return "mips:loongson_2e"; case elfcpp::E_MIPS_MACH_LS2F: return "mips:loongson_2f"; - case elfcpp::E_MIPS_MACH_LS3A: - return "mips:loongson_3a"; + case elfcpp::E_MIPS_MACH_GS464: + return "mips:gs464"; case elfcpp::E_MIPS_MACH_OCTEON: return "mips:octeon"; case elfcpp::E_MIPS_MACH_OCTEON2: |