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authorHan Shen <shenhan@google.com>2014-10-29 11:28:46 -0700
committerHan Shen <shenhan@google.com>2014-10-29 11:31:36 -0700
commit9726c3c179e375cc0cc73a593adfaef8ed5735ab (patch)
tree2bc289a46829de9662092ccc35cc9a7c8cf391c5 /gold/testsuite
parentab917dfb5ae0952c234a9bfa16bb3122fdfaf14c (diff)
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Misc about gold for aarch64 backend.
The patch does the following things: -- Add support for ifunc. -- Enable safe icf -- Add support for TLSLD relocations R_AARCH64_TLSLD_ADR_PAGE21, R_AARCH64_TLSLD_ADD_LO12_NC, R_AARCH64_TLSLD_MOVW_DTPREL_G1, R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC. (R_AARCH64_TLSLD_MOVW_* are used by LLVM.) -- Add support for TLSLD->TLSLE relaxation. -- Add support for R_AARCH64_LD_PREL_LO19, R_AARCH64_ADR_PREL_LO21. -- Fix 2 encoding bugs in AArch64_relocate_functions::update_movnz. -- Correct TLS relocation properties in gold/aarch64-reloc.def. -- Update testsuite/icf_safe_so_test.cc, testsuite/icf_safe_test.sh. gold/ 2014-10-29 Han Shen <shenhan@google.com> Jing Yu <jingyu@google.com> * aarch64-reloc.def: Add LD_PREL_LO12, ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. Change property of TLS relocations to Symbol::TLS_REF. * aarch64.cc (Target_aarch64::do_can_check_for_function_pointers): New method. (Target_aarch64::reloc_needs_plt_for_ifunc): New method. (Target_aarch64::tls_ld_to_le): New method. (Target_aarch64::aarch64_info): Enable can_icf_inline_merge_sections for 64bit targets. (Output_data_plt_aarch64::irelative_rel_): New data member. (Output_data_plt_aarch64::add_entry): Add irelative entries to plt. (Output_data_plt_aarch64::add_local_ifunc_entry): New method. (Output_data_plt_aarch64::add_relocation): New method. (Output_data_plt_aarch64::do_write): Add gold_assert on got_irelative offset. Add got_irelative size to got size. (AArch64_relocate_functions): Typedef AArch64_valtype. Replace long type string with the new typename. (AArch64_relocate_functions::update_adr): Replace parameter x with immed. (AArch64_relocate_functions::update_movnz): Correct wrong val mask. (AArch64_relocate_functions::reloc_common): New method. (AArch64_relocate_funcsions::rela_general): Extract common part out into reloc_common method. (AArch64_relocate_functions::rela_general): Likewise. (AArch64_relocate_functions::pcrela_general): Likewise. (AArch64_relocate_functions::adr): New method. (AArch64_relocate_functions::adrp): Calculate immed before calling update_adr. (AArch64_relocate_functions::adrp): Likewise. (AArch64_relocate_functions::movnz): Cast x to SignedW type when comparing x to 0. Calculate immed from ~x when x < 0. (Target_aarch64::optimize_tls_reloc): Add new cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::possible_function_pointer_reloc): Implement this method. (Target_aarch64::Scan::local_reloc_may_be_function_pointer): Update comment. (Target_aarch64::Scan::local): Add codes to handle STT_GNU_IFUNC symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::Scan::global): Add codes to handle STT_GNU_IFUNC symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::make_plt_entry): Call add_entry with two more parameters. (Target_aarch64::make_local_ifunc_plt_entry): New method. (Target_aarch64::Relocate::relocate): Add cases for LD_PREL_LO19, ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::Relocate::relocate_tls): Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. * testsuite/icf_safe_so_test.cc: Correct test comment. * testsuite/icf_safe_test.sh: Add AArch64 arch.
Diffstat (limited to 'gold/testsuite')
-rw-r--r--gold/testsuite/icf_safe_so_test.cc8
-rwxr-xr-xgold/testsuite/icf_safe_test.sh2
2 files changed, 5 insertions, 5 deletions
diff --git a/gold/testsuite/icf_safe_so_test.cc b/gold/testsuite/icf_safe_so_test.cc
index bca852f..29bc6d4 100644
--- a/gold/testsuite/icf_safe_so_test.cc
+++ b/gold/testsuite/icf_safe_so_test.cc
@@ -22,10 +22,10 @@
// The goal of this program is to verify if identical code folding
// in safe mode correctly folds functions in a shared object. The
-// foo_* functions below should not be folded. For x86-64,
-// foo_glob and bar_glob should be folded as their function pointers
-// are addresses of PLT entries in shared objects. For 32-bit X86,
-// the hidden protected and internal symbols can be folded.
+// foo_* functions below should not be folded on X86_64.
+// For 32-bit X86, the hidden protected and internal symbols can be folded.
+// foo_glob and bar_glob should not be folded, because function pointer
+// of foo_glob is taken.
int __attribute__ ((visibility ("protected")))
foo_prot()
diff --git a/gold/testsuite/icf_safe_test.sh b/gold/testsuite/icf_safe_test.sh
index e18468c..691b839 100755
--- a/gold/testsuite/icf_safe_test.sh
+++ b/gold/testsuite/icf_safe_test.sh
@@ -57,7 +57,7 @@ END {
arch_specific_safe_fold()
{
- grep_x86=`grep -q -e "Advanced Micro Devices X86-64" -e "Intel 80386" -e "ARM" -e "TILE" -e "PowerPC" $2`
+ grep_x86=`grep -q -e "Advanced Micro Devices X86-64" -e "Intel 80386" -e "ARM" -e "TILE" -e "PowerPC" -e "AArch64" $2`
if [ $? -eq 0 ];
then
check_fold $3 $4 $5