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| author | Jan Beulich <jbeulich@suse.com> | 2024-08-16 08:34:50 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2024-08-16 08:34:50 +0200 |
| commit | 4b939bab12e8f9a94af388aa1b77ada4d15e45fd (patch) | |
| tree | c45c4f68fb61ece86d4d2827730073027e83d356 /gdbserver/regcache.cc | |
| parent | 81e9e54636835c1fc286d87d33d51a8b3da7b35a (diff) | |
| download | gdb-4b939bab12e8f9a94af388aa1b77ada4d15e45fd.zip gdb-4b939bab12e8f9a94af388aa1b77ada4d15e45fd.tar.gz gdb-4b939bab12e8f9a94af388aa1b77ada4d15e45fd.tar.bz2 | |
opcodes/cgen: drop trailing whitespace also for cris
While 919b75f7e289 ("Trailing space in opcodes/ generated files") took
care of permanently zapping trailing whitespace, 547112801156
("opcodes: cris: move desc & opc files from sim/") then didn't enhance
the newly added code accordingly.
Diffstat (limited to 'gdbserver/regcache.cc')
0 files changed, 0 insertions, 0 deletions