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authorAndrew Cagney <cagney@redhat.com>2001-11-08 18:32:08 +0000
committerAndrew Cagney <cagney@redhat.com>2001-11-08 18:32:08 +0000
commita62cc96ec59fbc02e3a8135f83bb8d9ce86294ca (patch)
tree5452f4a7d63cdc71e579a2b7dad79ccbbc825daf /gdb
parent8ea43c6d5a6fdc04c59b97817f4041bdfe2d2219 (diff)
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Enable multi-arch for i386.
Diffstat (limited to 'gdb')
-rw-r--r--gdb/ChangeLog11
-rw-r--r--gdb/config/i386/tm-i386.h2
-rw-r--r--gdb/i386-tdep.c41
-rw-r--r--gdb/i386-tdep.h40
4 files changed, 93 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 26ef85b..8391fc7 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,14 @@
+Wed Nov 7 20:38:14 2001 Andrew Cagney <cagney@redhat.com>
+
+ * i386-tdep.c: Include "i386-tdep.h".
+ (XMALLOC): Define.
+ (i386_gdbarch_init): New function.
+ (_initialize_i386_tdep): Register bfd_arch_i386.
+ * config/i386/tm-i386.h (GDB_MULTI_ARCH): Define as
+ GDB_MULTI_ARCH_PARTIAL.
+ * i386-tdep.h: When partially multi-arch, conditionally define
+ all macros.
+
Wed Nov 7 20:45:32 2001 Andrew Cagney <cagney@redhat.com>
* i386-tdep.c (set_disassembly_flavor): Delete function.
diff --git a/gdb/config/i386/tm-i386.h b/gdb/config/i386/tm-i386.h
index aba5c15..80e90c0e 100644
--- a/gdb/config/i386/tm-i386.h
+++ b/gdb/config/i386/tm-i386.h
@@ -22,6 +22,8 @@
#ifndef TM_I386_H
#define TM_I386_H 1
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
#include "regcache.h"
/* Forward declarations for prototypes. */
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index 276c018..bdb5875 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -34,9 +34,12 @@
#include "regcache.h"
#include "doublest.h"
#include "value.h"
-
+#include "i386-tdep.h"
#include "gdb_assert.h"
+#undef XMALLOC
+#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
+
/* Names of the registers. The first 10 registers match the register
numbering scheme used by GCC for stabs and DWARF. */
static char *i386_register_names[] =
@@ -1195,12 +1198,48 @@ gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
+struct gdbarch *
+i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+{
+ struct gdbarch_tdep *tdep
+ struct gdbarch *gdbarch;
+
+ /* For the moment there is only one i386 architecture. */
+ if (arches != NULL)
+ return arches->gdbarch;
+
+ /* Allocate space for the new architecture. */
+ tdep = XMALLOC (struct gdbarch_tdep);
+ gdbarch = gdbarch_alloc (&info, tdep);
+
+ set_gdbarch_use_generic_dummy_frames (gdbarch, 0);
+
+ /* Call dummy code. */
+ set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
+ set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 5);
+ set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
+ set_gdbarch_call_dummy_p (gdbarch, 1);
+ set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
+
+ set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
+ set_gdbarch_push_arguments (gdbarch, i386_push_arguments);
+
+ set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_on_stack);
+
+ /* NOTE: tm-i386nw.h and tm-i386v4.h override this. */
+ set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
+
+ return gdbarch;
+}
+
/* Provide a prototype to silence -Wmissing-prototypes. */
void _initialize_i386_tdep (void);
void
_initialize_i386_tdep (void)
{
+ register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
+
/* Initialize the table saying where each register starts in the
register file. */
{
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 16c245c..39798ec 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -22,16 +22,34 @@
#ifndef I386_TDEP_H
#define I386_TDEP_H
+#if !defined (FPU_REG_RAW_SIZE) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FPU_REG_RAW_SIZE 10
+#endif
+#if !defined (XMM0_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define XMM0_REGNUM FIRST_XMM_REGNUM
+#endif
+#if !defined (FIRST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_FPU_REGNUM FP0_REGNUM
+#endif
+#if !defined (LAST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_FPU_REGNUM (gdbarch_tdep (current_gdbarch)->last_fpu_regnum)
+#endif
+#if !defined (FIRST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->first_xmm_regnum)
+#endif
+#if !defined (LAST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->last_xmm_regnum)
+#endif
+#if !defined (MXCSR_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define MXCSR_REGNUM (gdbarch_tdep (current_gdbarch)->mxcsr_regnum)
+#endif
+#if !defined (FIRST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_FPU_CTRL_REGNUM (gdbarch_tdep (current_gdbarch)->first_fpu_ctrl_regnum)
+#endif
+#if !defined (LAST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_FPU_CTRL_REGNUM (FIRST_FPU_CTRL_REGNUM + 7)
+#endif
/* All of these control registers (except for FCOFF and FDOFF) are
sixteen bits long (at most) in the FPU, but are zero-extended to
@@ -39,22 +57,38 @@
compute the size of the control register file, and somewhat easier
to convert to and from the FSAVE instruction's 32-bit format. */
/* FPU control word. */
+#if !defined (FCTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCTRL_REGNUM (FIRST_FPU_CTRL_REGNUM)
+#endif
/* FPU status word. */
+#if !defined (FSTAT_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FSTAT_REGNUM (FIRST_FPU_CTRL_REGNUM + 1)
+#endif
/* FPU register tag word. */
+#if !defined (FTAG_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FTAG_REGNUM (FIRST_FPU_CTRL_REGNUM + 2)
+#endif
/* FPU instruction's code segment selector 16 bits, called "FPU Instruction
Pointer Selector" in the x86 manuals. */
+#if !defined (FCS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCS_REGNUM (FIRST_FPU_CTRL_REGNUM + 3)
+#endif
/* FPU instruction's offset within segment ("Fpu Code OFFset"). */
+#if !defined (FCOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 4)
+#endif
/* FPU operand's data segment. */
+#if !defined (FDS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FDS_REGNUM (FIRST_FPU_CTRL_REGNUM + 5)
+#endif
/* FPU operand's offset within segment. */
+#if !defined (FDOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FDOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 6)
+#endif
/* FPU opcode, bottom eleven bits. */
+#if !defined (FOP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FOP_REGNUM (FIRST_FPU_CTRL_REGNUM + 7)
+#endif
/* i386 architecture specific information. */
struct gdbarch_tdep
@@ -66,8 +100,14 @@ struct gdbarch_tdep
int first_fpu_ctrl_regnum;
};
+#if !defined (IS_FP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_FP_REGNUM(n) (FIRST_FPU_REGNUM <= (n) && (n) <= LAST_FPU_REGNUM)
+#endif
+#if !defined (IS_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_FPU_CTRL_REGNUM(n) (FIRST_FPU_CTRL_REGNUM <= (n) && (n) <= LAST_FPU_CTRL_REGNUM)
+#endif
+#if !defined (IS_SSE_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_SSE_REGNUM(n) (FIRST_XMM_REGNUM <= (n) && (n) <= LAST_XMM_REGNUM)
+#endif
#endif