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authorMichael Chastain <mec@google.com>2003-10-20 18:30:43 +0000
committerMichael Chastain <mec@google.com>2003-10-20 18:30:43 +0000
commit4beec2b7f39f0bea29ee475e160425f252affa83 (patch)
tree1040ee0be9fba2bf2259d1ef541bf723b7e9ac8e /gdb
parent24d693a6aa93831bfcf285397179e9d007e1ffdb (diff)
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2003-10-20 Michael Chastain <mec@shout.net>
* config/djgpp/fnchange.lst: Add lines for: sim/testsuite/sim/frv/interrupts/Ipipe-fr400.cgs, sim/testsuite/sim/frv/interrupts/Ipipe-fr500.cgs, sim/testsuite/sim/frv/interrupts/badalign-fr550.cgs, sim/testsuite/sim/frv/interrupts/compound-fr550.cgs, sim/testsuite/sim/frv/interrupts/data_store_error-fr550.cgs, sim/testsuite/sim/frv/interrupts/fp_exception-fr550.cgs, sim/testsuite/sim/frv/interrupts/insn_access_error-fr550.cgs.
Diffstat (limited to 'gdb')
-rw-r--r--gdb/ChangeLog11
-rw-r--r--gdb/config/djgpp/fnchange.lst7
2 files changed, 18 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index fcd4da8..ff65bb6 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,14 @@
+2003-10-20 Michael Chastain <mec@shout.net>
+
+ * config/djgpp/fnchange.lst: Add lines for:
+ sim/testsuite/sim/frv/interrupts/Ipipe-fr400.cgs,
+ sim/testsuite/sim/frv/interrupts/Ipipe-fr500.cgs,
+ sim/testsuite/sim/frv/interrupts/badalign-fr550.cgs,
+ sim/testsuite/sim/frv/interrupts/compound-fr550.cgs,
+ sim/testsuite/sim/frv/interrupts/data_store_error-fr550.cgs,
+ sim/testsuite/sim/frv/interrupts/fp_exception-fr550.cgs,
+ sim/testsuite/sim/frv/interrupts/insn_access_error-fr550.cgs.
+
2003-10-20 Andrew Cagney <cagney@redhat.com>
* values.c (register_value_being_returned): Update comments. Use
diff --git a/gdb/config/djgpp/fnchange.lst b/gdb/config/djgpp/fnchange.lst
index a2ee65a..2bcb5f9 100644
--- a/gdb/config/djgpp/fnchange.lst
+++ b/gdb/config/djgpp/fnchange.lst
@@ -264,6 +264,13 @@
@V@/sim/testsuite/sim/arm/misaligned1.ms @V@/sim/testsuite/sim/arm/mis1.ms
@V@/sim/testsuite/sim/arm/misaligned2.ms @V@/sim/testsuite/sim/arm/mis2.ms
@V@/sim/testsuite/sim/arm/misaligned3.ms @V@/sim/testsuite/sim/arm/mis3.ms
+@V@/sim/testsuite/sim/frv/interrupts/Ipipe-fr400.cgs @V@/sim/testsuite/sim/frv/interrupts/Ip-fr400.cgs
+@V@/sim/testsuite/sim/frv/interrupts/Ipipe-fr500.cgs @V@/sim/testsuite/sim/frv/interrupts/Ip-fr500.cgs
+@V@/sim/testsuite/sim/frv/interrupts/badalign-fr550.cgs @V@/sim/testsuite/sim/frv/interrupts/fr550-badalign.cgs
+@V@/sim/testsuite/sim/frv/interrupts/compound-fr550.cgs @V@/sim/testsuite/sim/frv/interrupts/fr550-compound.cgs
+@V@/sim/testsuite/sim/frv/interrupts/data_store_error-fr550.cgs @V@/sim/testsuite/sim/frv/interrupts/fr550-data_store_error.cgs
+@V@/sim/testsuite/sim/frv/interrupts/fp_exception-fr550.cgs @V@/sim/testsuite/sim/frv/interrupts/fr550-fp_exception.cgs
+@V@/sim/testsuite/sim/frv/interrupts/insn_access_error-fr550.cgs @V@/sim/testsuite/sim/frv/interrupts/fr550-insn_access_error.cgs
@V@/tcl/cygwin/tclConfig.sh.in @V@/tcl/cygwin/tclConfig.sh-in
@V@/tcl/doc/ExprLongObj.3 @V@/tcl/doc/ExprLObj.3
@V@/tcl/mac/tclMacBOAAppInit.c @V@/tcl/mac/tclBOAAppInit.c