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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-07-28 22:02:05 +0900 |
|---|---|---|
| committer | Nelson Chu <nelson.chu@sifive.com> | 2022-07-29 09:16:02 +0800 |
| commit | f8ad70a17bfc12199cc5a20b55b369c3dfa6cb42 (patch) | |
| tree | 9b1044270b75384ec9fd51a0b9c5483a14b1424d /gdb/vax-netbsd-tdep.c | |
| parent | d17823bfd35adb4caf3724512c3cd40a5a66402e (diff) | |
| download | gdb-f8ad70a17bfc12199cc5a20b55b369c3dfa6cb42.zip gdb-f8ad70a17bfc12199cc5a20b55b369c3dfa6cb42.tar.gz gdb-f8ad70a17bfc12199cc5a20b55b369c3dfa6cb42.tar.bz2 | |
RISC-V: Add `OP_V' to .insn named opcodes
This commit adds `OP_V' (OP-V: vector instruction opcode for now
ratified `V' extension) to .insn opcode name list. Although vector
instruction encoding is not implemented in `.insn' directive, it will
help future implementation of custom vector `.insn'.
gas/ChangeLog:
* config/tc-riscv.c (opcode_name_list): Add `OP_V'.
* testsuite/gas/riscv/insn.s: Add testcase.
* testsuite/gas/riscv/insn.d: Likewise.
* testsuite/gas/riscv/insn-dwarf.d: Reflect insn.s update.
Diffstat (limited to 'gdb/vax-netbsd-tdep.c')
0 files changed, 0 insertions, 0 deletions