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author | Will Schmidt <will_schmidt@vnet.ibm.com> | 2021-04-12 14:17:43 -0500 |
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committer | Will Schmidt <will_schmidt@vnet.ibm.com> | 2021-04-12 14:17:43 -0500 |
commit | 6b142048ad6c1b84a32b3ebdaf92d3c0d7a6ee9d (patch) | |
tree | 6be2828a9af803f145e428cd749767fca6046e2f /gdb/testsuite | |
parent | c8a379440e0f8bf94ed5730e823c9256e64bf37c (diff) | |
download | gdb-6b142048ad6c1b84a32b3ebdaf92d3c0d7a6ee9d.zip gdb-6b142048ad6c1b84a32b3ebdaf92d3c0d7a6ee9d.tar.gz gdb-6b142048ad6c1b84a32b3ebdaf92d3c0d7a6ee9d.tar.bz2 |
[PATCH,rs6000] Fix vsx-regs.exp testcase failure
Hi,
This test exercise updates to the F* and VS* registers
and verifies updates to the same. Note that the registers
overlap; the doubleword[1] portion of any VS0-VS31
register contains the F0-F31 register contents, so any updates
to one can be measured in the other.
Per a brief investigation, we see that dl_main() currently
uses some VSX instructions, so the VS* values are not
going to be zero when this testcase reaches main, where these
tests begin. The test harness does not explicitly
initialize the full VS* values, so the first test loop
that updates the F* values means our VS* values are
uninitalized and will fail the first set of checks.
This update explicitly initializes the doubleword[0] portion
of the VS* registers, to allow this test to succeed.
2021-04-12 Will Schmidt <will_schmidt@vnet.ibm.com>
gdb/testsuite/ChangeLog:
* gdb.arch/vsx-regs.exp: Initialize vs* doublewords.
Diffstat (limited to 'gdb/testsuite')
-rw-r--r-- | gdb/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gdb/testsuite/gdb.arch/vsx-regs.exp | 13 |
2 files changed, 16 insertions, 1 deletions
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index d940bfb..b8c84aa 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2021-04-12 Will Schmidt <will_schmidt@vnet.ibm.com> + * gdb.arch/powerpc-vsx-regs.exp: Initialize vs* doublewords. + +2021-04-12 Will Schmidt <will_schmidt@vnet.ibm.com> + * gdb.arch/powerpc-plxv-nonrel.s: Testcase using non-relative plxv instructions. * gdb.arch/powerpc-plxv-nonrel.exp: Testcase harness. diff --git a/gdb/testsuite/gdb.arch/vsx-regs.exp b/gdb/testsuite/gdb.arch/vsx-regs.exp index c234d6a..0b0d2fa 100644 --- a/gdb/testsuite/gdb.arch/vsx-regs.exp +++ b/gdb/testsuite/gdb.arch/vsx-regs.exp @@ -89,7 +89,18 @@ if {$endianness == "big"} { set float_register ".raw 0xdeadbeefdeadbeef." -# First run the F0~F31/VS0~VS31 tests +# Note that the F0-F31 registers are shared with the doubleword 0 portion of +# the VS0-VS31 registers, the doubleword 1 portions of VS* remain unchanged +# after updates to F*. +# Since dl_main uses some VS* registers, and per inspection their values are +# no longer zero when our test reaches main(), we need to explicitly +# initialize the doubleword1 portions before we run our tests against +# values currently in those registers. + +# 0: Initialize the (doubleword 1) portion of the VS0-VS31 registers. +for {set i 0} {$i < 32} {incr i 1} { + gdb_test_no_output "set \$vs$i.v2_double\][0\] = 0" +} # 1: Set F0~F31 registers and check if it reflects on VS0~VS31. for {set i 0} {$i < 32} {incr i 1} { |