New gdb.reverse test case for aarch64 instructions

This patch adds a test case to test the process record for some of
aarch64 instructions.

In each function, GDB turns on process record, and single step until
program goes to the end of the function.  Then, single step backward.
In each of forward single step and backward single step, the contents
of registers are saved, and test compares them.  If there is any
differences, a FAIL is emitted.

The test is flexible, and we can test other instructions easily in the
future.

gdb/testsuite:

2015-05-26  Omair Javaid  <omair.javaid@linaro.org>
	    Yao Qi  <yao.qi@linaro.org>

	* gdb.reverse/aarch64.c: New.
	* gdb.reverse/aarch64.exp: New.

2 files changed, 214 insertions, 0 deletions

diff --git a/gdb/testsuite/gdb.reverse/aarch64.c b/gdb/testsuite/gdb.reverse/aarch64.c
new file mode 100644
index 0000000..099ec02
--- /dev/null
+++ b/gdb/testsuite/gdb.reverse/aarch64.c
@@ -0,0 +1,99 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2015 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <arm_neon.h>
+
+static void
+load (void)
+{
+  int buf[8];
+
+  asm ("ld1 { v1.8b }, [%[buf]]\n"
+       "ld1 { v2.8b, v3.8b }, [%[buf]]\n"
+       "ld1 { v3.8b, v4.8b, v5.8b }, [%[buf]]\n"
+       :
+       : [buf] "r" (buf)
+       : /* No clobbers */);
+}
+
+static void
+move (void)
+{
+  float32x2_t b1_ = vdup_n_f32(123.0f);
+  float32_t a1_ = 0;
+  float64x1_t b2_ = vdup_n_f64(456.0f);
+  float64_t a2_ = 0;
+
+  asm ("ins %0.s[0], %w1\n"
+       : "=w"(b1_)
+       : "r"(a1_), "0"(b1_)
+       : /* No clobbers */);
+
+  asm ("ins %0.d[1], %x1\n"
+       : "=w"(b2_)
+       : "r"(a2_), "0"(b2_)
+       : /* No clobbers */);
+}
+
+static void
+adv_simd_mod_imm (void)
+{
+  float32x2_t a1 = {2.0, 4.0};
+
+  asm ("bic %0.2s, #1\n"
+       "bic %0.2s, #1, lsl #8\n"
+       : "=w"(a1)
+       : "0"(a1)
+       : /* No clobbers */);
+}
+
+static void
+adv_simd_scalar_index (void)
+{
+  float64x2_t b_ = {0.0, 0.0};
+  float64_t a_ = 1.0;
+  float64_t result;
+
+  asm ("fmla %d0,%d1,%2.d[1]"
+       : "=w"(result)
+       : "w"(a_), "w"(b_)
+       : /* No clobbers */);
+}
+
+static void
+adv_simd_smlal (void)
+{
+  asm ("smlal v13.2d, v8.2s, v0.2s");
+}
+
+static void
+adv_simd_vect_shift (void)
+{
+  asm ("fcvtzs s0, s0, #1");
+}
+
+int
+main ()
+{
+  load ();
+  move ();
+  adv_simd_mod_imm ();
+  adv_simd_scalar_index ();
+  adv_simd_smlal ();
+  adv_simd_vect_shift ();
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.reverse/aarch64.exp b/gdb/testsuite/gdb.reverse/aarch64.exp
new file mode 100644
index 0000000..800645e
--- /dev/null
+++ b/gdb/testsuite/gdb.reverse/aarch64.exp
@@ -0,0 +1,115 @@
+# Copyright (C) 2015 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+if ![supports_reverse] {
+    return
+}
+
+# Test aarch64 instruction recording.
+
+if {![istarget "aarch64*-*-*"]} then {
+    verbose "Skipping aarch64 instruction recording tests."
+    return
+}
+
+standard_testfile
+
+if {[prepare_for_testing $testfile.exp $testfile $srcfile \
+	 [list debug]]} {
+    untested ${testfile}.exp
+    return -1
+}
+if { ![runto main] } then {
+    fail "run to main"
+    return
+}
+
+# In each function FUNC, GDB turns on process record, and single step
+# until program goes to the end of the function.  Then, single step
+# backward.  In each of forward single step and backward single step,
+# the contents of registers are saved, and test compares them.  If
+# there is any differences, a FAIL is emitted.
+
+proc test { func } {
+    global hex decimal
+    global gdb_prompt
+
+    with_test_prefix "$func" {
+	gdb_breakpoint $func
+	gdb_test "continue"
+
+	set last_insn ""
+	set test "disassemble $func"
+	gdb_test_multiple $test $test {
+	    -re ".*($hex) <\\+$decimal>:\[^\r\n\]+\r\nEnd of assembler dump\.\r\n$gdb_prompt $" {
+		set last_insn $expect_out(1,string)
+	    }
+	}
+	if { $last_insn == "" } {
+	    fail "find the last instruction of function $func"
+	}
+
+	# Activate process record/replay
+	gdb_test_no_output "record" "Turn on process record"
+
+	# Registers contents before each forward single step.
+	set count 0
+	for {} {$count < 500} {incr count} {
+	    gdb_test_multiple "x/i \$pc" "" {
+		-re ".* ($hex) <.*>:\[ \t\]*(.*)\r\n$gdb_prompt $" {
+		    set insn_addr $expect_out(1,string)
+
+		    if [expr {$last_insn == $insn_addr}] {
+			break
+		    }
+
+		    set insn_array($count) $expect_out(2,string)
+		}
+	    }
+
+	    set pre_regs($count) [capture_command_output "info all-registers" ""]
+	    gdb_test "si" "" ""
+	}
+
+	incr count -1
+	# Registers contents after each backward single step.
+	for {set i $count} {$i >= 0} {incr i -1} {
+	    gdb_test "reverse-stepi" "" ""
+	    set post_regs($i) [capture_command_output "info all-registers" ""]
+	}
+
+	# Compare the register contents.
+	for {set i 0} {$i < $count} {incr i} {
+	    if { ![gdb_assert { [string compare $pre_regs($i) $post_regs($i)] == 0 } \
+		      "compare registers on insn $i:$insn_array($i)"] } {
+
+		foreach pre_line [split $pre_regs($i) \n] post_line [split $post_regs($i) \n] {
+		    if { [string compare $pre_line $post_line] } {
+			verbose -log " -:$pre_line"
+			verbose -log " +:$post_line"
+		    }
+		}
+	    }
+	}
+	gdb_test "record stop"
+    }
+}
+
+test "load"
+test "move"
+test "adv_simd_mod_imm"
+test "adv_simd_scalar_index"
+test "adv_simd_smlal"
+test "adv_simd_vect_shift"