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authorJim Wilson <jimw@sifive.com>2019-08-28 17:47:01 -0700
committerJim Wilson <jimw@sifive.com>2019-08-28 17:47:01 -0700
commit507685a390b47d853f22176273cb949e2ee8da81 (patch)
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parent09c721040c2161650fe18caf7fca5b2ffafab665 (diff)
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RISC-V: Fix a gp relaxation reloc overflow error.
This was broken when I changed how we compute the value for the gp register. It used to be computed inside the sdata section. Now it is computed at the end which makes it an abs section symbol. There is code that tries to use the alignment of the section that the gp value is in, but this does not work if it is in the abs section, as the abs section has alignment of 1 byte. There are people using alternative linker scripts that still define it in the sdata section, so the code is still useful. Thus adding a check to disable this when gp is in the abs section. bfd/ * elfnn-riscv.c (_bfd_riscv_relax_lui): Add check to exclude abs section when setting max_alignment. Update comment. (_bfd_riscv_relax_pc): Likewise.
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