[PowerPC] Aliases for vector registers

This patch defines pseudo-registers "v0" through "v31" as aliases that
map to the corresponding raw "vr0" through "vr31" vector registers for
Power.

The motivation behind this is that although GDB defines these
registers as "vrX", the disassembler prints them as "vX", e.g. as the
operands in instructions such as "vaddubm v2,v1,v1".  This can be
confusing to users trying to print out the values of the operands
while inspecting the disassembled code.

The new aliases are made not to belong to any register group, to avoid
duplicated values in "info register vector" and "info register all".
The arch-specific rs6000_pseudo_register_reggroup_p function had
previously been removed since the other pseudo-registers could have
their groups inferred by their type.  It restored with this patch to
handle the aliases.  Membership for the other pseudo-registers is
still determined using the default function.

A new tests checks that GDB prints the expected values of vector
registers after they are filled by the inferior, by using both the raw
names and the aliases.  Two other existing tests are modified to also
test the aliases.

gdb/ChangeLog:
2019-01-14  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* ppc-tdep.h (struct gdbarch_tdep) <ppc_v0_alias_regnum>: New
	field.
	* rs6000-tdep.c: Include reggroups.h.
	(IS_V_ALIAS_PSEUDOREG): Define.
	(rs6000_register_name): Return names for the "vX" aliases.
	(rs6000_pseudo_register_type): Return type for the "vX" aliases.
	(rs6000_pseudo_register_reggroup_p): Restore.  Handle "vX"
	aliases.  Call default_register_reggroup_p for all other
	pseudo-registers.
	(v_alias_pseudo_register_read, v_alias_pseudo_register_write):
	New functions.
	(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
	Handle "vX" aliases.
	(v_alias_pseudo_register_collect): New function.
	(rs6000_ax_pseudo_register_collect): Handle "vX" aliases.
	(rs6000_gdbarch_init): Initialize "vX" aliases as
	pseudo-registers.  Restore registration of
	rs6000_pseudo_register_reggroup_p with
	set_tdesc_pseudo_register_reggroup_p.

gdb/testsuite/ChangeLog:
2019-01-14  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* gdb.arch/vsx-regs.exp: Add tests that use the vector register
	aliases.
	* gdb.arch/altivec-regs.exp: Likewise.  Fix indentation of two
	tests.
	* gdb.arch/powerpc-vector-regs.c: New file.
	* gdb.arch/powerpc-vector-regs.exp: New file.

gdb/doc/ChangeLog:
2019-01-14  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* gdb.texinfo (PowerPC Features): Document the alias
	pseudo-registers for the org.gnu.gdb.power.altivec feature.

1 files changed, 59 insertions, 0 deletions

diff --git a/gdb/testsuite/gdb.arch/powerpc-vector-regs.c b/gdb/testsuite/gdb.arch/powerpc-vector-regs.c
new file mode 100644
index 0000000..925f0d7
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vector-regs.c
@@ -0,0 +1,59 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright (C) 2019 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* Write bytes with values ranging from 0 to 31 to each byte of each
+   corresponding vector register.  */
+int main (void)
+{
+  asm volatile ("vspltisb 0, 0" : : : "v0");
+  asm volatile ("vspltisb 1, 1" : : : "v1");
+
+  asm volatile ("vaddubm 2, 1, 1" : : : "v2");
+  asm volatile ("vaddubm 3, 2, 1" : : : "v3");
+  asm volatile ("vaddubm 4, 3, 1" : : : "v4");
+  asm volatile ("vaddubm 5, 4, 1" : : : "v5");
+  asm volatile ("vaddubm 6, 5, 1" : : : "v6");
+  asm volatile ("vaddubm 7, 6, 1" : : : "v7");
+  asm volatile ("vaddubm 8, 7, 1" : : : "v8");
+  asm volatile ("vaddubm 9, 8, 1" : : : "v9");
+  asm volatile ("vaddubm 10, 9, 1" : : : "v10");
+  asm volatile ("vaddubm 11, 10, 1" : : : "v11");
+  asm volatile ("vaddubm 12, 11, 1" : : : "v12");
+  asm volatile ("vaddubm 13, 12, 1" : : : "v13");
+  asm volatile ("vaddubm 14, 13, 1" : : : "v14");
+  asm volatile ("vaddubm 15, 14, 1" : : : "v15");
+  asm volatile ("vaddubm 16, 15, 1" : : : "v16");
+  asm volatile ("vaddubm 17, 16, 1" : : : "v17");
+  asm volatile ("vaddubm 18, 17, 1" : : : "v18");
+  asm volatile ("vaddubm 19, 18, 1" : : : "v19");
+  asm volatile ("vaddubm 20, 19, 1" : : : "v20");
+  asm volatile ("vaddubm 21, 20, 1" : : : "v21");
+  asm volatile ("vaddubm 22, 21, 1" : : : "v22");
+  asm volatile ("vaddubm 23, 22, 1" : : : "v23");
+  asm volatile ("vaddubm 24, 23, 1" : : : "v24");
+  asm volatile ("vaddubm 25, 24, 1" : : : "v25");
+  asm volatile ("vaddubm 26, 25, 1" : : : "v26");
+  asm volatile ("vaddubm 27, 26, 1" : : : "v27");
+  asm volatile ("vaddubm 28, 27, 1" : : : "v28");
+  asm volatile ("vaddubm 29, 28, 1" : : : "v29");
+  asm volatile ("vaddubm 30, 29, 1" : : : "v30");
+  asm volatile ("vaddubm 31, 30, 1" : : : "v31");
+
+  asm volatile ("nop"); // marker
+
+  return 0;
+}