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| author | Dimitar Dimitrov <dimitar@dinux.eu> | 2019-09-23 17:55:43 +0100 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2019-09-23 22:11:16 +0100 |
| commit | e2e9097bd21406f09fdf57fee0d99e6b45de61b6 (patch) | |
| tree | 75d59fd74ae9e08221b67696bda85829fad5d593 /gdb/target-dcache.h | |
| parent | ddd44b7053386b82769c27c871a08c72e589e93e (diff) | |
| download | gdb-e2e9097bd21406f09fdf57fee0d99e6b45de61b6.zip gdb-e2e9097bd21406f09fdf57fee0d99e6b45de61b6.tar.gz gdb-e2e9097bd21406f09fdf57fee0d99e6b45de61b6.tar.bz2 | |
Add testsuite for the PRU simulator port
sim/testsuite/ChangeLog:
* configure: Regenerate.
sim/testsuite/sim/pru/ChangeLog:
* add.s: New test.
* allinsn.exp: New file.
* dmem-zero-pass.s: New test.
* dmem-zero-trap.s: New test.
* dram.s: New test.
* jmp.s: New test.
* loop-imm.s: New test.
* loop-reg.s: New test.
* mul.s: New test.
* subreg.s: New test.
* testutils.inc: New file.
Diffstat (limited to 'gdb/target-dcache.h')
0 files changed, 0 insertions, 0 deletions