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| author | Jim Wilson <jimw@sifive.com> | 2018-10-22 14:10:13 -0700 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2018-10-22 14:10:13 -0700 |
| commit | 270b9329b713fdc166f95dfa3a0a2f72f3a49608 (patch) | |
| tree | 880ae6d15b5b07aff96c87942acafad62cc23fd3 /gdb/riscv-tdep.h | |
| parent | 192c2bfbd7a6d4b2069f6b94b020d274a483c198 (diff) | |
| download | gdb-270b9329b713fdc166f95dfa3a0a2f72f3a49608.zip gdb-270b9329b713fdc166f95dfa3a0a2f72f3a49608.tar.gz gdb-270b9329b713fdc166f95dfa3a0a2f72f3a49608.tar.bz2 | |
RISC-V: Print FP regs as union of float types.
A 64-bit FP register can hold either a single or double float value, so
print it as both types by using a union type for FP registers. Likewise
for 128-bit regs which can also hold long double.
gdb/
* riscv-tdep.c (riscv_fpreg_d_type, riscv_fpreg_q_type): New.
(riscv_register_type): Use them.
(riscv_print_one_register_info): Handle union of floats same as float.
* riscv-tdep.h (struct gdbarch_tdep): Add riscv_fpreg_d_type and
riscv_fpreg_q_type fields.
Diffstat (limited to 'gdb/riscv-tdep.h')
| -rw-r--r-- | gdb/riscv-tdep.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index 8a2454e..e04e728 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -78,6 +78,10 @@ struct gdbarch_tdep features that are supported on the target. These could be cached from the target, or read from the executable when available. */ unsigned core_features; + + /* ISA-specific data types. */ + struct type *riscv_fpreg_d_type; + struct type *riscv_fpreg_q_type; }; /* Return the width in bytes of the general purpose registers for GDBARCH. */ |