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authorChristina Schimpe <christina.schimpe@intel.com>2022-08-10 08:50:37 +0200
committerSchimpe, Christina <christina.schimpe@intel.com>2024-11-18 13:36:16 +0000
commit27e82ad68b5eead610aabaf0e60335cc65cbd738 (patch)
treec3d2afa19d4a85358da5f185093ba15abff0b70d /gdb/nat
parent86bb38cee9399c4092e6fc5f280d296fab7e3327 (diff)
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LAM: Enable tagged pointer support for watchpoints.HEADmaster
The Intel (R) linear address masking (LAM) feature modifies the checking applied to 64-bit linear addresses. With this so-called "modified canonicality check" the processor masks the metadata bits in a pointer before using it as a linear address. LAM supports two different modes that differ regarding which pointer bits are masked and can be used for metadata: LAM 48 resulting in a LAM width of 15 and LAM 57 resulting in a LAM width of 6. This patch adjusts watchpoint addresses based on the currently enabled LAM mode using the untag mask provided in the /proc/<pid>/status file. As LAM can be enabled at runtime or as the configuration may change when entering an enclave, GDB checks enablement state each time a watchpoint is updated. In contrast to the patch implemented for ARM's Top Byte Ignore "Clear non-significant bits of address on memory access", it is not necessary to adjust addresses before they are passed to the target layer cache, as for LAM tagged pointers are supported by the system call to read memory. Additionally, LAM applies only to addresses used for data accesses. Thus, it is sufficient to mask addresses used for watchpoints. The following examples are based on a LAM57 enabled program. Before this patch tagged pointers were not supported for watchpoints: ~~~ (gdb) print pi_tagged $2 = (int *) 0x10007ffffffffe004 (gdb) watch *pi_tagged Hardware watchpoint 2: *pi_tagged (gdb) c Continuing. Couldn't write debug register: Invalid argument. ~~~~ Once LAM 48 or LAM 57 is enabled for the current program, GDB can now specify watchpoints for tagged addresses with LAM width 15 or 6, respectively. Approved-By: Felix Willgerodt <felix.willgerodt@intel.com>
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