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authorAndrew Burgess <andrew.burgess@embecosm.com>2018-05-03 17:46:14 +0100
committerAndrew Burgess <andrew.burgess@embecosm.com>2018-05-08 18:03:46 +0100
commit8ee22052f690c007556b97eed59f49350ece5ca9 (patch)
tree4e777bd6bcd84d061f8ca31b5425d000d866ce3b /gdb/gdbserver
parent886d542809fd73fba55ba72da1bd64ba50164222 (diff)
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gdb/x86: Handle kernels using compact xsave format
For GNU/Linux on x86-64, if the target is using the xsave format for passing the floating-point information from the inferior then there currently exists a bug relating to the x87 control registers, and the mxcsr register. The xsave format allows different floating-point features to be lazily enabled, a bit in the xsave format tells GDB which floating-point features have been enabled, and which have not. Currently in GDB, when reading the floating point state, we check the xsave bit flags, if the feature is enabled then we read the feature from the xsave buffer, and if the feature is not enabled, then we supply the default value from within GDB. Within GDB, when writing the floating point state, we first fetch the xsave state from the target and then, for any feature that is not yet enabled, we write the default values into the xsave buffer. Next we compare the regcache value with the value in the xsave buffer, and, if the value has changed we update the value in the xsave buffer, and mark the feature enabled in the xsave bit flags. The problem then, is that the x87 control registers were not following this pattern. We assumed that these registers were always written out by the kernel, and we always wrote them out to the xsave buffer (but didn't enabled the feature). The result of this is that if the kernel had not yet enabled the x87 feature then within GDB we would see random values for the x87 floating point control registers, and if the user tried to modify one of these register, that modification would be lost. Finally, the mxcsr register was also broken in the same way as the x87 control registers. The added complexity with this case is that the mxcsr register is part of both the avx and sse floating point feature set. When reading or writing this register we need to check that at least one of these features is enabled. This bug was present in native GDB, and within gdbserver. Both are fixed with this commit. gdb/ChangeLog: * common/x86-xstate.h (I387_FCTRL_INIT_VAL): New constant. (I387_MXCSR_INIT_VAL): New constant. * amd64-tdep.c (amd64_supply_xsave): Only read state from xsave buffer if it was supplied by the inferior. * i387-tdep.c (i387_supply_fsave): Use I387_MXCSR_INIT_VAL. (i387_xsave_get_clear_bv): New function. (i387_supply_xsave): Only read x87 control registers from the xsave buffer if the feature is enabled, and the state will have been written, otherwise, provide a suitable default. (i387_collect_xsave): Pre-clear all registers in xsave buffer, including x87 control registers. Update control registers if they have changed from the default value, and mark features as enabled as required. * i387-tdep.h (i387_xsave_get_clear_bv): Declare. gdb/gdbserver/ChangeLog: * i387-fp.c (i387_cache_to_xsave): Only write x87 control registers to the cache if their values have changed. (i387_xsave_to_cache): Provide default values for x87 control registers when these features are available, but disabled. * regcache.c (supply_register_by_name_zeroed): New function. * regcache.h (supply_register_by_name_zeroed): Declare new function. gdb/testsuite/ChangeLog: * gdb.arch/amd64-init-x87-values.S: New file. * gdb.arch/amd64-init-x87-values.exp: New file.
Diffstat (limited to 'gdb/gdbserver')
-rw-r--r--gdb/gdbserver/ChangeLog10
-rw-r--r--gdb/gdbserver/i387-fp.c210
-rw-r--r--gdb/gdbserver/regcache.c13
-rw-r--r--gdb/gdbserver/regcache.h3
4 files changed, 177 insertions, 59 deletions
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 7461359..9cd72a8 100644
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,13 @@
+2018-05-08 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * i387-fp.c (i387_cache_to_xsave): Only write x87 control
+ registers to the cache if their values have changed.
+ (i387_xsave_to_cache): Provide default values for x87 control
+ registers when these features are available, but disabled.
+ * regcache.c (supply_register_by_name_zeroed): New function.
+ * regcache.h (supply_register_by_name_zeroed): Declare new
+ function.
+
2018-05-07 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index f1f7d84..bee1af9 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -294,17 +294,31 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if (clear_bv)
{
if ((clear_bv & X86_XSTATE_X87))
- for (i = 0; i < 8; i++)
- memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
+ {
+ for (i = 0; i < 8; i++)
+ memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
+
+ fp->fioff = 0;
+ fp->fooff = 0;
+ fp->fctrl = I387_FCTRL_INIT_VAL;
+ fp->fstat = 0;
+ fp->ftag = 0;
+ fp->fiseg = 0;
+ fp->foseg = 0;
+ fp->fop = 0;
+ }
if ((clear_bv & X86_XSTATE_SSE))
- for (i = 0; i < num_xmm_registers; i++)
+ for (i = 0; i < num_xmm_registers; i++)
memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16);
if ((clear_bv & X86_XSTATE_AVX))
- for (i = 0; i < num_xmm_registers; i++)
+ for (i = 0; i < num_xmm_registers; i++)
memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16);
+ if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
+ memset (((char *) &fp->mxcsr), 0, 4);
+
if ((clear_bv & X86_XSTATE_BNDREGS))
for (i = 0; i < num_mpx_bnd_registers; i++)
memset (((char *) &fp->mpx_bnd_space[0]) + i * 16, 0, 16);
@@ -523,43 +537,93 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
}
}
- /* Update the corresponding bits in xstate_bv if any SSE/AVX
- registers are changed. */
- fp->xstate_bv |= xstate_bv;
+ if ((x86_xcr0 & X86_XSTATE_SSE) || (x86_xcr0 & X86_XSTATE_AVX))
+ {
+ collect_register_by_name (regcache, "mxcsr", raw);
+ if (memcmp (raw, &fp->mxcsr, 4) != 0)
+ {
+ if (((fp->xstate_bv | xstate_bv)
+ & (X86_XSTATE_SSE | X86_XSTATE_AVX)) == 0)
+ xstate_bv |= X86_XSTATE_SSE;
+ memcpy (&fp->mxcsr, raw, 4);
+ }
+ }
- collect_register_by_name (regcache, "fioff", &fp->fioff);
- collect_register_by_name (regcache, "fooff", &fp->fooff);
- collect_register_by_name (regcache, "mxcsr", &fp->mxcsr);
+ if (x86_xcr0 & X86_XSTATE_X87)
+ {
+ collect_register_by_name (regcache, "fioff", raw);
+ if (memcmp (raw, &fp->fioff, 4) != 0)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ memcpy (&fp->fioff, raw, 4);
+ }
- /* This one's 11 bits... */
- collect_register_by_name (regcache, "fop", &val2);
- fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
+ collect_register_by_name (regcache, "fooff", raw);
+ if (memcmp (raw, &fp->fooff, 4) != 0)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ memcpy (&fp->fooff, raw, 4);
+ }
- /* Some registers are 16-bit. */
- collect_register_by_name (regcache, "fctrl", &val);
- fp->fctrl = val;
+ /* This one's 11 bits... */
+ collect_register_by_name (regcache, "fop", &val2);
+ val2 = (val2 & 0x7FF) | (fp->fop & 0xF800);
+ if (fp->fop != val2)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->fop = val2;
+ }
- collect_register_by_name (regcache, "fstat", &val);
- fp->fstat = val;
+ /* Some registers are 16-bit. */
+ collect_register_by_name (regcache, "fctrl", &val);
+ if (fp->fctrl != val)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->fctrl = val;
+ }
- /* Convert to the simplifed tag form stored in fxsave data. */
- collect_register_by_name (regcache, "ftag", &val);
- val &= 0xFFFF;
- val2 = 0;
- for (i = 7; i >= 0; i--)
- {
- int tag = (val >> (i * 2)) & 3;
+ collect_register_by_name (regcache, "fstat", &val);
+ if (fp->fstat != val)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->fstat = val;
+ }
- if (tag != 3)
- val2 |= (1 << i);
- }
- fp->ftag = val2;
+ /* Convert to the simplifed tag form stored in fxsave data. */
+ collect_register_by_name (regcache, "ftag", &val);
+ val &= 0xFFFF;
+ val2 = 0;
+ for (i = 7; i >= 0; i--)
+ {
+ int tag = (val >> (i * 2)) & 3;
- collect_register_by_name (regcache, "fiseg", &val);
- fp->fiseg = val;
+ if (tag != 3)
+ val2 |= (1 << i);
+ }
+ if (fp->ftag != val2)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->ftag = val2;
+ }
- collect_register_by_name (regcache, "foseg", &val);
- fp->foseg = val;
+ collect_register_by_name (regcache, "fiseg", &val);
+ if (fp->fiseg != val)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->fiseg = val;
+ }
+
+ collect_register_by_name (regcache, "foseg", &val);
+ if (fp->foseg != val)
+ {
+ xstate_bv |= X86_XSTATE_X87;
+ fp->foseg = val;
+ }
+ }
+
+ /* Update the corresponding bits in xstate_bv if any SSE/AVX
+ registers are changed. */
+ fp->xstate_bv |= xstate_bv;
}
static int
@@ -844,39 +908,67 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
}
- supply_register_by_name (regcache, "fioff", &fp->fioff);
- supply_register_by_name (regcache, "fooff", &fp->fooff);
- supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
+ if ((clear_bv & (X86_XSTATE_SSE | X86_XSTATE_AVX))
+ == (X86_XSTATE_SSE | X86_XSTATE_AVX))
+ {
+ unsigned int default_mxcsr = I387_MXCSR_INIT_VAL;
+ supply_register_by_name (regcache, "mxcsr", &default_mxcsr);
+ }
+ else
+ supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
- /* Some registers are 16-bit. */
- val = fp->fctrl & 0xFFFF;
- supply_register_by_name (regcache, "fctrl", &val);
+ if ((clear_bv & X86_XSTATE_X87) != 0)
+ {
+ supply_register_by_name_zeroed (regcache, "fioff");
+ supply_register_by_name_zeroed (regcache, "fooff");
- val = fp->fstat & 0xFFFF;
- supply_register_by_name (regcache, "fstat", &val);
+ val = I387_FCTRL_INIT_VAL;
+ supply_register_by_name (regcache, "fctrl", &val);
- /* Generate the form of ftag data that GDB expects. */
- top = (fp->fstat >> 11) & 0x7;
- val = 0;
- for (i = 7; i >= 0; i--)
- {
- int tag;
- if (fp->ftag & (1 << i))
- tag = i387_ftag (fxp, (i + 8 - top) % 8);
- else
- tag = 3;
- val |= tag << (2 * i);
+ supply_register_by_name_zeroed (regcache, "fstat");
+
+ val = 0xFFFF;
+ supply_register_by_name (regcache, "ftag", &val);
+
+ supply_register_by_name_zeroed (regcache, "fiseg");
+ supply_register_by_name_zeroed (regcache, "foseg");
+ supply_register_by_name_zeroed (regcache, "fop");
}
- supply_register_by_name (regcache, "ftag", &val);
+ else
+ {
+ supply_register_by_name (regcache, "fioff", &fp->fioff);
+ supply_register_by_name (regcache, "fooff", &fp->fooff);
- val = fp->fiseg & 0xFFFF;
- supply_register_by_name (regcache, "fiseg", &val);
+ /* Some registers are 16-bit. */
+ val = fp->fctrl & 0xFFFF;
+ supply_register_by_name (regcache, "fctrl", &val);
- val = fp->foseg & 0xFFFF;
- supply_register_by_name (regcache, "foseg", &val);
+ val = fp->fstat & 0xFFFF;
+ supply_register_by_name (regcache, "fstat", &val);
- val = (fp->fop) & 0x7FF;
- supply_register_by_name (regcache, "fop", &val);
+ /* Generate the form of ftag data that GDB expects. */
+ top = (fp->fstat >> 11) & 0x7;
+ val = 0;
+ for (i = 7; i >= 0; i--)
+ {
+ int tag;
+ if (fp->ftag & (1 << i))
+ tag = i387_ftag (fxp, (i + 8 - top) % 8);
+ else
+ tag = 3;
+ val |= tag << (2 * i);
+ }
+ supply_register_by_name (regcache, "ftag", &val);
+
+ val = fp->fiseg & 0xFFFF;
+ supply_register_by_name (regcache, "fiseg", &val);
+
+ val = fp->foseg & 0xFFFF;
+ supply_register_by_name (regcache, "foseg", &val);
+
+ val = (fp->fop) & 0x7FF;
+ supply_register_by_name (regcache, "fop", &val);
+ }
}
/* Default to SSE. */
diff --git a/gdb/gdbserver/regcache.c b/gdb/gdbserver/regcache.c
index cbdf766..0718b9f 100644
--- a/gdb/gdbserver/regcache.c
+++ b/gdb/gdbserver/regcache.c
@@ -346,6 +346,19 @@ supply_register_zeroed (struct regcache *regcache, int n)
#endif
}
+#ifndef IN_PROCESS_AGENT
+
+/* Supply register called NAME with value zero to REGCACHE. */
+
+void
+supply_register_by_name_zeroed (struct regcache *regcache,
+ const char *name)
+{
+ supply_register_zeroed (regcache, find_regno (regcache->tdesc, name));
+}
+
+#endif
+
/* Supply the whole register set whose contents are stored in BUF, to
REGCACHE. If BUF is NULL, all the registers' values are recorded
as unavailable. */
diff --git a/gdb/gdbserver/regcache.h b/gdb/gdbserver/regcache.h
index 6ff1308..2c0df64 100644
--- a/gdb/gdbserver/regcache.h
+++ b/gdb/gdbserver/regcache.h
@@ -107,6 +107,9 @@ void supply_register_zeroed (struct regcache *regcache, int n);
void supply_register_by_name (struct regcache *regcache,
const char *name, const void *buf);
+void supply_register_by_name_zeroed (struct regcache *regcache,
+ const char *name);
+
void supply_regblock (struct regcache *regcache, const void *buf);
void collect_register (struct regcache *regcache, int n, void *buf);