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authorAnton Kolesov <Anton.Kolesov@synopsys.com>2016-08-12 20:02:20 +0300
committerAnton Kolesov <Anton.Kolesov@synopsys.com>2016-09-21 21:07:06 +0300
commitad0a504f7e10ea11dbf58eb9990a5180f781b695 (patch)
tree3ea333a32246db9c625590e3d5fbc8f8d75e4316 /gdb/features
parent8aabe2e254e6a0419db9c6397c4068c69bfd95b0 (diff)
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arc: New Synopsys ARC port
ARC is a family of licensable processors developed by Synopsys. This is an initial patch that doesn't yet support some of the features, that are already available in Synopsys' fork of GDB, namely: * longjmp support * signal frame handling * prologue analysis * Linux targets support * native Linux support ARC cores are configurable and extensible, which means from debugger perspective that some registers and debug capabilities are optional, therefore it is up to the GDB stub to determine exact list of register available on target and supply it to GDB via XML target descriptions. List of registers that is known to GDB and is required is intentionally kept small to simplify requirements to GDB stub and implementation of a GDB client. gdb/ChangeLog: * Makefile.in (ALL_TARGET_OBS): Add arc-tdep.o. (HFILES_NO_SRCDIR): Add arc-tdep.h. (ALLDEPFILES): Add arc-tdep.c. * NEWS: Mention new ARC port. * configure.tgt: Add ARC. * arc-tdep.c: New file. * arc-tdep.h: New file. * features/Makefile (XMLTOC): Add arc-v2.xml and arc-arcompact.xml. * features/arc-v2.xml: New file. * features/arc-v2.c: New file (generated). * features/arc-arcompact.xml: New file. * features/arc-arcompact.c: New file (generated). gdb/doc/ChangeLog: * gdb.texinfo (Embedded Processors): Document ARC. (Synopsys ARC): New section. (Standard Target Features): Document ARC features. (ARC Features): New section. gdb/testsuite/ChangeLog: * gdb.xml/tdesc-regs.exp: set core-regs for arc*-*-elf32.
Diffstat (limited to 'gdb/features')
-rw-r--r--gdb/features/Makefile2
-rw-r--r--gdb/features/arc-arcompact.c75
-rw-r--r--gdb/features/arc-arcompact.xml85
-rw-r--r--gdb/features/arc-v2.c79
-rw-r--r--gdb/features/arc-v2.xml92
5 files changed, 333 insertions, 0 deletions
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 809c811..4efb1a5 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -148,6 +148,8 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH))
# to make on the command line.
XMLTOC = \
aarch64.xml \
+ arc-v2.xml \
+ arc-arcompact.xml \
arm-with-iwmmxt.xml \
arm-with-m-fpa-layout.xml \
arm-with-m-vfp-d16.xml \
diff --git a/gdb/features/arc-arcompact.c b/gdb/features/arc-arcompact.c
new file mode 100644
index 0000000..d1fa4fe
--- /dev/null
+++ b/gdb/features/arc-arcompact.c
@@ -0,0 +1,75 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: arc-arcompact.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_arc_arcompact;
+static void
+initialize_tdesc_arc_arcompact (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("ARC700"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.arcompact");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "gp", 26, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "fp", 27, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "sp", 28, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ilink1", 29, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "ilink2", 30, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "blink", 31, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "lp_count", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "pcl", 33, 1, "", 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
+ type = tdesc_create_flags (feature, "status32_type", 4);
+ tdesc_add_bitfield (type, "H", 0, 0);
+ tdesc_add_bitfield (type, "E", 1, 2);
+ tdesc_add_bitfield (type, "A", 3, 4);
+ tdesc_add_bitfield (type, "AE", 5, 5);
+ tdesc_add_bitfield (type, "DE", 6, 6);
+ tdesc_add_bitfield (type, "U", 7, 7);
+ tdesc_add_bitfield (type, "V", 8, 8);
+ tdesc_add_bitfield (type, "C", 9, 9);
+ tdesc_add_bitfield (type, "N", 10, 10);
+ tdesc_add_bitfield (type, "Z", 11, 11);
+ tdesc_add_bitfield (type, "L", 12, 12);
+ tdesc_add_bitfield (type, "R", 13, 13);
+ tdesc_add_bitfield (type, "SE", 14, 14);
+
+ tdesc_create_reg (feature, "pc", 34, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "status32", 35, 1, NULL, 32, "status32_type");
+
+ tdesc_arc_arcompact = result;
+}
diff --git a/gdb/features/arc-arcompact.xml b/gdb/features/arc-arcompact.xml
new file mode 100644
index 0000000..e66bb45
--- /dev/null
+++ b/gdb/features/arc-arcompact.xml
@@ -0,0 +1,85 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2015-2016 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>arc:ARC700</architecture>
+ <!-- No OSABI for bare metal. -->
+ <!-- No compatibility for ARC. -->
+
+ <feature name="org.gnu.gdb.arc.core.arcompact">
+ <reg name="r0" bitsize="32"/>
+ <reg name="r1" bitsize="32"/>
+ <reg name="r2" bitsize="32"/>
+ <reg name="r3" bitsize="32"/>
+ <reg name="r4" bitsize="32"/>
+ <reg name="r5" bitsize="32"/>
+ <reg name="r6" bitsize="32"/>
+ <reg name="r7" bitsize="32"/>
+ <reg name="r8" bitsize="32"/>
+ <reg name="r9" bitsize="32"/>
+ <reg name="r10" bitsize="32"/>
+ <reg name="r11" bitsize="32"/>
+ <reg name="r12" bitsize="32"/>
+ <reg name="r13" bitsize="32"/>
+ <reg name="r14" bitsize="32"/>
+ <reg name="r15" bitsize="32"/>
+ <reg name="r16" bitsize="32"/>
+ <reg name="r17" bitsize="32"/>
+ <reg name="r18" bitsize="32"/>
+ <reg name="r19" bitsize="32"/>
+ <reg name="r20" bitsize="32"/>
+ <reg name="r21" bitsize="32"/>
+ <reg name="r22" bitsize="32"/>
+ <reg name="r23" bitsize="32"/>
+ <reg name="r24" bitsize="32"/>
+ <reg name="r25" bitsize="32"/>
+
+ <!-- ARC core data pointer registers. -->
+ <reg name="gp" bitsize="32" type="data_ptr"/>
+ <reg name="fp" bitsize="32" type="data_ptr"/>
+ <reg name="sp" bitsize="32" type="data_ptr"/>
+
+ <!-- Code pointers. -->
+ <reg name="ilink1" bitsize="32" type="code_ptr"/>
+ <reg name="ilink2" bitsize="32" type="code_ptr"/>
+ <reg name="blink" bitsize="32" type="code_ptr"/>
+
+ <!-- Here goes extension core registers: r32 - r59 -->
+
+ <!-- Loop counter. -->
+ <reg name="lp_count" bitsize="32" type="uint32"/>
+
+ <!-- r61 is a reserved register address. -->
+
+ <!-- r62 is a long immediate value, not a real register. -->
+
+ <!-- 4-byte aligned read-only program counter. -->
+ <reg name="pcl" bitsize="32" type="code_ptr" group=""/>
+ </feature>
+
+ <feature name="org.gnu.gdb.arc.aux-minimal">
+ <flags id="status32_type" size="4">
+ <field name="H" start="0" end="0"/>
+ <field name="E" start="1" end="2"/>
+ <field name="A" start="3" end="4"/>
+ <field name="AE" start="5" end="5"/>
+ <field name="DE" start="6" end="6"/>
+ <field name="U" start="7" end="7"/>
+ <field name="V" start="8" end="8"/>
+ <field name="C" start="9" end="9"/>
+ <field name="N" start="10" end="10"/>
+ <field name="Z" start="11" end="11"/>
+ <field name="L" start="12" end="12"/>
+ <field name="R" start="13" end="13"/>
+ <field name="SE" start="14" end="14"/>
+ </flags>
+
+ <reg name="pc" bitsize="32" type="code_ptr"/>
+ <reg name="status32" bitsize="32" type="status32_type"/>
+ </feature>
+</target>
diff --git a/gdb/features/arc-v2.c b/gdb/features/arc-v2.c
new file mode 100644
index 0000000..c963410
--- /dev/null
+++ b/gdb/features/arc-v2.c
@@ -0,0 +1,79 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: arc-v2.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_arc_v2;
+static void
+initialize_tdesc_arc_v2 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("ARCv2"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.v2");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "gp", 26, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "fp", 27, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "sp", 28, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "ilink", 29, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "r30", 30, 1, "", 32, "int");
+ tdesc_create_reg (feature, "blink", 31, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "lp_count", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "pcl", 33, 1, "", 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
+ type = tdesc_create_flags (feature, "status32_type", 4);
+ tdesc_add_bitfield (type, "H", 0, 0);
+ tdesc_add_bitfield (type, "E", 1, 4);
+ tdesc_add_bitfield (type, "AE", 5, 5);
+ tdesc_add_bitfield (type, "DE", 6, 6);
+ tdesc_add_bitfield (type, "U", 7, 7);
+ tdesc_add_bitfield (type, "V", 8, 8);
+ tdesc_add_bitfield (type, "C", 9, 9);
+ tdesc_add_bitfield (type, "N", 10, 10);
+ tdesc_add_bitfield (type, "Z", 11, 11);
+ tdesc_add_bitfield (type, "L", 12, 12);
+ tdesc_add_bitfield (type, "DZ", 13, 13);
+ tdesc_add_bitfield (type, "SC", 14, 14);
+ tdesc_add_bitfield (type, "ES", 15, 15);
+ tdesc_add_bitfield (type, "RB", 16, 18);
+ tdesc_add_bitfield (type, "AD", 19, 19);
+ tdesc_add_bitfield (type, "US", 20, 20);
+ tdesc_add_bitfield (type, "IE", 31, 31);
+
+ tdesc_create_reg (feature, "pc", 34, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "status32", 35, 1, NULL, 32, "status32_type");
+
+ tdesc_arc_v2 = result;
+}
diff --git a/gdb/features/arc-v2.xml b/gdb/features/arc-v2.xml
new file mode 100644
index 0000000..7f06dde
--- /dev/null
+++ b/gdb/features/arc-v2.xml
@@ -0,0 +1,92 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2015-2016 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>arc:ARCv2</architecture>
+ <!-- No OSABI for bare metal. -->
+ <!-- No compatibility for ARC. -->
+
+ <feature name="org.gnu.gdb.arc.core.v2">
+ <reg name="r0" bitsize="32"/>
+ <reg name="r1" bitsize="32"/>
+ <reg name="r2" bitsize="32"/>
+ <reg name="r3" bitsize="32"/>
+ <reg name="r4" bitsize="32"/>
+ <reg name="r5" bitsize="32"/>
+ <reg name="r6" bitsize="32"/>
+ <reg name="r7" bitsize="32"/>
+ <reg name="r8" bitsize="32"/>
+ <reg name="r9" bitsize="32"/>
+ <reg name="r10" bitsize="32"/>
+ <reg name="r11" bitsize="32"/>
+ <reg name="r12" bitsize="32"/>
+ <reg name="r13" bitsize="32"/>
+ <reg name="r14" bitsize="32"/>
+ <reg name="r15" bitsize="32"/>
+ <reg name="r16" bitsize="32"/>
+ <reg name="r17" bitsize="32"/>
+ <reg name="r18" bitsize="32"/>
+ <reg name="r19" bitsize="32"/>
+ <reg name="r20" bitsize="32"/>
+ <reg name="r21" bitsize="32"/>
+ <reg name="r22" bitsize="32"/>
+ <reg name="r23" bitsize="32"/>
+ <reg name="r24" bitsize="32"/>
+ <reg name="r25" bitsize="32"/>
+
+ <!-- ARC core data pointer registers. -->
+ <reg name="gp" bitsize="32" type="data_ptr"/>
+ <reg name="fp" bitsize="32" type="data_ptr"/>
+ <reg name="sp" bitsize="32" type="data_ptr"/>
+
+ <!-- Code pointers. R30 is general purpose, but it used to be ILINK2 in
+ ARCompact, thus its odd position in between of special purpose registers.
+ GCC does't use this register, so it isn't a member of a general group. -->
+ <reg name="ilink" bitsize="32" type="code_ptr"/>
+ <reg name="r30" bitsize="32" group=""/>
+ <reg name="blink" bitsize="32" type="code_ptr"/>
+
+ <!-- Here goes extension core registers: r32 - r57. -->
+ <!-- Here goes ACCL/ACCH registers, r58, r59. -->
+
+ <!-- Loop counter. -->
+ <reg name="lp_count" bitsize="32" type="uint32"/>
+
+ <!-- r61 is a reserved register address. -->
+
+ <!-- r62 is a long immediate value, not a real register. -->
+
+ <!-- 4-byte aligned read-only program counter. -->
+ <reg name="pcl" bitsize="32" type="code_ptr" group=""/>
+ </feature>
+
+ <feature name="org.gnu.gdb.arc.aux-minimal">
+ <flags id="status32_type" size="4">
+ <field name="H" start="0" end="0"/>
+ <field name="E" start="1" end="4"/>
+ <field name="AE" start="5" end="5"/>
+ <field name="DE" start="6" end="6"/>
+ <field name="U" start="7" end="7"/>
+ <field name="V" start="8" end="8"/>
+ <field name="C" start="9" end="9"/>
+ <field name="N" start="10" end="10"/>
+ <field name="Z" start="11" end="11"/>
+ <field name="L" start="12" end="12"/>
+ <field name="DZ" start="13" end="13"/>
+ <field name="SC" start="14" end="14"/>
+ <field name="ES" start="15" end="15"/>
+ <field name="RB" start="16" end="18"/>
+ <field name="AD" start="19" end="19"/>
+ <field name="US" start="20" end="20"/>
+ <field name="IE" start="31" end="31"/>
+ </flags>
+
+ <reg name="pc" bitsize="32" type="code_ptr"/>
+ <reg name="status32" bitsize="32" type="status32_type"/>
+ </feature>
+</target>