diff options
| author | Daniel Jacobowitz <drow@false.org> | 2007-02-26 19:18:53 +0000 |
|---|---|---|
| committer | Daniel Jacobowitz <drow@false.org> | 2007-02-26 19:18:53 +0000 |
| commit | ff6f572f8b0a1f60246f90683e51635744cb7d36 (patch) | |
| tree | 767f7558e45be55165f29ab8de8da80163f9469e /gdb/features/xscale-iwmmxt.xml | |
| parent | 45d3b878abeec9aba15bde906804909c480fbb6f (diff) | |
| download | gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.zip gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.tar.gz gdb-ff6f572f8b0a1f60246f90683e51635744cb7d36.tar.bz2 | |
* arm-tdep.c (arm_scan_prologue): Do not record FPA register saves
if there are no FPA registers.
(arm_dwarf_reg_to_regnum): New function.
(arm_register_type, arm_register_name): Return minimal values for
unsupported registers.
(arm_register_sim_regno): Handle iWMMXt registers.
(arm_gdbarch_init): Record missing FPA registers if indicated by
a target description. Recognize iWMMXt registers. Only register
"info float" for FPA. Use ARM_NUM_REGS. Register
arm_dwarf_reg_to_regnum.
* arm-tdep.h (enum gdb_regnum): Add ARM_NUM_REGS and iWMMXt
constants.
(struct gdbarch_tdep): Add have_fpa_registers.
* features/xscale-iwmmxt.xml: Update capitalization.
* regformats/arm-with-iwmmxt.dat: Regenerated.
* src/gdb/doc/gdb.texinfo (Standard Target Features): Mention
case insensitivity.
(ARM Features): Describe org.gnu.gdb.xscale.iwmmxt.
* gdb.arch/iwmmxt-regs.c, gdb.arch/iwmmxt-regs.exp: Update
register capitalization.
Diffstat (limited to 'gdb/features/xscale-iwmmxt.xml')
| -rw-r--r-- | gdb/features/xscale-iwmmxt.xml | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/gdb/features/xscale-iwmmxt.xml b/gdb/features/xscale-iwmmxt.xml index 46fbf41..bedf1d7 100644 --- a/gdb/features/xscale-iwmmxt.xml +++ b/gdb/features/xscale-iwmmxt.xml @@ -17,28 +17,28 @@ <field name="u64" type="uint64"/> </union> - <reg name="wr0" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr1" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr2" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr3" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr4" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr5" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr6" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr7" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr8" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr9" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr10" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr11" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr12" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr13" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr14" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wr15" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR0" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR1" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR2" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR3" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR4" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR5" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR6" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR7" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR8" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR9" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR10" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR11" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR12" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR13" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR14" bitsize="64" type="iwmmxt_vec64i"/> + <reg name="wR15" bitsize="64" type="iwmmxt_vec64i"/> - <reg name="wcssf" bitsize="32" type="int" group="vector"/> - <reg name="wcasf" bitsize="32" type="int" group="vector"/> + <reg name="wCSSF" bitsize="32" type="int" group="vector"/> + <reg name="wCASF" bitsize="32" type="int" group="vector"/> - <reg name="wcgr0" bitsize="32" type="int" group="vector"/> - <reg name="wcgr1" bitsize="32" type="int" group="vector"/> - <reg name="wcgr2" bitsize="32" type="int" group="vector"/> - <reg name="wcgr3" bitsize="32" type="int" group="vector"/> + <reg name="wCGR0" bitsize="32" type="int" group="vector"/> + <reg name="wCGR1" bitsize="32" type="int" group="vector"/> + <reg name="wCGR2" bitsize="32" type="int" group="vector"/> + <reg name="wCGR3" bitsize="32" type="int" group="vector"/> </feature> |