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| author | Kevin Buettner <kevinb@redhat.com> | 2000-02-16 04:11:25 +0000 |
|---|---|---|
| committer | Kevin Buettner <kevinb@redhat.com> | 2000-02-16 04:11:25 +0000 |
| commit | 5e35df8e620de35759c79da38c1a3c686072d1e5 (patch) | |
| tree | 369e2ff0b5d0677ff94041a7775e43d8eaefce55 /gdb/doc/agentexpr.texi | |
| parent | e6f9e5140d81de60665cda044c8cd006058c0ada (diff) | |
| download | gdb-5e35df8e620de35759c79da38c1a3c686072d1e5.zip gdb-5e35df8e620de35759c79da38c1a3c686072d1e5.tar.gz gdb-5e35df8e620de35759c79da38c1a3c686072d1e5.tar.bz2 | |
Fix wording regarding Intel's IA-64 architecture.
Diffstat (limited to 'gdb/doc/agentexpr.texi')
| -rw-r--r-- | gdb/doc/agentexpr.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/doc/agentexpr.texi b/gdb/doc/agentexpr.texi index 4b790f5..5418667 100644 --- a/gdb/doc/agentexpr.texi +++ b/gdb/doc/agentexpr.texi @@ -798,7 +798,7 @@ When we add side-effects, we should add this. @item Why does the @code{reg} bytecode take a 16-bit register number? -Intel's IA64-architecture, Merced, has 128 general-purpose registers, +Intel's IA-64 architecture has 128 general-purpose registers, and 128 floating-point registers, and I'm sure it has some random control registers. |