From 5e35df8e620de35759c79da38c1a3c686072d1e5 Mon Sep 17 00:00:00 2001 From: Kevin Buettner Date: Wed, 16 Feb 2000 04:11:25 +0000 Subject: Fix wording regarding Intel's IA-64 architecture. --- gdb/doc/agentexpr.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gdb/doc/agentexpr.texi') diff --git a/gdb/doc/agentexpr.texi b/gdb/doc/agentexpr.texi index 4b790f5..5418667 100644 --- a/gdb/doc/agentexpr.texi +++ b/gdb/doc/agentexpr.texi @@ -798,7 +798,7 @@ When we add side-effects, we should add this. @item Why does the @code{reg} bytecode take a 16-bit register number? -Intel's IA64-architecture, Merced, has 128 general-purpose registers, +Intel's IA-64 architecture has 128 general-purpose registers, and 128 floating-point registers, and I'm sure it has some random control registers. -- cgit v1.1