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authorJiangshuai Li <jiangshuai_li@c-sky.com>2022-06-13 19:17:58 +0800
committerJiangshuai Li <jiangshuai_li@c-sky.com>2022-06-13 19:17:58 +0800
commitafd53c3c0a22528b9e56f599c4fd2cf6585ed8fa (patch)
tree56c6dc8b2e6f4bba42f9adace3d6412a59947bcc /gdb/csky-tdep.h
parentf25123df34b037c7f5b3f25eddb7baa1de2befef (diff)
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gdb:csky add support target-descriptions for CSKY arch
Registers in CSKY architecture included: 1. 32 gprs 2. 16 ars (alternative gprs used for quick interrupt) 3. hi, lo, pc 4. fr0~fr31, fcsr, fid, fesr 5. vr0~vr15 6. ((32 banks) * 32) cr regs (max 32 banks, 32 control regs a bank) For register names: Except over control registers, other registers, like gprs, hi, lo ... are fixed names. Among the 32*32 control registers, some used registers will have fixed names, others will have a default name "cpxcry". 'x' refers to bank, y refers index in the bank(a control register in bank 4 with index 14 will has a default name cp4cr14). For register numbers in GDB: We assign a fixed number to each register in GDB, like: r0~r31 with 0~31 hi, lo with 36, 37 fpu/vpu with 40~71 ... described in function csky_get_supported_register_by_index(). Function csky_get_supported_tdesc_registers_count(): To calculate the total number of registers that GDB can analyze, including those with fixed names and those with default register names. Function csky_get_supported_register_by_index(): To find a supported struct csky_supported_tdesc_register, return a struct include name with regnum via index. Arrays csky_supported_tdesc_feature_names[]: Include all supported feature names in tdesc-xmls. We use the information described above to load the register description file of the target from the stub. When loading, do a little check that whether the register description file contains SP, LR and PC.
Diffstat (limited to 'gdb/csky-tdep.h')
-rw-r--r--gdb/csky-tdep.h14
1 files changed, 11 insertions, 3 deletions
diff --git a/gdb/csky-tdep.h b/gdb/csky-tdep.h
index d0e5fc0..adfe9fa 100644
--- a/gdb/csky-tdep.h
+++ b/gdb/csky-tdep.h
@@ -51,9 +51,10 @@ enum csky_regnum
{
CSKY_R0_REGNUM = 0, /* General registers. */
CSKY_R15_REGNUM = 15,
+ CSKY_HI_REGNUM = 36,
+ CSKY_LO_REGNUM = 37,
CSKY_PC_REGNUM = 72,
- CSKY_HI_REGNUM = 20,
- CSKY_LO_REGNUM = 21,
+ CSKY_AR0_REGNUM = 73,
CSKY_CR0_REGNUM = 89,
CSKY_VBR_REGNUM = CSKY_CR0_REGNUM + 1,
CSKY_EPSR_REGNUM = CSKY_CR0_REGNUM + 2,
@@ -63,7 +64,8 @@ enum csky_regnum
/* Float register 0. */
CSKY_FR0_REGNUM = 40,
- CSKY_VCR0_REGNUM = 121,
+ CSKY_FR16_REGNUM = 1172,
+ CSKY_FCR_REGNUM = 121,
CSKY_MMU_REGNUM = 128,
CSKY_PROFCR_REGNUM = 140,
CSKY_PROFGR_REGNUM = 144,
@@ -93,6 +95,12 @@ enum csky_regnum
/* ICE registers. */
#define CSKY_CRBANK_NUM_REGS 32
+/* Tdesc registers essential check. */
+#define CSKY_TDESC_REGS_PC_NUMBERED (1 << 0)
+#define CSKY_TDESC_REGS_SP_NUMBERED (1 << 1)
+#define CSKY_TDESC_REGS_LR_NUMBERED (1 << 2)
+#define CSKY_TDESC_REGS_ESSENTIAL_VALUE (7)
+
/* Number of processor registers w/o ICE registers. */
#define CSKY_NUM_REGS (CSKY_MAX_REGS - CSKY_CRBANK_NUM_REGS)