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authorStan Shebs <shebs@codesourcery.com>1999-04-16 01:35:26 +0000
committerStan Shebs <shebs@codesourcery.com>1999-04-16 01:35:26 +0000
commitc906108c21474dfb4ed285bcc0ac6fe02cd400cc (patch)
treea0015aa5cedc19ccbab307251353a41722a3ae13 /gdb/config
parentcd946cff9ede3f30935803403f06f6ed30cad136 (diff)
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Initial creation of sourceware repositorygdb-4_18-branchpoint
Diffstat (limited to 'gdb/config')
-rw-r--r--gdb/config/a29k/a29k-kern.mt13
-rw-r--r--gdb/config/a29k/a29k-udi.mt5
-rw-r--r--gdb/config/a29k/a29k.mt5
-rw-r--r--gdb/config/a29k/nm-ultra3.h26
-rw-r--r--gdb/config/a29k/tm-a29k.h707
-rw-r--r--gdb/config/a29k/tm-ultra3.h226
-rw-r--r--gdb/config/a29k/tm-vx29k.h229
-rw-r--r--gdb/config/a29k/ultra3.mh13
-rw-r--r--gdb/config/a29k/ultra3.mt6
-rw-r--r--gdb/config/a29k/vx29k.mt4
-rw-r--r--gdb/config/a29k/xm-ultra3.h52
-rw-r--r--gdb/config/alpha/alpha-linux.mh9
-rw-r--r--gdb/config/alpha/alpha-linux.mt3
-rw-r--r--gdb/config/alpha/alpha-osf1.mh5
-rw-r--r--gdb/config/alpha/alpha-osf1.mt3
-rw-r--r--gdb/config/alpha/alpha-osf2.mh5
-rw-r--r--gdb/config/alpha/alpha-osf3.mh5
-rw-r--r--gdb/config/alpha/nm-linux.h66
-rw-r--r--gdb/config/alpha/nm-osf.h56
-rw-r--r--gdb/config/alpha/nm-osf2.h54
-rw-r--r--gdb/config/alpha/nm-osf3.h26
-rw-r--r--gdb/config/alpha/tm-alpha.h479
-rw-r--r--gdb/config/alpha/tm-alphalinux.h80
-rw-r--r--gdb/config/alpha/xm-alphalinux.h29
-rw-r--r--gdb/config/alpha/xm-alphaosf.h27
-rw-r--r--gdb/config/arc/arc.mt3
-rw-r--r--gdb/config/arc/tm-arc.h347
-rw-r--r--gdb/config/arm/arm.mh5
-rw-r--r--gdb/config/arm/arm.mt6
-rw-r--r--gdb/config/arm/nm-arm.h27
-rw-r--r--gdb/config/arm/tm-arm.h453
-rw-r--r--gdb/config/arm/xm-arm.h76
-rw-r--r--gdb/config/convex/Convex.notes163
-rw-r--r--gdb/config/convex/convex.mh3
-rw-r--r--gdb/config/convex/convex.mt3
-rw-r--r--gdb/config/convex/tm-convex.h511
-rw-r--r--gdb/config/convex/xm-convex.h35
-rw-r--r--gdb/config/d10v/d10v.mt5
-rw-r--r--gdb/config/d10v/tm-d10v.h337
-rw-r--r--gdb/config/d30v/d30v.mt5
-rw-r--r--gdb/config/d30v/tm-d30v.h325
-rw-r--r--gdb/config/fr30/fr30.mt5
-rw-r--r--gdb/config/fr30/tm-fr30.h232
-rw-r--r--gdb/config/gould/np1.mh3
-rw-r--r--gdb/config/gould/np1.mt3
-rw-r--r--gdb/config/gould/pn.mh3
-rw-r--r--gdb/config/gould/pn.mt3
-rw-r--r--gdb/config/gould/tm-np1.h490
-rw-r--r--gdb/config/gould/tm-pn.h409
-rw-r--r--gdb/config/gould/xm-np1.h94
-rw-r--r--gdb/config/gould/xm-pn.h87
-rw-r--r--gdb/config/h8300/h8300.mt6
-rw-r--r--gdb/config/h8300/tm-h8300.h303
-rw-r--r--gdb/config/h8500/h8500.mt6
-rw-r--r--gdb/config/h8500/tm-h8500.h293
-rw-r--r--gdb/config/i386/cygwin.mh6
-rw-r--r--gdb/config/i386/cygwin.mt6
-rw-r--r--gdb/config/i386/fbsd.mh5
-rw-r--r--gdb/config/i386/fbsd.mt3
-rw-r--r--gdb/config/i386/gdbserve.mt3
-rw-r--r--gdb/config/i386/go32.mh8
-rw-r--r--gdb/config/i386/i386aix.mh10
-rw-r--r--gdb/config/i386/i386aix.mt7
-rw-r--r--gdb/config/i386/i386aout.mt3
-rw-r--r--gdb/config/i386/i386bsd.mh7
-rw-r--r--gdb/config/i386/i386bsd.mt3
-rw-r--r--gdb/config/i386/i386dgux.mh9
-rw-r--r--gdb/config/i386/i386gnu.mh31
-rw-r--r--gdb/config/i386/i386gnu.mt3
-rw-r--r--gdb/config/i386/i386lynx.mh11
-rw-r--r--gdb/config/i386/i386lynx.mt3
-rw-r--r--gdb/config/i386/i386m3.mh7
-rw-r--r--gdb/config/i386/i386m3.mt3
-rw-r--r--gdb/config/i386/i386mach.mh10
-rw-r--r--gdb/config/i386/i386mk.mh4
-rw-r--r--gdb/config/i386/i386mk.mt6
-rw-r--r--gdb/config/i386/i386nw.mt3
-rw-r--r--gdb/config/i386/i386os9k.mt3
-rw-r--r--gdb/config/i386/i386sco.mh13
-rw-r--r--gdb/config/i386/i386sco4.mh12
-rw-r--r--gdb/config/i386/i386sco5.mh17
-rw-r--r--gdb/config/i386/i386sco5.mt3
-rw-r--r--gdb/config/i386/i386sol2.mh7
-rw-r--r--gdb/config/i386/i386sol2.mt3
-rw-r--r--gdb/config/i386/i386v.mh8
-rw-r--r--gdb/config/i386/i386v.mt3
-rw-r--r--gdb/config/i386/i386v32.mh9
-rw-r--r--gdb/config/i386/i386v4.mh9
-rw-r--r--gdb/config/i386/i386v4.mt3
-rw-r--r--gdb/config/i386/i386v42mp.mh11
-rw-r--r--gdb/config/i386/i386v42mp.mt3
-rw-r--r--gdb/config/i386/linux.mh7
-rw-r--r--gdb/config/i386/linux.mt5
-rw-r--r--gdb/config/i386/nbsd.mh5
-rw-r--r--gdb/config/i386/nbsd.mt3
-rw-r--r--gdb/config/i386/ncr3000.mh16
-rw-r--r--gdb/config/i386/ncr3000.mt3
-rw-r--r--gdb/config/i386/nm-fbsd.h98
-rw-r--r--gdb/config/i386/nm-gnu.h22
-rw-r--r--gdb/config/i386/nm-i386aix.h42
-rw-r--r--gdb/config/i386/nm-i386bsd.h39
-rw-r--r--gdb/config/i386/nm-i386lynx.h25
-rw-r--r--gdb/config/i386/nm-i386mach.h26
-rw-r--r--gdb/config/i386/nm-i386sco.h41
-rw-r--r--gdb/config/i386/nm-i386sco4.h32
-rw-r--r--gdb/config/i386/nm-i386sco5.h39
-rw-r--r--gdb/config/i386/nm-i386sol2.h35
-rw-r--r--gdb/config/i386/nm-i386v.h36
-rw-r--r--gdb/config/i386/nm-i386v4.h24
-rw-r--r--gdb/config/i386/nm-i386v42mp.h22
-rw-r--r--gdb/config/i386/nm-linux.h73
-rw-r--r--gdb/config/i386/nm-m3.h22
-rw-r--r--gdb/config/i386/nm-nbsd.h34
-rw-r--r--gdb/config/i386/nm-ptx4.h62
-rw-r--r--gdb/config/i386/nm-sun386.h27
-rw-r--r--gdb/config/i386/nm-symmetry.h46
-rw-r--r--gdb/config/i386/ptx.mh7
-rw-r--r--gdb/config/i386/ptx.mt3
-rw-r--r--gdb/config/i386/ptx4.mh7
-rw-r--r--gdb/config/i386/ptx4.mt3
-rw-r--r--gdb/config/i386/sun386.mh5
-rw-r--r--gdb/config/i386/sun386.mt3
-rw-r--r--gdb/config/i386/symmetry.mh5
-rw-r--r--gdb/config/i386/symmetry.mt3
-rw-r--r--gdb/config/i386/tm-cygwin.h127
-rw-r--r--gdb/config/i386/tm-fbsd.h32
-rw-r--r--gdb/config/i386/tm-i386.h307
-rw-r--r--gdb/config/i386/tm-i386aix.h67
-rw-r--r--gdb/config/i386/tm-i386bsd.h43
-rw-r--r--gdb/config/i386/tm-i386gnu.h48
-rw-r--r--gdb/config/i386/tm-i386lynx.h33
-rw-r--r--gdb/config/i386/tm-i386m3.h60
-rw-r--r--gdb/config/i386/tm-i386mk.h25
-rw-r--r--gdb/config/i386/tm-i386nw.h49
-rw-r--r--gdb/config/i386/tm-i386os9k.h63
-rw-r--r--gdb/config/i386/tm-i386sco5.h62
-rw-r--r--gdb/config/i386/tm-i386sol2.h64
-rw-r--r--gdb/config/i386/tm-i386v.h163
-rw-r--r--gdb/config/i386/tm-i386v4.h78
-rw-r--r--gdb/config/i386/tm-i386v42mp.h44
-rw-r--r--gdb/config/i386/tm-linux.h38
-rw-r--r--gdb/config/i386/tm-nbsd.h42
-rw-r--r--gdb/config/i386/tm-ptx.h232
-rw-r--r--gdb/config/i386/tm-ptx4.h24
-rw-r--r--gdb/config/i386/tm-sun386.h205
-rw-r--r--gdb/config/i386/tm-symmetry.h321
-rw-r--r--gdb/config/i386/xm-cygwin.h34
-rw-r--r--gdb/config/i386/xm-go32.h31
-rw-r--r--gdb/config/i386/xm-i386aix.h33
-rw-r--r--gdb/config/i386/xm-i386bsd.h22
-rw-r--r--gdb/config/i386/xm-i386gnu.h23
-rw-r--r--gdb/config/i386/xm-i386lynx.h24
-rw-r--r--gdb/config/i386/xm-i386m3.h33
-rw-r--r--gdb/config/i386/xm-i386mach.h30
-rw-r--r--gdb/config/i386/xm-i386mk.h25
-rw-r--r--gdb/config/i386/xm-i386sco.h42
-rw-r--r--gdb/config/i386/xm-i386v.h45
-rw-r--r--gdb/config/i386/xm-i386v32.h24
-rw-r--r--gdb/config/i386/xm-i386v4.h27
-rw-r--r--gdb/config/i386/xm-linux.h36
-rw-r--r--gdb/config/i386/xm-nbsd.h21
-rw-r--r--gdb/config/i386/xm-ptx.h41
-rw-r--r--gdb/config/i386/xm-ptx4.h25
-rw-r--r--gdb/config/i386/xm-sun386.h20
-rw-r--r--gdb/config/i386/xm-symmetry.h28
-rw-r--r--gdb/config/i386/xm-windows.h35
-rw-r--r--gdb/config/i960/mon960.mt6
-rw-r--r--gdb/config/i960/nindy960.mt3
-rw-r--r--gdb/config/i960/tm-i960.h372
-rw-r--r--gdb/config/i960/tm-mon960.h70
-rw-r--r--gdb/config/i960/tm-nindy960.h106
-rw-r--r--gdb/config/i960/tm-vx960.h53
-rw-r--r--gdb/config/i960/vxworks960.mt6
-rw-r--r--gdb/config/m32r/m32r.mt7
-rw-r--r--gdb/config/m32r/tm-m32r.h234
-rw-r--r--gdb/config/m68k/3b1.mh12
-rw-r--r--gdb/config/m68k/3b1.mt3
-rw-r--r--gdb/config/m68k/altos.mh5
-rw-r--r--gdb/config/m68k/altos.mt3
-rw-r--r--gdb/config/m68k/apollo68b.mh6
-rw-r--r--gdb/config/m68k/apollo68b.mt3
-rw-r--r--gdb/config/m68k/apollo68v.mh11
-rw-r--r--gdb/config/m68k/cisco.mt3
-rw-r--r--gdb/config/m68k/delta68.mh5
-rw-r--r--gdb/config/m68k/delta68.mt3
-rw-r--r--gdb/config/m68k/dpx2.mh7
-rw-r--r--gdb/config/m68k/dpx2.mt3
-rw-r--r--gdb/config/m68k/es1800.mt9
-rw-r--r--gdb/config/m68k/hp300bsd.mh7
-rw-r--r--gdb/config/m68k/hp300bsd.mt3
-rw-r--r--gdb/config/m68k/hp300hpux.mh8
-rw-r--r--gdb/config/m68k/hp300hpux.mt8
-rw-r--r--gdb/config/m68k/isi.mh5
-rw-r--r--gdb/config/m68k/isi.mt3
-rw-r--r--gdb/config/m68k/linux.mh9
-rw-r--r--gdb/config/m68k/linux.mt3
-rw-r--r--gdb/config/m68k/m68klynx.mh11
-rw-r--r--gdb/config/m68k/m68klynx.mt4
-rw-r--r--gdb/config/m68k/m68kv4.mh7
-rw-r--r--gdb/config/m68k/m68kv4.mt3
-rw-r--r--gdb/config/m68k/monitor.mt3
-rw-r--r--gdb/config/m68k/nbsd.mh5
-rw-r--r--gdb/config/m68k/nbsd.mt3
-rw-r--r--gdb/config/m68k/news.mh5
-rw-r--r--gdb/config/m68k/news.mt3
-rw-r--r--gdb/config/m68k/news1000.mh3
-rw-r--r--gdb/config/m68k/nm-apollo68b.h41
-rw-r--r--gdb/config/m68k/nm-apollo68v.h20
-rw-r--r--gdb/config/m68k/nm-delta68.h21
-rw-r--r--gdb/config/m68k/nm-dpx2.h29
-rw-r--r--gdb/config/m68k/nm-hp300bsd.h88
-rw-r--r--gdb/config/m68k/nm-hp300hpux.h53
-rw-r--r--gdb/config/m68k/nm-linux.h47
-rw-r--r--gdb/config/m68k/nm-m68klynx.h25
-rw-r--r--gdb/config/m68k/nm-nbsd.h21
-rw-r--r--gdb/config/m68k/nm-news.h26
-rw-r--r--gdb/config/m68k/nm-sun2.h33
-rw-r--r--gdb/config/m68k/nm-sun3.h31
-rw-r--r--gdb/config/m68k/nm-sysv4.h22
-rw-r--r--gdb/config/m68k/os68k.mt3
-rw-r--r--gdb/config/m68k/st2000.mt3
-rw-r--r--gdb/config/m68k/sun2os3.mh5
-rw-r--r--gdb/config/m68k/sun2os3.mt7
-rw-r--r--gdb/config/m68k/sun2os4.mh5
-rw-r--r--gdb/config/m68k/sun2os4.mt3
-rw-r--r--gdb/config/m68k/sun3os3.mh5
-rw-r--r--gdb/config/m68k/sun3os3.mt8
-rw-r--r--gdb/config/m68k/sun3os4.mh6
-rw-r--r--gdb/config/m68k/sun3os4.mt3
-rw-r--r--gdb/config/m68k/tm-3b1.h32
-rw-r--r--gdb/config/m68k/tm-altos.h57
-rw-r--r--gdb/config/m68k/tm-apollo68b.h59
-rw-r--r--gdb/config/m68k/tm-cisco.h55
-rw-r--r--gdb/config/m68k/tm-delta68.h103
-rw-r--r--gdb/config/m68k/tm-dpx2.h33
-rw-r--r--gdb/config/m68k/tm-es1800.h59
-rw-r--r--gdb/config/m68k/tm-hp300bsd.h62
-rw-r--r--gdb/config/m68k/tm-hp300hpux.h31
-rw-r--r--gdb/config/m68k/tm-isi.h150
-rw-r--r--gdb/config/m68k/tm-linux.h109
-rw-r--r--gdb/config/m68k/tm-m68k.h393
-rw-r--r--gdb/config/m68k/tm-m68klynx.h38
-rw-r--r--gdb/config/m68k/tm-m68kv4.h70
-rw-r--r--gdb/config/m68k/tm-mac.h20
-rw-r--r--gdb/config/m68k/tm-monitor.h44
-rw-r--r--gdb/config/m68k/tm-nbsd.h41
-rw-r--r--gdb/config/m68k/tm-news.h75
-rw-r--r--gdb/config/m68k/tm-os68k.h46
-rw-r--r--gdb/config/m68k/tm-st2000.h20
-rw-r--r--gdb/config/m68k/tm-sun2.h23
-rw-r--r--gdb/config/m68k/tm-sun2os4.h20
-rw-r--r--gdb/config/m68k/tm-sun3.h107
-rw-r--r--gdb/config/m68k/tm-sun3os4.h21
-rw-r--r--gdb/config/m68k/tm-vx68.h91
-rw-r--r--gdb/config/m68k/vxworks68.mt3
-rw-r--r--gdb/config/m68k/xm-3b1.h85
-rw-r--r--gdb/config/m68k/xm-altos.h202
-rw-r--r--gdb/config/m68k/xm-apollo68b.h24
-rw-r--r--gdb/config/m68k/xm-apollo68v.h44
-rw-r--r--gdb/config/m68k/xm-delta68.h36
-rw-r--r--gdb/config/m68k/xm-dpx2.h26
-rw-r--r--gdb/config/m68k/xm-hp300bsd.h85
-rw-r--r--gdb/config/m68k/xm-hp300hpux.h150
-rw-r--r--gdb/config/m68k/xm-isi.h92
-rw-r--r--gdb/config/m68k/xm-linux.h40
-rw-r--r--gdb/config/m68k/xm-m68k.h22
-rw-r--r--gdb/config/m68k/xm-m68klynx.h24
-rw-r--r--gdb/config/m68k/xm-m68kv4.h28
-rw-r--r--gdb/config/m68k/xm-mpw.h24
-rw-r--r--gdb/config/m68k/xm-nbsd.h21
-rw-r--r--gdb/config/m68k/xm-news.h137
-rw-r--r--gdb/config/m68k/xm-news1000.h26
-rw-r--r--gdb/config/m68k/xm-sun2.h78
-rw-r--r--gdb/config/m68k/xm-sun3.h73
-rw-r--r--gdb/config/m68k/xm-sun3os4.h21
-rw-r--r--gdb/config/m88k/cxux.mh7
-rw-r--r--gdb/config/m88k/cxux.mt3
-rw-r--r--gdb/config/m88k/delta88.mh7
-rw-r--r--gdb/config/m88k/delta88.mt3
-rw-r--r--gdb/config/m88k/delta88v4.mh7
-rw-r--r--gdb/config/m88k/delta88v4.mt3
-rw-r--r--gdb/config/m88k/m88k.mh5
-rw-r--r--gdb/config/m88k/m88k.mt3
-rw-r--r--gdb/config/m88k/nm-cxux.h32
-rw-r--r--gdb/config/m88k/nm-delta88v4.h21
-rw-r--r--gdb/config/m88k/nm-m88k.h24
-rw-r--r--gdb/config/m88k/tm-cxux.h59
-rw-r--r--gdb/config/m88k/tm-delta88.h26
-rw-r--r--gdb/config/m88k/tm-delta88v4.h30
-rw-r--r--gdb/config/m88k/tm-m88k.h620
-rw-r--r--gdb/config/m88k/xm-cxux.h66
-rw-r--r--gdb/config/m88k/xm-delta88.h45
-rw-r--r--gdb/config/m88k/xm-delta88v4.h22
-rw-r--r--gdb/config/m88k/xm-dgux.h58
-rw-r--r--gdb/config/m88k/xm-m88k.h20
-rw-r--r--gdb/config/mips/bigmips.mt3
-rw-r--r--gdb/config/mips/bigmips64.mt3
-rw-r--r--gdb/config/mips/decstation.mh5
-rw-r--r--gdb/config/mips/decstation.mt3
-rw-r--r--gdb/config/mips/embed.mt5
-rw-r--r--gdb/config/mips/embed64.mt5
-rw-r--r--gdb/config/mips/embedl.mt5
-rw-r--r--gdb/config/mips/embedl64.mt5
-rw-r--r--gdb/config/mips/irix3.mh6
-rw-r--r--gdb/config/mips/irix3.mt3
-rw-r--r--gdb/config/mips/irix4.mh8
-rw-r--r--gdb/config/mips/irix5.mh6
-rw-r--r--gdb/config/mips/irix5.mt3
-rw-r--r--gdb/config/mips/littlemips.mh3
-rw-r--r--gdb/config/mips/littlemips.mt3
-rw-r--r--gdb/config/mips/mipsm3.mh7
-rw-r--r--gdb/config/mips/mipsm3.mt4
-rw-r--r--gdb/config/mips/mipsv4.mh4
-rw-r--r--gdb/config/mips/mipsv4.mt3
-rw-r--r--gdb/config/mips/news-mips.mh4
-rw-r--r--gdb/config/mips/nm-irix3.h37
-rw-r--r--gdb/config/mips/nm-irix4.h61
-rw-r--r--gdb/config/mips/nm-irix5.h44
-rw-r--r--gdb/config/mips/nm-mips.h32
-rw-r--r--gdb/config/mips/nm-news-mips.h42
-rw-r--r--gdb/config/mips/nm-riscos.h59
-rw-r--r--gdb/config/mips/riscos.mh16
-rw-r--r--gdb/config/mips/tm-bigmips.h21
-rw-r--r--gdb/config/mips/tm-bigmips64.h23
-rw-r--r--gdb/config/mips/tm-embed.h49
-rw-r--r--gdb/config/mips/tm-embed64.h21
-rw-r--r--gdb/config/mips/tm-embedl.h21
-rw-r--r--gdb/config/mips/tm-embedl64.h21
-rw-r--r--gdb/config/mips/tm-irix3.h81
-rw-r--r--gdb/config/mips/tm-irix5.h75
-rw-r--r--gdb/config/mips/tm-mips.h560
-rw-r--r--gdb/config/mips/tm-mips64.h54
-rw-r--r--gdb/config/mips/tm-mipsm3.h66
-rw-r--r--gdb/config/mips/tm-mipsv4.h45
-rw-r--r--gdb/config/mips/tm-tx39.h39
-rw-r--r--gdb/config/mips/tm-tx39l.h39
-rw-r--r--gdb/config/mips/tm-vr4100.h25
-rw-r--r--gdb/config/mips/tm-vr4300.h22
-rw-r--r--gdb/config/mips/tm-vr4300el.h22
-rw-r--r--gdb/config/mips/tm-vr5000.h23
-rw-r--r--gdb/config/mips/tm-vr5000el.h23
-rw-r--r--gdb/config/mips/tm-vxmips.h31
-rw-r--r--gdb/config/mips/tx39.mt5
-rw-r--r--gdb/config/mips/tx39l.mt5
-rw-r--r--gdb/config/mips/vr4100.mt5
-rw-r--r--gdb/config/mips/vr4300.mt5
-rw-r--r--gdb/config/mips/vr4300el.mt5
-rw-r--r--gdb/config/mips/vr5000.mt7
-rw-r--r--gdb/config/mips/vr5000el.mt5
-rw-r--r--gdb/config/mips/vxmips.mt3
-rw-r--r--gdb/config/mips/xm-irix3.h31
-rw-r--r--gdb/config/mips/xm-irix4.h33
-rw-r--r--gdb/config/mips/xm-irix5.h35
-rw-r--r--gdb/config/mips/xm-mips.h61
-rw-r--r--gdb/config/mips/xm-mipsm3.h32
-rw-r--r--gdb/config/mips/xm-mipsv4.h23
-rw-r--r--gdb/config/mips/xm-news-mips.h24
-rw-r--r--gdb/config/mips/xm-riscos.h28
-rw-r--r--gdb/config/mn10200/mn10200.mt6
-rw-r--r--gdb/config/mn10200/tm-mn10200.h212
-rw-r--r--gdb/config/mn10300/mn10300.mt6
-rw-r--r--gdb/config/mn10300/tm-mn10300.h165
-rw-r--r--gdb/config/nm-empty.h2
-rw-r--r--gdb/config/nm-gnu.h45
-rw-r--r--gdb/config/nm-lynx.h83
-rw-r--r--gdb/config/nm-m3.h123
-rw-r--r--gdb/config/nm-nbsd.h86
-rw-r--r--gdb/config/nm-sysv4.h33
-rw-r--r--gdb/config/none/nm-none.h18
-rw-r--r--gdb/config/none/none.mh5
-rw-r--r--gdb/config/none/none.mt4
-rw-r--r--gdb/config/none/tm-none.h23
-rw-r--r--gdb/config/none/xm-none.h18
-rw-r--r--gdb/config/ns32k/merlin.mh16
-rw-r--r--gdb/config/ns32k/merlin.mt3
-rw-r--r--gdb/config/ns32k/nbsd.mh5
-rw-r--r--gdb/config/ns32k/nbsd.mt3
-rw-r--r--gdb/config/ns32k/nm-nbsd.h36
-rw-r--r--gdb/config/ns32k/nm-umax.h54
-rw-r--r--gdb/config/ns32k/ns32km3.mh7
-rw-r--r--gdb/config/ns32k/ns32km3.mt3
-rw-r--r--gdb/config/ns32k/tm-merlin.h313
-rw-r--r--gdb/config/ns32k/tm-nbsd.h79
-rw-r--r--gdb/config/ns32k/tm-ns32km3.h73
-rw-r--r--gdb/config/ns32k/tm-umax.h370
-rw-r--r--gdb/config/ns32k/umax.mh5
-rw-r--r--gdb/config/ns32k/umax.mt3
-rw-r--r--gdb/config/ns32k/xm-merlin.h65
-rw-r--r--gdb/config/ns32k/xm-nbsd.h21
-rw-r--r--gdb/config/ns32k/xm-ns32km3.h23
-rw-r--r--gdb/config/ns32k/xm-umax.h26
-rw-r--r--gdb/config/pa/hppabsd.mh7
-rw-r--r--gdb/config/pa/hppabsd.mt3
-rw-r--r--gdb/config/pa/hppahpux.mh9
-rw-r--r--gdb/config/pa/hppahpux.mt3
-rw-r--r--gdb/config/pa/hppaosf.mh9
-rw-r--r--gdb/config/pa/hppaosf.mt3
-rw-r--r--gdb/config/pa/hppapro.mt3
-rw-r--r--gdb/config/pa/hpux1020.mh11
-rw-r--r--gdb/config/pa/hpux1020.mt3
-rw-r--r--gdb/config/pa/hpux1100.mh11
-rw-r--r--gdb/config/pa/hpux1100.mt3
-rw-r--r--gdb/config/pa/nm-hppab.h135
-rw-r--r--gdb/config/pa/nm-hppah.h281
-rw-r--r--gdb/config/pa/nm-hppah11.h22
-rw-r--r--gdb/config/pa/nm-hppao.h56
-rw-r--r--gdb/config/pa/tm-hppa.h788
-rw-r--r--gdb/config/pa/tm-hppab.h47
-rw-r--r--gdb/config/pa/tm-hppah.h79
-rw-r--r--gdb/config/pa/tm-hppao.h96
-rw-r--r--gdb/config/pa/tm-pro.h14
-rw-r--r--gdb/config/pa/xm-hppab.h27
-rw-r--r--gdb/config/pa/xm-hppah.h49
-rw-r--r--gdb/config/pa/xm-pa.h5
-rw-r--r--gdb/config/powerpc/aix.mh11
-rw-r--r--gdb/config/powerpc/aix.mt3
-rw-r--r--gdb/config/powerpc/cygwin.mh5
-rw-r--r--gdb/config/powerpc/cygwin.mt6
-rw-r--r--gdb/config/powerpc/gdbserve.mt3
-rw-r--r--gdb/config/powerpc/linux.mh10
-rw-r--r--gdb/config/powerpc/macos.mh4
-rw-r--r--gdb/config/powerpc/macos.mt3
-rw-r--r--gdb/config/powerpc/nm-aix.h22
-rw-r--r--gdb/config/powerpc/nm-macos.h20
-rw-r--r--gdb/config/powerpc/nm-solaris.h30
-rw-r--r--gdb/config/powerpc/ppc-eabi.mt3
-rw-r--r--gdb/config/powerpc/ppc-nw.mt3
-rw-r--r--gdb/config/powerpc/ppc-sim.mt6
-rw-r--r--gdb/config/powerpc/ppcle-eabi.mt3
-rw-r--r--gdb/config/powerpc/ppcle-sim.mt6
-rw-r--r--gdb/config/powerpc/solaris.mh18
-rw-r--r--gdb/config/powerpc/solaris.mt3
-rw-r--r--gdb/config/powerpc/tm-cygwin.h21
-rw-r--r--gdb/config/powerpc/tm-macos.h26
-rw-r--r--gdb/config/powerpc/tm-ppc-aix.h28
-rw-r--r--gdb/config/powerpc/tm-ppc-eabi.h84
-rw-r--r--gdb/config/powerpc/tm-ppc-nw.h31
-rw-r--r--gdb/config/powerpc/tm-ppc-sim.h26
-rw-r--r--gdb/config/powerpc/tm-ppcle-eabi.h30
-rw-r--r--gdb/config/powerpc/tm-ppcle-sim.h26
-rw-r--r--gdb/config/powerpc/tm-solaris.h74
-rw-r--r--gdb/config/powerpc/xm-aix.h30
-rw-r--r--gdb/config/powerpc/xm-cygwin.h32
-rw-r--r--gdb/config/powerpc/xm-linux.h21
-rw-r--r--gdb/config/powerpc/xm-mpw.h22
-rw-r--r--gdb/config/powerpc/xm-solaris.h21
-rw-r--r--gdb/config/pyr/pyramid.mh8
-rw-r--r--gdb/config/pyr/pyramid.mt3
-rw-r--r--gdb/config/pyr/tm-pyr.h483
-rw-r--r--gdb/config/pyr/xm-pyr.h92
-rw-r--r--gdb/config/romp/rtbsd.mh8
-rw-r--r--gdb/config/romp/xm-rtbsd.h40
-rw-r--r--gdb/config/rs6000/aix4.mh11
-rw-r--r--gdb/config/rs6000/aix4.mt3
-rw-r--r--gdb/config/rs6000/nm-rs6000.h60
-rw-r--r--gdb/config/rs6000/nm-rs6000ly.h25
-rw-r--r--gdb/config/rs6000/rs6000.mh11
-rw-r--r--gdb/config/rs6000/rs6000.mt3
-rw-r--r--gdb/config/rs6000/rs6000lynx.mh11
-rw-r--r--gdb/config/rs6000/rs6000lynx.mt3
-rw-r--r--gdb/config/rs6000/tm-rs6000-aix4.h26
-rw-r--r--gdb/config/rs6000/tm-rs6000.h564
-rw-r--r--gdb/config/rs6000/tm-rs6000ly.h32
-rw-r--r--gdb/config/rs6000/xm-aix4.h26
-rw-r--r--gdb/config/rs6000/xm-rs6000.h107
-rw-r--r--gdb/config/rs6000/xm-rs6000ly.h29
-rw-r--r--gdb/config/sh/sh.mt6
-rw-r--r--gdb/config/sh/tm-sh.h281
-rw-r--r--gdb/config/sparc/linux.mh7
-rw-r--r--gdb/config/sparc/linux.mt3
-rw-r--r--gdb/config/sparc/nbsd.mh6
-rw-r--r--gdb/config/sparc/nbsd.mt3
-rw-r--r--gdb/config/sparc/nm-linux.h31
-rw-r--r--gdb/config/sparc/nm-nbsd.h57
-rw-r--r--gdb/config/sparc/nm-sparclynx.h25
-rw-r--r--gdb/config/sparc/nm-sun4os4.h35
-rw-r--r--gdb/config/sparc/nm-sun4sol2.h45
-rw-r--r--gdb/config/sparc/sp64.mt9
-rw-r--r--gdb/config/sparc/sp64sim.mt13
-rw-r--r--gdb/config/sparc/sp64sol2.mt3
-rw-r--r--gdb/config/sparc/sparc-em.mt3
-rw-r--r--gdb/config/sparc/sparclet.mt3
-rw-r--r--gdb/config/sparc/sparclite.mt5
-rw-r--r--gdb/config/sparc/sparclynx.mh11
-rw-r--r--gdb/config/sparc/sparclynx.mt3
-rw-r--r--gdb/config/sparc/sun4os4.mh11
-rw-r--r--gdb/config/sparc/sun4os4.mt3
-rw-r--r--gdb/config/sparc/sun4sol2.mh18
-rw-r--r--gdb/config/sparc/sun4sol2.mt3
-rw-r--r--gdb/config/sparc/tm-linux.h29
-rw-r--r--gdb/config/sparc/tm-nbsd.h27
-rw-r--r--gdb/config/sparc/tm-sp64.h378
-rw-r--r--gdb/config/sparc/tm-sp64sim.h50
-rw-r--r--gdb/config/sparc/tm-sparc.h584
-rw-r--r--gdb/config/sparc/tm-sparclet.h132
-rw-r--r--gdb/config/sparc/tm-sparclite.h98
-rw-r--r--gdb/config/sparc/tm-sparclynx.h36
-rw-r--r--gdb/config/sparc/tm-spc-em.h46
-rw-r--r--gdb/config/sparc/tm-sun4os4.h58
-rw-r--r--gdb/config/sparc/tm-sun4sol2.h94
-rw-r--r--gdb/config/sparc/tm-vxsparc.h36
-rw-r--r--gdb/config/sparc/vxsparc.mt3
-rw-r--r--gdb/config/sparc/xm-linux.h48
-rw-r--r--gdb/config/sparc/xm-nbsd.h21
-rw-r--r--gdb/config/sparc/xm-sparc.h22
-rw-r--r--gdb/config/sparc/xm-sparclynx.h24
-rw-r--r--gdb/config/sparc/xm-sun4os4.h34
-rw-r--r--gdb/config/sparc/xm-sun4sol2.h49
-rw-r--r--gdb/config/tahoe/tahoe.mh4
-rw-r--r--gdb/config/tahoe/tahoe.mt3
-rw-r--r--gdb/config/tahoe/tm-tahoe.h289
-rw-r--r--gdb/config/tahoe/xm-tahoe.h136
-rw-r--r--gdb/config/tm-lynx.h34
-rw-r--r--gdb/config/tm-nbsd.h19
-rw-r--r--gdb/config/tm-sunos.h31
-rw-r--r--gdb/config/tm-sysv4.h45
-rw-r--r--gdb/config/v850/tm-v850.h174
-rw-r--r--gdb/config/v850/v850.mt5
-rw-r--r--gdb/config/vax/nm-vax.h28
-rw-r--r--gdb/config/vax/tm-vax.h330
-rw-r--r--gdb/config/vax/vax.mt3
-rw-r--r--gdb/config/vax/vaxbsd.mh13
-rw-r--r--gdb/config/vax/vaxult.mh7
-rw-r--r--gdb/config/vax/vaxult2.mh7
-rw-r--r--gdb/config/vax/xm-vax.h81
-rw-r--r--gdb/config/vax/xm-vaxbsd.h10
-rw-r--r--gdb/config/vax/xm-vaxult.h12
-rw-r--r--gdb/config/vax/xm-vaxult2.h11
-rw-r--r--gdb/config/w65/tm-w65.h213
-rw-r--r--gdb/config/w65/w65.mt8
-rw-r--r--gdb/config/xm-aix4.h99
-rw-r--r--gdb/config/xm-lynx.h20
-rw-r--r--gdb/config/xm-mpw.h81
-rw-r--r--gdb/config/xm-nbsd.h32
-rw-r--r--gdb/config/xm-sysv4.h39
-rw-r--r--gdb/config/z8k/tm-z8k.h287
-rw-r--r--gdb/config/z8k/z8k.mt7
537 files changed, 27866 insertions, 0 deletions
diff --git a/gdb/config/a29k/a29k-kern.mt b/gdb/config/a29k/a29k-kern.mt
new file mode 100644
index 0000000..f1a2e52
--- /dev/null
+++ b/gdb/config/a29k/a29k-kern.mt
@@ -0,0 +1,13 @@
+# Target: Remote AMD 29000 that runs Unix kernel on NYU Ultra3 processor board
+
+# This builds a gdb that should run on a host (we use sun3os4) that
+# then communicates over the serial line to either an Adapt or MiniMon,
+# for use in debugging Unix kernels.
+# As compared to ordinary remote 29K debugging, this changes the register
+# numbering a bit, to hold kernel regs, and adds support for looking at
+# the upage.
+
+TDEPFILES= a29k-tdep.o remote-mm.o remote-adapt.o
+TM_FILE= tm-ultra3.h
+
+MT_CFLAGS = -DKERNEL_DEBUGGING -DNO_HIF_SUPPORT
diff --git a/gdb/config/a29k/a29k-udi.mt b/gdb/config/a29k/a29k-udi.mt
new file mode 100644
index 0000000..15b33e6
--- /dev/null
+++ b/gdb/config/a29k/a29k-udi.mt
@@ -0,0 +1,5 @@
+# Target: AMD 29000 on EB29K board over a serial line
+TDEPFILES= a29k-tdep.o remote-udi.o udip2soc.o udr.o udi2go32.o
+TM_FILE= tm-a29k.h
+
+MT_CFLAGS = $(HOST_IPC)
diff --git a/gdb/config/a29k/a29k.mt b/gdb/config/a29k/a29k.mt
new file mode 100644
index 0000000..a3f5910
--- /dev/null
+++ b/gdb/config/a29k/a29k.mt
@@ -0,0 +1,5 @@
+# Target: AMD 29000
+TDEPFILES= a29k-tdep.o remote-eb.o remote-adapt.o
+TM_FILE= tm-a29k.h
+
+MT_CFLAGS = -DNO_HIF_SUPPORT
diff --git a/gdb/config/a29k/nm-ultra3.h b/gdb/config/a29k/nm-ultra3.h
new file mode 100644
index 0000000..a3bc474
--- /dev/null
+++ b/gdb/config/a29k/nm-ultra3.h
@@ -0,0 +1,26 @@
+/* Host definitions for GDB running on an a29k NYU Ultracomputer
+ Copyright (C) 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+ Contributed by David Wood (wood@lab.ultra.nyu.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* If we ever *do* end up using the standard fetch_inferior_registers,
+ this is the right value for U_REGS_OFFSET. */
+#define U_REGS_OFFSET 0
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/a29k/tm-a29k.h b/gdb/config/a29k/tm-a29k.h
new file mode 100644
index 0000000..4892ec5
--- /dev/null
+++ b/gdb/config/a29k/tm-a29k.h
@@ -0,0 +1,707 @@
+/* Parameters for target machine AMD 29000, for GDB, the GNU debugger.
+ Copyright 1990, 1991, 1993, 1994 Free Software Foundation, Inc.
+ Contributed by Cygnus Support. Written by Jim Kingdon.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Parameters for an EB29K (a board which plugs into a PC and is
+ accessed through EBMON software running on the PC, which we
+ use as we'd use a remote stub (see remote-eb.c).
+
+ If gdb is ported to other a29k machines/systems, the
+ machine/system-specific parts should be removed from this file (a
+ la tm-m68k.h). */
+
+/* Byte order is configurable, but this machine runs big-endian. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Floating point uses IEEE representations. */
+#define IEEE_FLOAT
+
+/* Recognize our magic number. */
+#define BADMAG(x) ((x).f_magic != 0572)
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+ { pc = skip_prologue (pc); }
+CORE_ADDR skip_prologue ();
+
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) ((frame->flags & TRANSPARENT_FRAME) \
+ ? read_register (TPC_REGNUM) \
+ : read_register (LR0_REGNUM))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be aligned on 32-bit boundaries when synthesizing
+ function calls. */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 3) & ~3)
+
+/* Sequence of bytes for breakpoint instruction. */
+/* ASNEQ 0x50, gr1, gr1
+ The trap number 0x50 is chosen arbitrarily.
+ We let the command line (or previously included files) override this
+ setting. */
+#ifndef BREAKPOINT
+#if TARGET_BYTE_ORDER == BIG_ENDIAN
+#define BREAKPOINT {0x72, 0x50, 0x01, 0x01}
+#else /* Target is little-endian. */
+#define BREAKPOINT {0x01, 0x01, 0x50, 0x72}
+#endif /* Target is little-endian. */
+#endif /* BREAKPOINT */
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Allow the register declarations here to be overridden for remote
+ kernel debugging. */
+#if !defined (REGISTER_NAMES)
+
+/* Number of machine registers */
+
+#define NUM_REGS 205
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer.
+
+ FIXME, add floating point registers and support here.
+
+ Also note that this list does not attempt to deal with kernel
+ debugging (in which the first 32 registers are gr64-gr95). */
+
+#define REGISTER_NAMES \
+{"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \
+ "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \
+ "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \
+ "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \
+ "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \
+ "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \
+ "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \
+ "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \
+ "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \
+ "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \
+ "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \
+ "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \
+ "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \
+ "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \
+ "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \
+ "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \
+ "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \
+ "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \
+ "lr124", "lr125", "lr126", "lr127", \
+ "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \
+ "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \
+ "bp", "fc", "cr", "q", \
+ "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
+ "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "inte", "fps", "exo", "gr1", \
+ "alu", "ipc", "ipa", "ipb" }
+
+/*
+ * Converts an sdb register number to an internal gdb register number.
+ * Currently under epi, gr96->0...gr127->31...lr0->32...lr127->159, or...
+ * gr64->0...gr95->31, lr0->32...lr127->159.
+ */
+#define SDB_REG_TO_REGNUM(value) \
+ (((value) >= 96 && (value) <= 127) ? ((value) - 96) : \
+ ((value) >= 128 && (value) <= 255) ? ((value) - 128 + LR0_REGNUM) : \
+ (value))
+
+/*
+ * Provide the processor register numbers of some registers that are
+ * expected/written in instructions that might change under different
+ * register sets. Namely, gcc can compile (-mkernel-registers) so that
+ * it uses gr64-gr95 in stead of gr96-gr127.
+ */
+#define MSP_HW_REGNUM 125 /* gr125 */
+#define RAB_HW_REGNUM 126 /* gr126 */
+
+/* Convert Processor Special register #x to REGISTER_NAMES register # */
+#define SR_REGNUM(x) \
+ ((x) < 15 ? VAB_REGNUM + (x) \
+ : (x) >= 128 && (x) < 131 ? IPC_REGNUM + (x) - 128 \
+ : (x) == 131 ? Q_REGNUM \
+ : (x) == 132 ? ALU_REGNUM \
+ : (x) >= 133 && (x) < 136 ? BP_REGNUM + (x) - 133 \
+ : (x) >= 160 && (x) < 163 ? FPE_REGNUM + (x) - 160 \
+ : (x) == 164 ? EXO_REGNUM \
+ : (error ("Internal error in SR_REGNUM"), 0))
+#define GR96_REGNUM 0
+
+/* Define the return register separately, so it can be overridden for
+ kernel procedure calling conventions. */
+#define RETURN_REGNUM GR96_REGNUM
+#define GR1_REGNUM 200
+/* This needs to be the memory stack pointer, not the register stack pointer,
+ to make call_function work right. */
+#define SP_REGNUM MSP_REGNUM
+#define FP_REGNUM 33 /* lr1 */
+
+/* Return register for transparent calling convention (gr122). */
+#define TPC_REGNUM (122 - 96 + GR96_REGNUM)
+
+/* Large Return Pointer (gr123). */
+#define LRP_REGNUM (123 - 96 + GR96_REGNUM)
+
+/* Static link pointer (gr124). */
+#define SLP_REGNUM (124 - 96 + GR96_REGNUM)
+
+/* Memory Stack Pointer (gr125). */
+#define MSP_REGNUM (125 - 96 + GR96_REGNUM)
+
+/* Register allocate bound (gr126). */
+#define RAB_REGNUM (126 - 96 + GR96_REGNUM)
+
+/* Register Free Bound (gr127). */
+#define RFB_REGNUM (127 - 96 + GR96_REGNUM)
+
+/* Register Stack Pointer. */
+#define RSP_REGNUM GR1_REGNUM
+#define LR0_REGNUM 32
+#define BP_REGNUM 177
+#define FC_REGNUM 178
+#define CR_REGNUM 179
+#define Q_REGNUM 180
+#define VAB_REGNUM 181
+#define OPS_REGNUM (VAB_REGNUM + 1)
+#define CPS_REGNUM (VAB_REGNUM + 2)
+#define CFG_REGNUM (VAB_REGNUM + 3)
+#define CHA_REGNUM (VAB_REGNUM + 4)
+#define CHD_REGNUM (VAB_REGNUM + 5)
+#define CHC_REGNUM (VAB_REGNUM + 6)
+#define RBP_REGNUM (VAB_REGNUM + 7)
+#define TMC_REGNUM (VAB_REGNUM + 8)
+#define TMR_REGNUM (VAB_REGNUM + 9)
+#define NPC_REGNUM (VAB_REGNUM + 10) /* pc0 */
+#define PC_REGNUM (VAB_REGNUM + 11) /* pc1 */
+#define PC2_REGNUM (VAB_REGNUM + 12)
+#define MMU_REGNUM (VAB_REGNUM + 13)
+#define LRU_REGNUM (VAB_REGNUM + 14)
+#define FPE_REGNUM (VAB_REGNUM + 15)
+#define INTE_REGNUM (VAB_REGNUM + 16)
+#define FPS_REGNUM (VAB_REGNUM + 17)
+#define EXO_REGNUM (VAB_REGNUM + 18)
+/* gr1 is defined above as 200 = VAB_REGNUM + 19 */
+#define ALU_REGNUM (VAB_REGNUM + 20)
+#define PS_REGNUM ALU_REGNUM
+#define IPC_REGNUM (VAB_REGNUM + 21)
+#define IPA_REGNUM (VAB_REGNUM + 22)
+#define IPB_REGNUM (VAB_REGNUM + 23)
+
+#endif /* !defined(REGISTER_NAMES) */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+/* All regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) (4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+/* All regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE (4)
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE (4)
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) == PC_REGNUM || (N) == LRP_REGNUM || (N) == SLP_REGNUM \
+ || (N) == MSP_REGNUM || (N) == RAB_REGNUM || (N) == RFB_REGNUM \
+ || (N) == GR1_REGNUM || (N) == FP_REGNUM || (N) == LR0_REGNUM \
+ || (N) == NPC_REGNUM || (N) == PC2_REGNUM) \
+ ? lookup_pointer_type (builtin_type_void) : builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+/* On the a29k the LRP points to the part of the structure beyond the first
+ 16 words. */
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ write_register (LRP_REGNUM, (ADDR) + 16 * 4);
+
+/* Should call_function allocate stack space for a struct return? */
+/* On the a29k objects over 16 words require the caller to allocate space. */
+extern use_struct_convention_fn a29k_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) a29k_use_struct_convention (gcc_p, type)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ { \
+ int reg_length = TYPE_LENGTH (TYPE); \
+ if (reg_length > 16 * 4) \
+ { \
+ reg_length = 16 * 4; \
+ read_memory (*((int *)(REGBUF) + LRP_REGNUM), (VALBUF) + 16 * 4, \
+ TYPE_LENGTH (TYPE) - 16 * 4); \
+ } \
+ memcpy ((VALBUF), ((int *)(REGBUF))+RETURN_REGNUM, reg_length); \
+ }
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ { \
+ int reg_length = TYPE_LENGTH (TYPE); \
+ if (reg_length > 16 * 4) \
+ { \
+ reg_length = 16 * 4; \
+ write_memory (read_register (LRP_REGNUM), \
+ (char *)(VALBUF) + 16 * 4, \
+ TYPE_LENGTH (TYPE) - 16 * 4); \
+ } \
+ write_register_bytes (REGISTER_BYTE (RETURN_REGNUM), (char *)(VALBUF), \
+ TYPE_LENGTH (TYPE)); \
+ }
+
+/* The a29k user's guide documents well what the stacks look like.
+ But what isn't so clear there is how this interracts with the
+ symbols, or with GDB.
+ In the following saved_msp, saved memory stack pointer (which functions
+ as a memory frame pointer), means either
+ a register containing the memory frame pointer or, in the case of
+ functions with fixed size memory frames (i.e. those who don't use
+ alloca()), the result of the calculation msp + msize.
+
+ LOC_ARG, LOC_LOCAL - For GCC, these are relative to saved_msp.
+ For high C, these are relative to msp (making alloca impossible).
+ LOC_REGISTER, LOC_REGPARM - The register number is the number at the
+ time the function is running (after the prologue), or in the case
+ of LOC_REGPARM, may be a register number in the range 160-175.
+
+ The compilers do things like store an argument into memory, and then put out
+ a LOC_ARG for it, or put it into global registers and put out a
+ LOC_REGPARM. Thus is it important to execute the first line of
+ code (i.e. the line of the open brace, i.e. the prologue) of a function
+ before trying to print arguments or anything.
+
+ The following diagram attempts to depict what is going on in memory
+ (see also the _a29k user's guide_) and also how that interacts with
+ GDB frames. We arbitrarily pick fci->frame to point the same place
+ as the register stack pointer; since we set it ourself in
+ INIT_EXTRA_FRAME_INFO, and access it only through the FRAME_*
+ macros, it doesn't really matter exactly how we
+ do it. However, note that FRAME_FP is used in two ways in GDB:
+ (1) as a "magic cookie" which uniquely identifies frames (even over
+ calls to the inferior), (2) (in PC_IN_CALL_DUMMY [ON_STACK])
+ as the value of SP_REGNUM before the dummy frame was pushed. These
+ two meanings would be incompatible for the a29k if we defined
+ CALL_DUMMY_LOCATION == ON_STACK (but we don't, so don't worry about it).
+ Also note that "lr1" below, while called a frame pointer
+ in the user's guide, has only one function: To determine whether
+ registers need to be filled in the function epilogue.
+
+ Consider the code:
+ < call bar>
+ loc1: . . .
+ bar: sub gr1,gr1,rsize_b
+ . . .
+ add mfp,msp,0
+ sub msp,msp,msize_b
+ . . .
+ < call foo >
+ loc2: . . .
+ foo: sub gr1,gr1,rsize_f
+ . . .
+ add mfp,msp,0
+ sub msp,msp,msize_f
+ . . .
+ loc3: < suppose the inferior stops here >
+
+ memory stack register stack
+ | | |____________|
+ | | |____loc1____|
+ +------->|___________| | | ^
+ | | ^ | | locals_b | |
+ | | | | |____________| |
+ | | | | | | | rsize_b
+ | | | msize_b | | args_to_f | |
+ | | | | |____________| |
+ | | | | |____lr1_____| V
+ | | V | |____loc2____|<----------------+
+ | +--->|___________|<---------mfp | ^ |
+ | | | ^ | | locals_f | | |
+ | | | | msize_f | |____________| | |
+ | | | | | | | | rsize_f |
+ | | | V | | args | | |
+ | | |___________|<msp |____________| | |
+ | | |_____lr1____| V |
+ | | |___garbage__| <- gr1 <----+ |
+ | | | |
+ | | | |
+ | | pc=loc3 | |
+ | | | |
+ | | | |
+ | | frame cache | |
+ | | |_________________| | |
+ | | |rsize=rsize_b | | |
+ | | |msize=msize_b | | |
+ +---|--------saved_msp | | |
+ | |frame------------------------------------|---+
+ | |pc=loc2 | |
+ | |_________________| |
+ | |rsize=rsize_f | |
+ | |msize=msize_f | |
+ +--------saved_msp | |
+ |frame------------------------------------+
+ |pc=loc3 |
+ |_________________|
+
+ So, is that sufficiently confusing? Welcome to the 29000.
+ Notes:
+ * The frame for foo uses a memory frame pointer but the frame for
+ bar does not. In the latter case the saved_msp is
+ computed by adding msize to the saved_msp of the
+ next frame.
+ * msize is in the frame cache only for high C's sake. */
+
+void read_register_stack ();
+long read_register_stack_integer ();
+
+#define FRAME_INIT_SAVED_REGS(fi) /*no-op*/
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR saved_msp; \
+ unsigned int rsize; \
+ unsigned int msize; \
+ unsigned char flags;
+
+/* Bits for flags in EXTRA_FRAME_INFO */
+#define TRANSPARENT_FRAME 0x1 /* This is a transparent frame */
+#define MFP_USED 0x2 /* A memory frame pointer is used */
+
+/* Because INIT_FRAME_PC gets passed fromleaf, that's where we init
+ not only ->pc and ->frame, but all the extra stuff, when called from
+ get_prev_frame_info, that is. */
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
+void init_extra_frame_info ();
+
+#define INIT_FRAME_PC(fromleaf, fci) init_frame_pc(fromleaf, fci)
+void init_frame_pc ();
+
+
+/* FRAME_CHAIN takes a FRAME
+ and produces the frame's chain-pointer.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+
+/* On the a29k, the nominal address of a frame is the address on the
+ register stack of the return address (the one next to the incoming
+ arguments, not down at the bottom so nominal address == stack pointer).
+
+ GDB expects "nominal address" to equal contents of FP_REGNUM,
+ at least when it comes time to create the innermost frame.
+ However, that doesn't work for us, so when creating the innermost
+ frame we set ->frame ourselves in INIT_EXTRA_FRAME_INFO. */
+
+/* These are mostly dummies for the a29k because INIT_FRAME_PC
+ sets prev->frame instead. */
+/* If rsize is zero, we must be at end of stack (or otherwise hosed).
+ If we don't check rsize, we loop forever if we see rsize == 0. */
+#define FRAME_CHAIN(thisframe) \
+ ((thisframe)->rsize == 0 \
+ ? 0 \
+ : (thisframe)->frame + (thisframe)->rsize)
+
+/* Determine if the frame has a 'previous' and back-traceable frame. */
+#define FRAME_IS_UNCHAINED(frame) ((frame)->flags & TRANSPARENT_FRAME)
+
+/* Find the previous frame of a transparent routine.
+ * For now lets not try and trace through a transparent routine (we might
+ * have to assume that all transparent routines are traps).
+ */
+#define FIND_PREV_UNCHAINED_FRAME(frame) 0
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+/* Saved pc (i.e. return address). */
+#define FRAME_SAVED_PC(fraim) \
+ (read_register_stack_integer ((fraim)->frame + (fraim)->rsize, 4))
+
+/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
+ offsets being relative to the memory stack pointer (high C) or
+ saved_msp (gcc). */
+
+#define FRAME_LOCALS_ADDRESS(fi) frame_locals_address (fi)
+extern CORE_ADDR frame_locals_address ();
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+/* We tried going to the effort of finding the tags word and getting
+ the argcount field from it, to support debugging assembler code.
+ Problem was, the "argcount" field never did hold the argument
+ count. */
+#define FRAME_NUM_ARGS(numargs, fi) ((numargs) = -1)
+
+#define FRAME_ARGS_ADDRESS(fi) FRAME_LOCALS_ADDRESS (fi)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Provide our own get_saved_register. HAVE_REGISTER_WINDOWS is insufficient
+ because registers get renumbered on the a29k without getting saved. */
+
+#define GET_SAVED_REGISTER
+
+/* Call function stuff. */
+
+/* The dummy frame looks like this (see also the general frame picture
+ above):
+
+ register stack
+
+ | | frame for function
+ | locals_sproc | executing at time
+ |________________| of call_function.
+ | | We must not disturb
+ | args_out_sproc | it.
+ memory stack |________________|
+ |____lr1_sproc___|<-+
+ | | |__retaddr_sproc_| | <-- gr1 (at start)
+ |____________|<-msp 0 <-----------mfp_dummy_____| |
+ | | (at start) | save regs | |
+ | arg_slop | | pc0,pc1 | |
+ | | | pc2,lr0 sproc | |
+ | (16 words) | | gr96-gr124 | |
+ |____________|<-msp 1--after | sr160-sr162 | |
+ | | PUSH_DUMMY_FRAME| sr128-sr135 | |
+ | struct ret | |________________| |
+ | 17+ | | | |
+ |____________|<- lrp | args_out_dummy | |
+ | struct ret | | (16 words) | |
+ | 16 | |________________| |
+ | (16 words) | |____lr1_dummy___|--+
+ |____________|<- msp 2--after |_retaddr_dummy__|<- gr1 after
+ | | struct ret | | PUSH_DUMMY_FRAME
+ | margs17+ | area allocated | locals_inf |
+ | | |________________| called
+ |____________|<- msp 4--when | | function's
+ | | inf called | args_out_inf | frame (set up
+ | margs16 | |________________| by called
+ | (16 words) | |_____lr1_inf____| function).
+ |____________|<- msp 3--after | . |
+ | | args pushed | . |
+ | | | . |
+ | |
+
+ arg_slop: This area is so that when the call dummy adds 16 words to
+ the msp, it won't end up larger than mfp_dummy (it is needed in the
+ case where margs and struct_ret do not add up to at least 16 words).
+ struct ret: This area is allocated by GDB if the return value is more
+ than 16 words. struct ret_16 is not used on the a29k.
+ margs: Pushed by GDB. The call dummy copies the first 16 words to
+ args_out_dummy.
+ retaddr_sproc: Contains the PC at the time we call the function.
+ set by PUSH_DUMMY_FRAME and read by POP_FRAME.
+ retaddr_dummy: This points to a breakpoint instruction in the dummy. */
+
+/* Rsize for dummy frame, in bytes. */
+
+/* Bytes for outgoing args, lr1, and retaddr. */
+#define DUMMY_ARG (2 * 4 + 16 * 4)
+
+/* Number of special registers (sr128-) to save. */
+#define DUMMY_SAVE_SR128 8
+/* Number of special registers (sr160-) to save. */
+#define DUMMY_SAVE_SR160 3
+/* Number of general (gr96- or gr64-) registers to save. */
+#define DUMMY_SAVE_GREGS 29
+
+#define DUMMY_FRAME_RSIZE \
+(4 /* mfp_dummy */ \
+ + 4 * 4 /* pc0, pc1, pc2, lr0 */ \
+ + DUMMY_SAVE_GREGS * 4 \
+ + DUMMY_SAVE_SR160 * 4 \
+ + DUMMY_SAVE_SR128 * 4 \
+ + DUMMY_ARG \
+ + 4 /* pad to doubleword */ )
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME push_dummy_frame()
+extern void push_dummy_frame ();
+
+/* Discard from the stack the innermost frame,
+ restoring all saved registers. */
+
+#define POP_FRAME pop_frame()
+extern void pop_frame ();
+
+/* This sequence of words is the instructions
+ mtsrim cr, 15
+ loadm 0, 0, lr2, msp ; load first 16 words of arguments into registers
+ add msp, msp, 16 * 4 ; point to the remaining arguments
+ CONST_INSN:
+ const lr0,inf ; (replaced by half of target addr)
+ consth lr0,inf ; (replaced by other half of target addr)
+ calli lr0, lr0
+ aseq 0x40,gr1,gr1 ; nop
+ BREAKPT_INSN:
+ asneq 0x50,gr1,gr1 ; breakpoint (replaced by local breakpoint insn)
+ */
+
+#if TARGET_BYTE_ORDER == HOST_BYTE_ORDER
+#define BS(const) const
+#else
+#define BS(const) (((const) & 0xff) << 24) | \
+ (((const) & 0xff00) << 8) | \
+ (((const) & 0xff0000) >> 8) | \
+ (((const) & 0xff000000) >> 24)
+#endif
+
+/* Position of the "const" and blkt instructions within CALL_DUMMY in bytes. */
+#define CONST_INSN (3 * 4)
+#define BREAKPT_INSN (7 * 4)
+#define CALL_DUMMY { \
+ BS(0x0400870f),\
+ BS(0x36008200|(MSP_HW_REGNUM)), \
+ BS(0x15000040|(MSP_HW_REGNUM<<8)|(MSP_HW_REGNUM<<16)), \
+ BS(0x03ff80ff), \
+ BS(0x02ff80ff), \
+ BS(0xc8008080), \
+ BS(0x70400101), \
+ BS(0x72500101)}
+#define CALL_DUMMY_LENGTH (8 * 4)
+
+#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
+
+/* Helper macro for FIX_CALL_DUMMY. WORDP is a long * which points to a
+ word in target byte order; bits 0-7 and 16-23 of *WORDP are replaced with
+ bits 0-7 and 8-15 of DATA (which is in host byte order). */
+
+#if TARGET_BYTE_ORDER == BIG_ENDIAN
+#define STUFF_I16(WORDP, DATA) \
+ { \
+ *((char *)(WORDP) + 3) = ((DATA) & 0xff);\
+ *((char *)(WORDP) + 1) = (((DATA) >> 8) & 0xff);\
+ }
+#else /* Target is little endian. */
+#define STUFF_I16(WORDP, DATA) \
+ {
+ *(char *)(WORDP) = ((DATA) & 0xff);
+ *((char *)(WORDP) + 2) = (((DATA) >> 8) & 0xff);
+ }
+#endif /* Target is little endian. */
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+/* Currently this stuffs in the address of the function that we are calling.
+ Since different a29k systems use different breakpoint instructions, it
+ also stuffs BREAKPOINT in the right place (to avoid having to
+ duplicate CALL_DUMMY in each tm-*.h file). */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ {\
+ STUFF_I16((char *)dummyname + CONST_INSN, fun); \
+ STUFF_I16((char *)dummyname + CONST_INSN + 4, fun >> 16); \
+ /* FIXME memcpy ((char *)(dummyname) + BREAKPT_INSN, break_insn, 4); */ \
+ }
+
+/* a29k architecture has separate data & instruction memories -- wired to
+ different pins on the chip -- and can't execute the data memory.
+ Also, there should be space after text_end;
+ we won't get a SIGSEGV or scribble on data space. */
+
+#define CALL_DUMMY_LOCATION AFTER_TEXT_END
+
+/* Because of this, we need (as a kludge) to know the addresses of the
+ text section. */
+
+#define NEED_TEXT_START_END 1
+
+/* How to translate register numbers in the .stab's into gdb's internal register
+ numbers. We don't translate them, but we warn if an invalid register
+ number is seen. Note that FIXME, we use the value "sym" as an implicit
+ argument in printing the error message. It happens to be available where
+ this macro is used. (This macro definition appeared in a late revision
+ of gdb-3.91.6 and is not well tested. Also, it should be a "complaint".) */
+
+#define STAB_REG_TO_REGNUM(num) \
+ (((num) > LR0_REGNUM + 127) \
+ ? fprintf(stderr, \
+ "Invalid register number %d in symbol table entry for %s\n", \
+ (num), SYMBOL_SOURCE_NAME (sym)), (num) \
+ : (num))
+
+extern enum a29k_processor_types {
+ a29k_unknown,
+
+ /* Bit 0x400 of the CPS does *not* identify freeze mode, i.e. 29000,
+ 29030, etc. */
+ a29k_no_freeze_mode,
+
+ /* Bit 0x400 of the CPS does identify freeze mode, i.e. 29050. */
+ a29k_freeze_mode
+} processor_type;
+
+/* We need three arguments for a general frame specification for the
+ "frame" or "info frame" command. */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
diff --git a/gdb/config/a29k/tm-ultra3.h b/gdb/config/a29k/tm-ultra3.h
new file mode 100644
index 0000000..8b96210
--- /dev/null
+++ b/gdb/config/a29k/tm-ultra3.h
@@ -0,0 +1,226 @@
+/* Parameters for NYU Ultracomputer 29000 target, for GDB, the GNU debugger.
+ Copyright 1990, 1991 Free Software Foundation, Inc.
+ Contributed by David Wood @ New York University (wood@nyu.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This file includes tm-a29k.h, but predefines REGISTER_NAMES and
+ related macros. The file supports a a29k running our flavor of
+ Unix on our Ultra3 PE Boards. */
+
+/* Byte order is configurable, but this machine runs big-endian. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer.
+ */
+#define NUM_REGS (EXO_REGNUM + 1)
+
+#define REGISTER_NAMES { \
+ "gr1", \
+ "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", "gr72", \
+ "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", "gr80", "gr81", \
+ "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", "gr88", "gr89", "gr90", \
+ "gr91", "gr92", "gr93", "gr94", "gr95", \
+ "gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \
+ "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \
+ "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \
+ "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \
+ "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \
+ "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \
+ "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \
+ "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \
+ "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \
+ "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \
+ "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \
+ "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \
+ "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \
+ "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \
+ "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \
+ "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \
+ "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \
+ "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \
+ "lr124", "lr125", "lr126", "lr127", \
+ "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
+ "pc0", "pc1", "pc2", "mmu", "lru", \
+ "ipc", "ipa", "ipb", "q", "alu", "bp", "fc", "cr", \
+ "fpe", "int", "fps", "exo" }
+
+
+#ifdef KERNEL_DEBUGGING
+# define PADDR_U_REGNUM 22 /* gr86 */
+# define RETURN_REGNUM GR64_REGNUM
+#else
+# define RETURN_REGNUM GR96_REGNUM
+#endif /* KERNEL_DEBUGGING */
+
+
+/* Should rename all GR96_REGNUM to RETURN_REGNUM */
+#define GR1_REGNUM (0)
+#define GR64_REGNUM 1
+#define GR96_REGNUM (GR64_REGNUM + 32)
+/* This needs to be the memory stack pointer, not the register stack pointer,
+ to make call_function work right. */
+#define SP_REGNUM MSP_REGNUM
+
+#define FP_REGNUM (LR0_REGNUM + 1) /* lr1 */
+/* Large Return Pointer */
+#define LRP_REGNUM (123 - 96 + RETURN_REGNUM)
+/* Static link pointer */
+#define SLP_REGNUM (124 - 96 + RETURN_REGNUM)
+/* Memory Stack Pointer. */
+#define MSP_REGNUM (125 - 96 + RETURN_REGNUM)
+/* Register allocate bound. */
+#define RAB_REGNUM (126 - 96 + RETURN_REGNUM)
+/* Register Free Bound. */
+#define RFB_REGNUM (127 - 96 + RETURN_REGNUM)
+/* Register Stack Pointer. */
+#define RSP_REGNUM GR1_REGNUM
+#define LR0_REGNUM ( 32 + GR96_REGNUM)
+
+/* Protected Special registers */
+#define VAB_REGNUM (LR0_REGNUM + 128)
+#define OPS_REGNUM (VAB_REGNUM + 1)
+#define CPS_REGNUM (VAB_REGNUM + 2)
+#define CFG_REGNUM (VAB_REGNUM + 3)
+#define CHA_REGNUM (VAB_REGNUM + 4)
+#define CHD_REGNUM (VAB_REGNUM + 5)
+#define CHC_REGNUM (VAB_REGNUM + 6)
+#define RBP_REGNUM (VAB_REGNUM + 7)
+#define TMC_REGNUM (VAB_REGNUM + 8)
+#define TMR_REGNUM (VAB_REGNUM + 9)
+#define NPC_REGNUM (VAB_REGNUM + 10) /* pc0 */
+#define PC_REGNUM (VAB_REGNUM + 11) /* pc1 */
+#define PC2_REGNUM (VAB_REGNUM + 12) /* pc2 */
+#define MMU_REGNUM (VAB_REGNUM + 13)
+#define LRU_REGNUM (VAB_REGNUM + 14)
+ /* Register sequence gap */
+/* Unprotected Special registers */
+#define IPC_REGNUM (LRU_REGNUM + 1)
+#define IPA_REGNUM (IPC_REGNUM + 1)
+#define IPB_REGNUM (IPC_REGNUM + 2)
+#define Q_REGNUM (IPC_REGNUM + 3)
+#define ALU_REGNUM (IPC_REGNUM + 4)
+#define PS_REGNUM ALU_REGNUM
+#define BP_REGNUM (IPC_REGNUM + 5)
+#define FC_REGNUM (IPC_REGNUM + 6)
+#define CR_REGNUM (IPC_REGNUM + 7)
+ /* Register sequence gap */
+#define FPE_REGNUM (CR_REGNUM + 1)
+#define INT_REGNUM (FPE_REGNUM + 1)
+#define FPS_REGNUM (FPE_REGNUM + 2)
+ /* Register sequence gap */
+#define EXO_REGNUM (FPS_REGNUM + 1)
+
+/* Special register #x. */
+#define SR_REGNUM(x) \
+ ((x) < 15 ? VAB_REGNUM + (x) \
+ : (x) >= 128 && (x) < 136 ? IPC_REGNUM + (x-128) \
+ : (x) >= 160 && (x) < 163 ? FPE_REGNUM + (x-160) \
+ : (x) == 164 ? EXO_REGNUM \
+ : (error ("Internal error in SR_REGNUM"), 0))
+
+#ifndef KERNEL_DEBUGGING
+/*
+ * This macro defines the register numbers (from REGISTER_NAMES) that
+ * are effectively unavailable to the user through ptrace(). It allows
+ * us to include the whole register set in REGISTER_NAMES (inorder to
+ * better support remote debugging). If it is used in
+ * fetch/store_inferior_registers() gdb will not complain about I/O errors
+ * on fetching these registers. If all registers in REGISTER_NAMES
+ * are available, then return false (0).
+ */
+#define CANNOT_STORE_REGISTER(regno) \
+ (((regno)>=GR64_REGNUM && (regno)<GR64_REGNUM+32) || \
+ ((regno)==VAB_REGNUM) || \
+ ((regno)==OPS_REGNUM) || \
+ ((regno)>=CFG_REGNUM && (regno)<=TMR_REGNUM) || \
+ ((regno)==MMU_REGNUM) || \
+ ((regno)==LRU_REGNUM) || \
+ ((regno)>=ALU_REGNUM) || \
+ ((regno)==CR_REGNUM) || \
+ ((regno)==EXO_REGNUM))
+#define CANNOT_FETCH_REGISTER(regno) CANNOT_STORE_REGISTER(regno)
+#endif /* KERNEL_DEBUGGING */
+
+/*
+ * Converts an sdb register number to an internal gdb register number.
+ * Currently under gcc, gr96->0...gr128->31...lr0->32...lr127->159, or...
+ * gr64->0...gr95->31, lr0->32...lr127->159.
+ */
+#define SDB_REG_TO_REGNUM(value) (((value)<32) ? ((value)+RETURN_REGNUM) : \
+ ((value)-32+LR0_REGNUM))
+
+#ifdef KERNEL_DEBUGGING
+ /* ublock virtual address as defined in our sys/param.h */
+ /* FIXME: Should get this from sys/param.h */
+# define UVADDR ((32*0x100000)-8192)
+#endif
+
+/*
+ * Are we in sigtramp(), needed in infrun.c. Specific to ultra3, because
+ * we take off the leading '_'.
+ */
+#if !defined(KERNEL_DEBUGGING)
+#ifdef SYM1
+# define IN_SIGTRAMP(pc, name) (name && STREQ ("sigtramp", name))
+#else
+ Need to define IN_SIGTRAMP() for sym2.
+#endif
+#endif /* !KERNEL_DEBUGGING */
+
+#include "a29k/tm-a29k.h"
+
+/**** The following are definitions that override those in tm-a29k.h ****/
+
+/* This sequence of words is the instructions
+ mtsrim cr, 15
+ loadm 0, 0, lr2, msp ; load first 16 words of arguments into registers
+ add msp, msp, 16 * 4 ; point to the remaining arguments
+ CONST_INSN:
+ const gr96,inf
+ consth gr96,inf
+ calli lr0, gr96
+ aseq 0x40,gr1,gr1 ; nop
+ asneq 0x50,gr1,gr1 ; breakpoint
+ When KERNEL_DEBUGGIN is defined, msp -> gr93, gr96 -> gr64,
+ 7d -> 5d, 60 -> 40
+ */
+
+/* Position of the "const" instruction within CALL_DUMMY in bytes. */
+#undef CALL_DUMMY
+#if TARGET_BYTE_ORDER == HOST_BYTE_ORDER
+#ifdef KERNEL_DEBUGGING /* gr96 -> gr64 */
+# define CALL_DUMMY {0x0400870f, 0x3600825d, 0x155d5d40, 0x03ff40ff, \
+ 0x02ff40ff, 0xc8008040, 0x70400101, 0x72500101}
+#else
+# define CALL_DUMMY {0x0400870f, 0x3600827d, 0x157d7d40, 0x03ff60ff, \
+ 0x02ff60ff, 0xc8008060, 0x70400101, 0x72500101}
+#endif /* KERNEL_DEBUGGING */
+#else /* Byte order differs. */
+ you lose
+#endif /* Byte order differs. */
+
+#if !defined(KERNEL_DEBUGGING)
+# ifdef SYM1
+# undef DECR_PC_AFTER_BREAK
+# define DECR_PC_AFTER_BREAK 0 /* Sym1 kernel does the decrement */
+# else
+ ->"ULTRA3 running other than sym1 OS"!;
+# endif
+#endif /* !KERNEL_DEBUGGING */
+
diff --git a/gdb/config/a29k/tm-vx29k.h b/gdb/config/a29k/tm-vx29k.h
new file mode 100644
index 0000000..487df82
--- /dev/null
+++ b/gdb/config/a29k/tm-vx29k.h
@@ -0,0 +1,229 @@
+/* Target machine description for VxWorks on the 29k, for GDB, the GNU debugger.
+ Copyright 1994 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "a29k/tm-a29k.h"
+
+#define GDBINIT_FILENAME ".vxgdbinit"
+
+#define DEFAULT_PROMPT "(vxgdb) "
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+/* #define VX_SIZE_FPREGS */
+
+/* This is almost certainly the wrong place for this: */
+#define LR2_REGNUM 34
+
+
+/* Vxworks has its own CALL_DUMMY since it manages breakpoints in the kernel */
+
+#undef CALL_DUMMY
+
+/* Replace the breakpoint instruction in the CALL_DUMMY with a nop.
+ For Vxworks, the breakpoint is set and deleted by calls to
+ CALL_DUMMY_BREAK_SET and CALL_DUMMY_BREAK_DELETE. */
+
+#if TARGET_BYTE_ORDER == HOST_BYTE_ORDER
+#define CALL_DUMMY {0x0400870f,\
+ 0x36008200|(MSP_HW_REGNUM), \
+ 0x15000040|(MSP_HW_REGNUM<<8)|(MSP_HW_REGNUM<<16), \
+ 0x03ff80ff, 0x02ff80ff, 0xc8008080, 0x70400101, 0x70400101}
+#else /* Byte order differs. */
+#define CALL_DUMMY {0x0f870004,\
+ 0x00820036|(MSP_HW_REGNUM << 24), \
+ 0x40000015|(MSP_HW_REGNUM<<8)|(MSP_HW_REGNUM<<16), \
+ 0xff80ff03, 0xff80ff02, 0x808000c8, 0x01014070, 0x01014070}
+#endif /* Byte order differs. */
+
+
+/* For the basic CALL_DUMMY definitions, see "tm-29k.h." We use the
+ same CALL_DUMMY code, but define FIX_CALL_DUMMY (and related macros)
+ locally to handle remote debugging of VxWorks targets. The difference
+ is in the setting and clearing of the breakpoint at the end of the
+ CALL_DUMMY code fragment; under VxWorks, we can't simply insert a
+ breakpoint instruction into the code, since that would interfere with
+ the breakpoint management mechanism on the target.
+ Note that CALL_DUMMY is a piece of code that is used to call any C function
+ thru VxGDB */
+
+/* The offset of the instruction within the CALL_DUMMY code where we
+ want the inferior to stop after the function call has completed.
+ call_function_by_hand () sets a breakpoint here (via CALL_DUMMY_BREAK_SET),
+ which POP_FRAME later deletes (via CALL_DUMMY_BREAK_DELETE). */
+
+#define CALL_DUMMY_STOP_OFFSET (7 * 4)
+
+/* The offset of the first instruction of the CALL_DUMMY code fragment
+ relative to the frame pointer for a dummy frame. This is equal to
+ the size of the CALL_DUMMY plus the arg_slop area size (see the diagram
+ in "tm-29k.h"). */
+/* PAD : the arg_slop area size doesn't appear to me to be useful since, the
+ call dummy code no longer modify the msp. See below. This must be checked. */
+
+#define CALL_DUMMY_OFFSET_IN_FRAME (CALL_DUMMY_LENGTH + 16 * 4)
+
+/* Insert the specified number of args and function address
+ into a CALL_DUMMY sequence stored at DUMMYNAME, replace the third
+ instruction (add msp, msp, 16*4) with a nop, and leave the final nop.
+ We can't keep using a CALL_DUMMY that modify the msp since, for VxWorks,
+ CALL_DUMMY is stored in the Memory Stack. Adding 16 words to the msp
+ would then make possible for the inferior to overwrite the CALL_DUMMY code,
+ thus creating a lot of trouble when exiting the inferior to come back in
+ a CALL_DUMMY code that no longer exists... Furthermore, ESF are also stored
+ from the msp in the memory stack. If msp is set higher than the dummy code,
+ an ESF may clobber this code. */
+
+#if TARGET_BYTE_ORDER == BIG_ENDIAN
+#define NOP_INSTR 0x70400101
+#else /* Target is little endian */
+#define NOP_INSTR 0x01014070
+#endif
+
+#undef FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ { \
+ *(int *)((char *)dummyname + 8) = NOP_INSTR; \
+ STUFF_I16((char *)dummyname + CONST_INSN, fun); \
+ STUFF_I16((char *)dummyname + CONST_INSN + 4, fun >> 16); \
+ }
+
+/* For VxWorks, CALL_DUMMY must be stored in the stack of the task that is
+ being debugged and executed "in the context of" this task */
+
+#undef CALL_DUMMY_LOCATION
+#define CALL_DUMMY_LOCATION ON_STACK
+
+/* Set or delete a breakpoint at the location within a CALL_DUMMY code
+ fragment where we want the target program to stop after the function
+ call is complete. CALL_DUMMY_ADDR is the address of the first
+ instruction in the CALL_DUMMY. DUMMY_FRAME_ADDR is the value of the
+ frame pointer in the dummy frame.
+
+ NOTE: in the both of the following definitions, we take advantage of
+ knowledge of the implementation of the target breakpoint operation,
+ in that we pass a null pointer as the second argument. It seems
+ reasonable to assume that any target requiring the use of
+ CALL_DUMMY_BREAK_{SET,DELETE} will not store the breakpoint
+ shadow contents in GDB; in any case, this assumption is vaild
+ for all VxWorks-related targets. */
+
+#define CALL_DUMMY_BREAK_SET(call_dummy_addr) \
+ target_insert_breakpoint ((call_dummy_addr) + CALL_DUMMY_STOP_OFFSET, \
+ (char *) 0)
+
+#define CALL_DUMMY_BREAK_DELETE(dummy_frame_addr) \
+ target_remove_breakpoint ((dummy_frame_addr) - (CALL_DUMMY_OFFSET_IN_FRAME \
+ - CALL_DUMMY_STOP_OFFSET), \
+ (char *) 0)
+
+/* Return nonzero if the pc is executing within a CALL_DUMMY frame. */
+
+#define PC_IN_CALL_DUMMY(pc, sp, frame_address) \
+ ((pc) >= (sp) \
+ && (pc) <= (sp) + CALL_DUMMY_OFFSET_IN_FRAME + CALL_DUMMY_LENGTH)
+
+/* Defining this prevents us from trying to pass a structure-valued argument
+ to a function called via the CALL_DUMMY mechanism. This is not handled
+ properly in call_function_by_hand (), and the fix might require re-writing
+ the CALL_DUMMY handling for all targets (at least, a clean solution
+ would probably require this). Arguably, this should go in "tm-29k.h"
+ rather than here. */
+
+#define STRUCT_VAL_ARGS_UNSUPPORTED
+
+#define BKPT_OFFSET (7 * 4)
+#define BKPT_INSTR 0x72500101
+
+#undef FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ {\
+ STUFF_I16((char *)dummyname + CONST_INSN, fun);\
+ STUFF_I16((char *)dummyname + CONST_INSN + 4, fun >> 16);\
+ *(int *)((char *)dummyname + BKPT_OFFSET) = BKPT_INSTR;\
+ }
+
+
+/* Offsets into jmp_buf. They are derived from VxWorks' REG_SET struct
+ (see VxWorks' setjmp.h). Note that Sun2, Sun3 and SunOS4 and VxWorks have
+ different REG_SET structs, hence different layouts for the jmp_buf struct.
+ Only JB_PC is needed for getting the saved PC value. */
+
+#define JB_ELEMENT_SIZE 4 /* size of each element in jmp_buf */
+#define JB_PC 3 /* offset of pc (pc1) in jmp_buf */
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* VxWorks adjusts the PC after a breakpoint has been hit. */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+/* Do whatever promotions are appropriate on a value being returned
+ from a function. VAL is the user-supplied value, and FUNC_TYPE
+ is the return type of the function if known, else 0.
+
+ For the Am29k, as far as I understand, if the function return type is known,
+ cast the value to that type; otherwise, ensure that integer return values
+ fill all of gr96.
+
+ This definition really belongs in "tm-29k.h", since it applies
+ to most Am29K-based systems; but once moved into that file, it might
+ need to be redefined for all Am29K-based targets that also redefine
+ STORE_RETURN_VALUE. For now, to be safe, we define it here. */
+
+#define PROMOTE_RETURN_VALUE(val, func_type) \
+ do { \
+ if (func_type) \
+ val = value_cast (func_type, val); \
+ if ((TYPE_CODE (VALUE_TYPE (val)) == TYPE_CODE_INT \
+ || TYPE_CODE (VALUE_TYPE (val)) == TYPE_CODE_ENUM) \
+ && TYPE_LENGTH (VALUE_TYPE (val)) < REGISTER_RAW_SIZE (0)) \
+ val = value_cast (builtin_type_int, val); \
+ } while (0)
+
+extern int vx29k_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) vx29k_frame_chain_valid (chain, thisframe)
+
+extern CORE_ADDR frame_saved_call_site ();
+
+#undef PREPARE_TO_INIT_FRAME_INFO
+#define PREPARE_TO_INIT_FRAME_INFO(fci) do { \
+ long current_msp = read_register (MSP_REGNUM); \
+ if (PC_IN_CALL_DUMMY (fci->pc, current_msp, 0)) \
+ { \
+ fci->rsize = DUMMY_FRAME_RSIZE; \
+ fci->msize = 0; \
+ fci->saved_msp = \
+ read_register_stack_integer (fci->frame + DUMMY_FRAME_RSIZE - 4, 4); \
+ fci->flags |= (TRANSPARENT|MFP_USED); \
+ return; \
+ } \
+ } while (0)
diff --git a/gdb/config/a29k/ultra3.mh b/gdb/config/a29k/ultra3.mh
new file mode 100644
index 0000000..2f211c5
--- /dev/null
+++ b/gdb/config/a29k/ultra3.mh
@@ -0,0 +1,13 @@
+# Host: NYU Ultracomputer (AMD 29000 running Unix)
+
+CC=u3cc
+
+XM_FILE= xm-ultra3.h
+XDEPFILES= ultra3-xdep.o
+
+MH_CFLAGS = -DSYM1
+XM_CLIBS = -lsysv -ljobs -ltermlib
+
+NAT_FILE= nm-ultra3.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o ultra3-nat.o
+
diff --git a/gdb/config/a29k/ultra3.mt b/gdb/config/a29k/ultra3.mt
new file mode 100644
index 0000000..1f5fd2f
--- /dev/null
+++ b/gdb/config/a29k/ultra3.mt
@@ -0,0 +1,6 @@
+# Target: AMD 29000 running Unix on New York University processor board
+TDEPFILES= a29k-tdep.o
+TM_FILE= tm-ultra3.h
+
+# SYM1 is some OS they have.
+MT_CFLAGS = -DSYM1
diff --git a/gdb/config/a29k/vx29k.mt b/gdb/config/a29k/vx29k.mt
new file mode 100644
index 0000000..4d6f5cc
--- /dev/null
+++ b/gdb/config/a29k/vx29k.mt
@@ -0,0 +1,4 @@
+# Target: AMD 29k running VxWorks
+TDEPFILES= a29k-tdep.o remote-vx.o remote-vx29k.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vx29k.h
+MT_CFLAGS = -DNO_HIF_SUPPORT
diff --git a/gdb/config/a29k/xm-ultra3.h b/gdb/config/a29k/xm-ultra3.h
new file mode 100644
index 0000000..ec0b108
--- /dev/null
+++ b/gdb/config/a29k/xm-ultra3.h
@@ -0,0 +1,52 @@
+/* Host definitions for GDB running on an a29k NYU Ultracomputer
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+ Contributed by David Wood (wood@lab.ultra.nyu.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Here at NYU we have what we call an ULTRA3 PE board. So
+ ifdefs for ULTRA3 are my doing. At this point in time,
+ I don't know of any other Unixi running on the a29k. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#define HAVE_WAIT_STRUCT
+
+#ifndef L_SET
+# define L_SET 0 /* set the seek pointer */
+# define L_INCR 1 /* increment the seek pointer */
+# define L_XTND 2 /* extend the file size */
+#endif
+
+#ifndef O_RDONLY
+# define O_RDONLY 0
+# define O_WRONLY 1
+# define O_RDWR 2
+#endif
+
+#ifndef F_OK
+# define R_OK 4
+# define W_OK 2
+# define X_OK 1
+# define F_OK 0
+#endif
+
+/* System doesn't provide siginterrupt(). */
+#define NO_SIGINTERRUPT
+
+/* System uses a `short' to hold a process group ID. */
+#define SHORT_PGRP
diff --git a/gdb/config/alpha/alpha-linux.mh b/gdb/config/alpha/alpha-linux.mh
new file mode 100644
index 0000000..aa4a069
--- /dev/null
+++ b/gdb/config/alpha/alpha-linux.mh
@@ -0,0 +1,9 @@
+# Host: Little-endian Alpha running Linux
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-alphalinux.h
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o core-regset.o alpha-nat.o \
+ fork-child.o solib.o
+
+MMALLOC =
+MMALLOC_CFLAGS = -DNO_MMALLOC
diff --git a/gdb/config/alpha/alpha-linux.mt b/gdb/config/alpha/alpha-linux.mt
new file mode 100644
index 0000000..7789252
--- /dev/null
+++ b/gdb/config/alpha/alpha-linux.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian Alpha
+TDEPFILES= alpha-tdep.o
+TM_FILE= tm-alphalinux.h
diff --git a/gdb/config/alpha/alpha-osf1.mh b/gdb/config/alpha/alpha-osf1.mh
new file mode 100644
index 0000000..6ed0f95
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf1.mh
@@ -0,0 +1,5 @@
+# Host: Little-endian Alpha running OSF/1-1.x
+XDEPFILES=
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o osfsolib.o
diff --git a/gdb/config/alpha/alpha-osf1.mt b/gdb/config/alpha/alpha-osf1.mt
new file mode 100644
index 0000000..98f87c1
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf1.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian Alpha
+TDEPFILES= alpha-tdep.o
+TM_FILE= tm-alpha.h
diff --git a/gdb/config/alpha/alpha-osf2.mh b/gdb/config/alpha/alpha-osf2.mh
new file mode 100644
index 0000000..569b6fd
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf2.mh
@@ -0,0 +1,5 @@
+# Host: Little-endian Alpha running OSF/1-2.x using procfs
+XDEPFILES=
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf2.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o osfsolib.o procfs.o
diff --git a/gdb/config/alpha/alpha-osf3.mh b/gdb/config/alpha/alpha-osf3.mh
new file mode 100644
index 0000000..4997531
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf3.mh
@@ -0,0 +1,5 @@
+# Host: Little-endian Alpha running OSF/1-3.x and higher using procfs
+XDEPFILES=
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf3.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o osfsolib.o procfs.o
diff --git a/gdb/config/alpha/nm-linux.h b/gdb/config/alpha/nm-linux.h
new file mode 100644
index 0000000..eedb1a9
--- /dev/null
+++ b/gdb/config/alpha/nm-linux.h
@@ -0,0 +1,66 @@
+/* Native definitions for alpha running Linux.
+ Copyright (C) 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ argument regs. A0_REGNUM points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* Tell gdb that we can attach and detach other processes */
+#define ATTACH_DETACH
+
+/* ptrace register ``addresses'' are absolute. */
+
+#define U_REGS_OFFSET 0
+
+#define PTRACE_ARG3_TYPE long
+
+/* ptrace transfers longs, the ptrace man page is lying. */
+
+#define PTRACE_XFER_TYPE long
+
+/* The alpha does not step over a breakpoint, the manpage is lying again. */
+
+#define CANNOT_STEP_BREAKPOINT
+
+/* Linux has shared libraries. */
+
+#define GDB_TARGET_HAS_SHARED_LIBS
+
+/* Support for shared libraries. */
+
+#include "solib.h"
+
+#ifdef __ELF__
+#define SVR4_SHARED_LIBS
+#define TARGET_ELF64
+#endif
+
+/* This is a lie. It's actually in stdio.h. */
+
+#define PSIGNAL_IN_SIGNAL_H
+
+/* Given a pointer to either a gregset_t or fpregset_t, return a
+ pointer to the first register. */
+#define ALPHA_REGSET_BASE(regsetp) ((long *) (regsetp))
diff --git a/gdb/config/alpha/nm-osf.h b/gdb/config/alpha/nm-osf.h
new file mode 100644
index 0000000..e06140d
--- /dev/null
+++ b/gdb/config/alpha/nm-osf.h
@@ -0,0 +1,56 @@
+/* Native definitions for alpha running OSF/1.
+ Copyright (C) 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ argument regs. A0_REGNUM points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* ptrace register ``addresses'' are absolute. */
+
+#define U_REGS_OFFSET 0
+
+/* FIXME: Shouldn't the default definition in inferior.h be int* ? */
+
+#define PTRACE_ARG3_TYPE int*
+
+/* ptrace transfers longs, the ptrace man page is lying. */
+
+#define PTRACE_XFER_TYPE long
+
+/* The alpha does not step over a breakpoint, the manpage is lying again. */
+
+#define CANNOT_STEP_BREAKPOINT
+
+/* OSF/1 has shared libraries. */
+
+#define GDB_TARGET_HAS_SHARED_LIBS
+
+/* Support for shared libraries. */
+
+#include "solib.h"
+
+/* Given a pointer to either a gregset_t or fpregset_t, return a
+ pointer to the first register. */
+#define ALPHA_REGSET_BASE(regsetp) ((regsetp)->regs)
diff --git a/gdb/config/alpha/nm-osf2.h b/gdb/config/alpha/nm-osf2.h
new file mode 100644
index 0000000..01725ef
--- /dev/null
+++ b/gdb/config/alpha/nm-osf2.h
@@ -0,0 +1,54 @@
+/* Native definitions for alpha running OSF/1-2.x, using procfs.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic OSF/1 definitions. */
+#include "alpha/nm-osf.h"
+
+/* OSF/1-2.x has optional /proc support, try to use it instead of ptrace. */
+#define USE_PROC_FS
+#define HAVE_OPTIONAL_PROC_FS
+
+/* OSF/1 doesn't provide the standard fault definitions, so don't use them. */
+#define FAULTED_USE_SIGINFO
+
+/* Don't trace faults under OSF/1, rely on the posting of the appropriate
+ signal if fault tracing is disabled.
+ Tracing T_IFAULT under Alpha OSF/1 causes a `floating point enable'
+ fault from which we cannot continue (except by disabling the
+ tracing).
+ And as OSF/1 doesn't provide the standard fault definitions, the
+ mapping of faults to appropriate signals in procfs_wait is difficult. */
+#define PROCFS_DONT_TRACE_FAULTS
+
+/* Work around some peculiarities in the OSF/1 procfs implementation. */
+#define PROCFS_SIGPEND_OFFSET
+#define PROCFS_NEED_PIOCSSIG_FOR_KILL
+#define PROCFS_DONT_PIOCSSIG_CURSIG
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+/* poll() doesn't seem to work properly for /proc in this version of the OS.
+ If we only specify POLLPRI, things hang. It seems to get better when we set
+ POLLOUT, but that always returns POLLNVAL!!! Also, POLLOUT causes problems
+ on other OSes. */
+
+#define LOSING_POLL
diff --git a/gdb/config/alpha/nm-osf3.h b/gdb/config/alpha/nm-osf3.h
new file mode 100644
index 0000000..a1871a6
--- /dev/null
+++ b/gdb/config/alpha/nm-osf3.h
@@ -0,0 +1,26 @@
+/* Native definitions for alpha running OSF/1-3.x and higher, using procfs.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* OSF/1-3.x fixes some OSF/1-2.x procfs peculiarities and adds
+ a new one. */
+#include "alpha/nm-osf2.h"
+
+#undef PROCFS_NEED_PIOCSSIG_FOR_KILL
+#undef PROCFS_DONT_PIOCSSIG_CURSIG
+#define PROCFS_NEED_CLEAR_CURSIG_FOR_KILL
diff --git a/gdb/config/alpha/tm-alpha.h b/gdb/config/alpha/tm-alpha.h
new file mode 100644
index 0000000..d9b9812
--- /dev/null
+++ b/gdb/config/alpha/tm-alpha.h
@@ -0,0 +1,479 @@
+/* Definitions to make GDB run on an Alpha box under OSF1. This is
+ also used by the Alpha/Netware and Alpha/Linux targets.
+ Copyright 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_ALPHA_H
+#define TM_ALPHA_H
+
+#include "bfd.h"
+#include "coff/sym.h" /* Needed for PDR below. */
+#include "coff/symconst.h"
+
+#ifdef __STDC__
+struct frame_info;
+struct type;
+struct value;
+struct symbol;
+#endif
+
+#if !defined (TARGET_BYTE_ORDER)
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+/* Redefine some target bit sizes from the default. */
+
+#define TARGET_LONG_BIT 64
+#define TARGET_LONG_LONG_BIT 64
+#define TARGET_PTR_BIT 64
+
+/* Floating point is IEEE compliant */
+#define IEEE_FLOAT
+
+/* Number of traps that happen between exec'ing the shell
+ * to run an inferior, and when we finally get to
+ * the inferior code. This is 2 on most implementations.
+ */
+#define START_INFERIOR_TRAPS_EXPECTED 3
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) pc = alpha_skip_prologue(pc, 0)
+extern CORE_ADDR alpha_skip_prologue PARAMS ((CORE_ADDR addr, int lenient));
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) alpha_saved_pc_after_call(frame)
+extern CORE_ADDR
+alpha_saved_pc_after_call PARAMS ((struct frame_info *));
+
+/* Are we currently handling a signal ? */
+
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("__sigtramp", (name)))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define BREAKPOINT {0x80, 0, 0, 0} /* call_pal bpt */
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#ifndef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 4
+#endif
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 8
+
+/* Number of machine registers */
+
+#define NUM_REGS 66
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES \
+ { "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", \
+ "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", \
+ "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", \
+ "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
+ "pc", "vfp", \
+ }
+
+/* Register numbers of various important registers.
+ Note that most of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and FP_REGNUM is a "phony" register number which is too large
+ to be an actual register number as far as the user is concerned
+ but serves to get the desired value when passed to read_register. */
+
+#define V0_REGNUM 0 /* Function integer return value */
+#define T7_REGNUM 8 /* Return address register for OSF/1 __add* */
+#define GCC_FP_REGNUM 15 /* Used by gcc as frame register */
+#define A0_REGNUM 16 /* Loc of first arg during a subr call */
+#define T9_REGNUM 23 /* Return address register for OSF/1 __div* */
+#define T12_REGNUM 27 /* Contains start addr of current proc */
+#define SP_REGNUM 30 /* Contains address of top of stack */
+#define RA_REGNUM 26 /* Contains return address value */
+#define ZERO_REGNUM 31 /* Read-only register, always 0 */
+#define FP0_REGNUM 32 /* Floating point register 0 */
+#define FPA0_REGNUM 48 /* First float arg during a subr call */
+#define PC_REGNUM 64 /* Contains program counter */
+#define FP_REGNUM 65 /* Virtual frame pointer */
+
+#define CANNOT_FETCH_REGISTER(regno) \
+ ((regno) == FP_REGNUM || (regno) == ZERO_REGNUM)
+#define CANNOT_STORE_REGISTER(regno) \
+ ((regno) == FP_REGNUM || (regno) == ZERO_REGNUM)
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (NUM_REGS * 8)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * 8)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On Alphas, all regs are 8 bytes. */
+
+#define REGISTER_RAW_SIZE(N) 8
+
+/* Number of bytes of storage in the program's representation
+ for register N. On Alphas, all regs are 8 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) 8
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format.
+ The alpha needs a conversion between register and memory format if
+ the register is a floating point register and
+ memory format is float, as the register format must be double
+ or
+ memory format is an integer with 4 bytes or less, as the representation
+ of integers in floating point registers is different. */
+
+#define REGISTER_CONVERTIBLE(N) ((N) >= FP0_REGNUM && (N) < FP0_REGNUM + 32)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM, TYPE, FROM, TO) \
+ alpha_register_convert_to_virtual (REGNUM, TYPE, FROM, TO)
+extern void
+alpha_register_convert_to_virtual PARAMS ((int, struct type *, char *, char *));
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE, REGNUM, FROM, TO) \
+ alpha_register_convert_to_raw (TYPE, REGNUM, FROM, TO)
+extern void
+alpha_register_convert_to_raw PARAMS ((struct type *, int, char *, char *));
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) \
+ ? builtin_type_double : builtin_type_long) \
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. Handled by alpha_push_arguments. */
+
+#define STORE_STRUCT_RETURN(addr, sp) /**/
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ alpha_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void
+alpha_extract_return_value PARAMS ((struct type *, char *, char *));
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ alpha_store_return_value(TYPE, VALBUF)
+extern void
+alpha_store_return_value PARAMS ((struct type *, char *));
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+/* The address is passed in a0 upon entry to the function, but when
+ the function exits, the compiler has copied the value to v0. This
+ convention is specified by the System V ABI, so I think we can rely
+ on it. */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+ REGISTER_RAW_SIZE (V0_REGNUM)))
+
+/* Structures are returned by ref in extra arg0 */
+#define USE_STRUCT_CONVENTION(gcc_p, type) 1
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+#define FRAME_CHAIN(thisframe) (CORE_ADDR) alpha_frame_chain (thisframe)
+extern CORE_ADDR alpha_frame_chain PARAMS ((struct frame_info *));
+
+/* Define other aspects of the stack frame. */
+
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+/* We handle this differently for alpha, and maybe we should not */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;}
+
+/* Saved Pc. */
+
+#define FRAME_SAVED_PC(FRAME) (alpha_frame_saved_pc(FRAME))
+extern CORE_ADDR
+alpha_frame_saved_pc PARAMS ((struct frame_info *));
+
+/* The alpha has two different virtual pointers for arguments and locals.
+
+ The virtual argument pointer is pointing to the bottom of the argument
+ transfer area, which is located immediately below the virtual frame
+ pointer. Its size is fixed for the native compiler, it is either zero
+ (for the no arguments case) or large enough to hold all argument registers.
+ gcc uses a variable sized argument transfer area. As it has
+ to stay compatible with the native debugging tools it has to use the same
+ virtual argument pointer and adjust the argument offsets accordingly.
+
+ The virtual local pointer is localoff bytes below the virtual frame
+ pointer, the value of localoff is obtained from the PDR. */
+
+#define ALPHA_NUM_ARG_REGS 6
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame - (ALPHA_NUM_ARG_REGS * 8))
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame - (fi)->localoff)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(num, fi) ((num) = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+extern void alpha_find_saved_regs PARAMS ((struct frame_info *));
+
+#define FRAME_INIT_SAVED_REGS(frame_info) \
+ do { \
+ if ((frame_info)->saved_regs == NULL) \
+ alpha_find_saved_regs (frame_info); \
+ (frame_info)->saved_regs[SP_REGNUM] = (frame_info)->frame; \
+ } while (0)
+
+
+/* Things needed for making the inferior call functions. */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = alpha_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+alpha_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME alpha_push_dummy_frame()
+extern void
+alpha_push_dummy_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME alpha_pop_frame()
+extern void
+alpha_pop_frame PARAMS ((void));
+
+/* Alpha OSF/1 inhibits execution of code on the stack.
+ But there is no need for a dummy on the alpha. PUSH_ARGUMENTS
+ takes care of all argument handling and bp_call_dummy takes care
+ of stopping the dummy. */
+
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+
+/* On the Alpha the call dummy code is never copied to user space,
+ stopping the user call is achieved via a bp_call_dummy breakpoint.
+ But we need a fake CALL_DUMMY definition to enable the proper
+ call_function_by_hand and to avoid zero length array warnings
+ in valops.c */
+
+#define CALL_DUMMY { 0 } /* Content doesn't matter. */
+
+#define CALL_DUMMY_START_OFFSET (0)
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+extern CORE_ADDR alpha_call_dummy_address PARAMS ((void));
+#define CALL_DUMMY_ADDRESS() alpha_call_dummy_address()
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME.
+ We only have to set RA_REGNUM to the dummy breakpoint address
+ and T12_REGNUM (the `procedure value register') to the function address. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ CORE_ADDR bp_address = CALL_DUMMY_ADDRESS (); \
+ if (bp_address == 0) \
+ error ("no place to put call"); \
+ write_register (RA_REGNUM, bp_address); \
+ write_register (T12_REGNUM, fun); \
+}
+
+/* There's a mess in stack frame creation. See comments in blockframe.c
+ near reference to INIT_FRAME_PC_FIRST. */
+
+#define INIT_FRAME_PC(fromleaf, prev) /* nada */
+
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+ (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
+ (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
+
+/* Special symbol found in blocks associated with routines. We can hang
+ alpha_extra_func_info_t's off of this. */
+
+#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
+extern void ecoff_relocate_efi PARAMS ((struct symbol *, CORE_ADDR));
+
+/* Specific information about a procedure.
+ This overlays the ALPHA's PDR records,
+ alpharead.c (ab)uses this to save memory */
+
+typedef struct alpha_extra_func_info {
+ long numargs; /* number of args to procedure (was iopt) */
+ PDR pdr; /* Procedure descriptor record */
+} *alpha_extra_func_info_t;
+
+/* Define the extra_func_info that mipsread.c needs.
+ FIXME: We should define our own PDR interface, perhaps in a separate
+ header file. This would get rid of the <bfd.h> inclusion in all sources
+ and would abstract the mips/alpha interface from ecoff. */
+#define mips_extra_func_info alpha_extra_func_info
+#define mips_extra_func_info_t alpha_extra_func_info_t
+
+#define EXTRA_FRAME_INFO \
+ int localoff; \
+ int pc_reg; \
+ alpha_extra_func_info_t proc_desc;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
+extern void
+init_extra_frame_info PARAMS ((struct frame_info *));
+
+#define PRINT_EXTRA_FRAME_INFO(fi) \
+ { \
+ if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \
+ printf_filtered (" frame pointer is at %s+%d\n", \
+ REGISTER_NAME (fi->proc_desc->pdr.framereg), \
+ fi->proc_desc->pdr.frameoffset); \
+ }
+
+/* It takes two values to specify a frame on the ALPHA. Sigh.
+
+ In fact, at the moment, the *PC* is the primary value that sets up
+ a frame. The PC is looked up to see what function it's in; symbol
+ information from that function tells us which register is the frame
+ pointer base, and what offset from there is the "virtual frame pointer".
+ (This is usually an offset from SP.) FIXME -- this should be cleaned
+ up so that the primary value is the SP, and the PC is used to disambiguate
+ multiple functions with the same SP that are at different stack levels. */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
+
+/* This is used by heuristic_proc_start. It should be shot it the head. */
+#ifndef VM_MIN_ADDRESS
+#define VM_MIN_ADDRESS (CORE_ADDR)0x120000000
+#endif
+
+/* If PC is in a shared library trampoline code, return the PC
+ where the function itself actually starts. If not, return 0. */
+#define SKIP_TRAMPOLINE_CODE(pc) find_solib_trampoline_target (pc)
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee.
+
+ For the alpha, it appears that the debug info marks the parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are always passed in as doubles. Thus by setting this to 1, both
+ types of calls will work. */
+
+#define COERCE_FLOAT_TO_DOUBLE 1
+
+/* Return TRUE if procedure descriptor PROC is a procedure descriptor
+ that refers to a dynamically generated sigtramp function.
+
+ OSF/1 doesn't use dynamic sigtramp functions, so this is always
+ FALSE. */
+
+#define PROC_DESC_IS_DYN_SIGTRAMP(proc) (0)
+#define SET_PROC_DESC_IS_DYN_SIGTRAMP(proc)
+
+/* If PC is inside a dynamically generated sigtramp function, return
+ how many bytes the program counter is beyond the start of that
+ function. Otherwise, return a negative value.
+
+ OSF/1 doesn't use dynamic sigtramp functions, so this always
+ returns -1. */
+
+#define DYNAMIC_SIGTRAMP_OFFSET(pc) (-1)
+
+/* Translate a signal handler frame into the address of the sigcontext
+ structure. */
+
+#define SIGCONTEXT_ADDR(frame) \
+ (read_memory_integer ((frame)->next ? frame->next->frame : frame->frame, 8))
+
+/* If FRAME refers to a sigtramp frame, return the address of the next
+ frame. */
+
+#define FRAME_PAST_SIGTRAMP_FRAME(frame, pc) \
+ (alpha_osf_skip_sigtramp_frame (frame, pc))
+extern CORE_ADDR alpha_osf_skip_sigtramp_frame PARAMS ((struct frame_info *, CORE_ADDR));
+
+#endif /* TM_ALPHA_H */
diff --git a/gdb/config/alpha/tm-alphalinux.h b/gdb/config/alpha/tm-alphalinux.h
new file mode 100644
index 0000000..d836a70
--- /dev/null
+++ b/gdb/config/alpha/tm-alphalinux.h
@@ -0,0 +1,80 @@
+/* Definitions to make GDB run on an Alpha box under Linux. The
+ definitions here are used when the _target_ system is running Linux.
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_LINUXALPHA_H
+#define TM_LINUXALPHA_H
+
+#include "alpha/tm-alpha.h"
+
+/* Are we currently handling a signal ? */
+
+extern long alpha_linux_sigtramp_offset PARAMS ((CORE_ADDR));
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) (alpha_linux_sigtramp_offset (pc) >= 0)
+
+/* Get start and end address of sigtramp handler. */
+
+#define SIGTRAMP_START(pc) (pc - alpha_linux_sigtramp_offset (pc))
+#define SIGTRAMP_END(pc) (SIGTRAMP_START(pc) + 3*4)
+
+
+/* Number of traps that happen between exec'ing the shell to run an
+ inferior, and when we finally get to the inferior code. This is 2
+ on Linux and most implementations. */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Return TRUE if procedure descriptor PROC is a procedure descriptor
+ that refers to a dynamically generated sigtramp function. */
+
+#undef PROC_DESC_IS_DYN_SIGTRAMP
+#define PROC_SIGTRAMP_MAGIC 0x0e0f0f0f
+#define PROC_DESC_IS_DYN_SIGTRAMP(proc) ((proc)->pdr.isym \
+ == PROC_SIGTRAMP_MAGIC)
+#undef SET_PROC_DESC_IS_DYN_SIGTRAMP
+#define SET_PROC_DESC_IS_DYN_SIGTRAMP(proc) ((proc)->pdr.isym \
+ = PROC_SIGTRAMP_MAGIC)
+
+/* If PC is inside a dynamically generated sigtramp function, return
+ how many bytes the program counter is beyond the start of that
+ function. Otherwise, return a negative value. */
+
+#undef DYNAMIC_SIGTRAMP_OFFSET
+#define DYNAMIC_SIGTRAMP_OFFSET(pc) (alpha_linux_sigtramp_offset (pc))
+
+/* Translate a signal handler frame into the address of the sigcontext
+ structure. */
+
+#undef SIGCONTEXT_ADDR
+#define SIGCONTEXT_ADDR(frame) ((frame)->frame - 0x298)
+
+/* If FRAME refers to a sigtramp frame, return the address of the next frame.
+
+ Under Linux, sigtramp handlers have dynamically generated procedure
+ descriptors that make this hack unnecessary. */
+
+#undef FRAME_PAST_SIGTRAMP_FRAME
+#define FRAME_PAST_SIGTRAMP_FRAME(frame, pc) (0)
+
+/* We need this for the SOLIB_TRAMPOLINE stuff. */
+#include "tm-sysv4.h"
+
+#endif /* TM_LINUXALPHA_H */
diff --git a/gdb/config/alpha/xm-alphalinux.h b/gdb/config/alpha/xm-alphalinux.h
new file mode 100644
index 0000000..a7aeab0
--- /dev/null
+++ b/gdb/config/alpha/xm-alphalinux.h
@@ -0,0 +1,29 @@
+/* Host definitions for GDB running on an Alpha under Linux
+ Copyright (C) 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+/* The alpha has no siginterrupt routine. */
+#define NO_SIGINTERRUPT
+
+#define HAVE_TERMIOS
+#define HAVE_SIGSETMASK 1
+#define USG
diff --git a/gdb/config/alpha/xm-alphaosf.h b/gdb/config/alpha/xm-alphaosf.h
new file mode 100644
index 0000000..40b7fe0
--- /dev/null
+++ b/gdb/config/alpha/xm-alphaosf.h
@@ -0,0 +1,27 @@
+/* Host definitions for GDB running on an alpha under OSF/1
+ Copyright (C) 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+/* The alpha has no siginterrupt routine. */
+#define NO_SIGINTERRUPT
+
+#define HAVE_TERMIOS
diff --git a/gdb/config/arc/arc.mt b/gdb/config/arc/arc.mt
new file mode 100644
index 0000000..8ee8c3d
--- /dev/null
+++ b/gdb/config/arc/arc.mt
@@ -0,0 +1,3 @@
+# Target: ARC processor
+TDEPFILES = arc-tdep.o
+TM_FILE = tm-arc.h
diff --git a/gdb/config/arc/tm-arc.h b/gdb/config/arc/tm-arc.h
new file mode 100644
index 0000000..e964bef
--- /dev/null
+++ b/gdb/config/arc/tm-arc.h
@@ -0,0 +1,347 @@
+/* Parameters for target machine ARC, for GDB, the GNU debugger.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Used by arc-tdep.c to set the default cpu type. */
+#define DEFAULT_ARC_CPU_TYPE "base"
+
+/* Byte order is selectable. */
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* We have IEEE floating point, if we have any float at all. */
+#define IEEE_FLOAT
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
+ the PC past some of the prologue, but stops as soon as it
+ knows that the function has a frame. Its result is equal
+ to its input PC if the function is frameless, unequal otherwise. */
+
+#define SKIP_PROLOGUE(pc) \
+ { pc = skip_prologue (pc, 0); }
+#define SKIP_PROLOGUE_FRAMELESS_P(pc) \
+ { pc = skip_prologue (pc, 1); }
+extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int));
+
+/* Sequence of bytes for breakpoint instruction.
+ ??? The current value is "sr -1,[-1]" and is for the simulator only.
+ The simulator watches for this and does the right thing.
+ The hardware version will have to associate with each breakpoint
+ the sequence "flag 1; nop; nop; nop". IE: The breakpoint insn will not
+ be a fixed set of bits but instead will be a branch to a semi-random
+ address. Presumably this will be cleaned up for "second silicon". */
+#define BIG_BREAKPOINT { 0x12, 0x1f, 0xff, 0xff }
+#define LITTLE_BREAKPOINT { 0xff, 0xff, 0x1f, 0x12 }
+
+/* Given the exposed pipeline, there isn't any one correct value.
+ However, this value must be 4. GDB can't handle any other value (other than
+ zero). See for example infrun.c:
+ "prev_pc != stop_pc - DECR_PC_AFTER_BREAK" */
+/* FIXME */
+#define DECR_PC_AFTER_BREAK 8
+
+/* We don't have a reliable single step facility.
+ ??? We do have a cycle single step facility, but that won't work. */
+#define SOFTWARE_SINGLE_STEP_P 1
+extern void arc_software_single_step PARAMS ((unsigned int, int));
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) arc_software_single_step (sig, bp_p)
+
+/* FIXME: Need to set STEP_SKIPS_DELAY. */
+
+/* Given a pc value as defined by the hardware, return the real address.
+ Remember that on the ARC blink contains that status register which
+ includes PC + flags (so we have to mask out the flags). */
+#define ARC_PC_TO_REAL_ADDRESS(pc) (((pc) & 0xffffff) << 2)
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function
+ executes some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ (ARC_PC_TO_REAL_ADDRESS (read_register (BLINK_REGNUM)))
+
+/* Stack grows upward */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+#define NUM_REGS 92
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES \
+{ \
+ /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ /* 8 */ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ /* 16 */ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+ /* 24 */ "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \
+ /* 32 */ "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
+ /* 40 */ "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
+ /* 48 */ "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
+ /* 56 */ "r56", "mlo", "mmid", "mhi", "lp_count", \
+ /* 61 */ "status", "sema", "lp_start", "lp_end", "identity", "debug", \
+ /* 67 */ "aux10", "aux11", "aux12", "aux13", "aux14", \
+ /* 72 */ "aux15", "aux16", "aux17", "aux18", "aux19", \
+ /* 77 */ "aux1a", "aux1b", "aux1c", "aux1d", "aux1e", \
+ /* 82 */ "aux1f", "aux20", "aux21", "aux22", \
+ /* 86 */ "aux30", "aux31", "aux32", "aux33", "aux40", \
+ /* 91 */ "pc" \
+}
+
+/* Register numbers of various important registers (used to index
+ into arrays of register names and register values). */
+
+#define R0_REGNUM 0 /* First local register */
+#define R59_REGNUM 59 /* Last local register */
+#define FP_REGNUM 27 /* Contains address of executing stack frame */
+#define SP_REGNUM 28 /* stack pointer */
+#define BLINK_REGNUM 31 /* link register */
+#define STA_REGNUM 61 /* processor status word */
+#define PC_REGNUM 91 /* instruction pointer */
+#define AUX_BEG_REGNUM 61 /* aux reg begins */
+#define AUX_END_REGNUM 90 /* aux reg ends, pc not real aux reg */
+
+/* Fake registers used to mark immediate data. */
+#define SHIMM_FLAG_REGNUM 61
+#define LIMM_REGNUM 62
+#define SHIMM_REGNUM 63
+
+#define AUX_REG_MAP \
+{ \
+ { 0, 1, 2, 3, 4, 5, \
+ 16, -1, -1, -1, -1, \
+ -1, -1, -1, -1, -1, \
+ -1, -1, -1, -1, 30, \
+ -1, 32, 33, -1, \
+ 48, 49, 50, 51, 64, \
+ 0 \
+ }, \
+ { 0, 1, 2, 3, 4, 5, \
+ 16, -1, -1, -1, -1, \
+ -1, -1, -1, -1, -1, \
+ -1, -1, -1, -1, 30, \
+ 31, 32, 33, -1, \
+ -1, -1, -1, -1, -1, \
+ 0 \
+ }, \
+ { 0, 1, 2, 3, 4, 5, \
+ 16, 17, 18, 19, 20, \
+ 21, 22, 23, 24, 25, \
+ 26, 27, 28, 29, 30, \
+ 31, 32, 33, 34, \
+ -1, -1, -1, -1, -1, \
+ 0 \
+ } \
+}
+
+#define PFP_REGNUM R0_REGNUM /* Previous frame pointer */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for register N. */
+#define REGISTER_BYTE(N) (4*(N))
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Number of bytes of storage in the program's representation for register N. */
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+#define REGISTER_VIRTUAL_TYPE(N) (builtin_type_int)
+
+
+/* Macros for understanding function return values... */
+
+/* Does the specified function use the "struct returning" convention
+ or the "value returning" convention? The "value returning" convention
+ almost invariably returns the entire value in registers. The
+ "struct returning" convention often returns the entire value in
+ memory, and passes a pointer (out of or into the function) saying
+ where the value (is or should go).
+
+ Since this sometimes depends on whether it was compiled with GCC,
+ this is also an argument. This is used in call_function to build a
+ stack, and in value_being_returned to print return values.
+
+ On arc, a structure is always retunred with pointer in r0. */
+
+#define USE_STRUCT_CONVENTION(gcc_p, type) 1
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. This is only called if USE_STRUCT_CONVENTION for this
+ type is 0.
+*/
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy(VALBUF, REGBUF+REGISTER_BYTE(R0_REGNUM), TYPE_LENGTH (TYPE))
+
+/* If USE_STRUCT_CONVENTION produces a 1,
+ extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (error("Don't know where large structure is returned on arc"), 0)
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format, for "value returning" functions.
+ For 'return' command: not (yet) implemented for arc. */
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ error ("Returning values from functions is not implemented in arc gdb")
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ error ("Returning values from functions is not implemented in arc gdb")
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* We cache information about saved registers in the frame structure,
+ to save us from having to re-scan function prologues every time
+ a register in a non-current frame is accessed. */
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs *fsr; \
+ CORE_ADDR arg_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+ so that FRAME_FIND_SAVED_REGS () will know to allocate and
+ initialize a frame_saved_regs struct the first time it is called.
+ Set the arg_pointer to -1, which is not valid; 0 and other values
+ indicate real, cached values. */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ ((fi)->fsr = 0, (fi)->arg_pointer = -1)
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+/* On the arc, we get the chain pointer by reading the PFP saved
+ on the stack. */
+/* The PFP and RPC is in fp and fp+4. */
+
+#define FRAME_CHAIN(thisframe) \
+ (read_memory_integer (FRAME_FP (thisframe), 4))
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+ and has no caller. */
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ do { \
+ if ((FI)->signal_handler_caller) \
+ (FRAMELESS) = 0; \
+ else \
+ (FRAMELESS) = frameless_look_for_prologue (FI); \
+ } while (0)
+
+/* Where is the PC for a specific frame.
+ A leaf function may never save blink, so we have to check for that here. */
+
+#define FRAME_SAVED_PC(frame) (arc_frame_saved_pc (frame))
+struct frame_info; /* in case frame.h not included yet */
+CORE_ADDR arc_frame_saved_pc PARAMS ((struct frame_info *));
+
+/* If the argument is on the stack, it will be here.
+ We cache this value in the frame info if we've already looked it up. */
+/* ??? Is the arg_pointer check necessary? */
+
+#define FRAME_ARGS_ADDRESS(fi) \
+ (((fi)->arg_pointer != -1) ? (fi)->arg_pointer : (fi)->frame)
+
+/* This is the same except it should return 0 when
+ it does not really know where the args are, rather than guessing.
+ This value is not cached since it is only used infrequently. */
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set NUMARGS to the number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) (numargs = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Produce the positions of the saved registers in a stack frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info_addr, sr) \
+ frame_find_saved_regs (frame_info_addr, &sr)
+extern void frame_find_saved_regs(); /* See arc-tdep.c */
+
+
+/* Things needed for making calls to functions in the inferior process */
+#define PUSH_DUMMY_FRAME \
+ push_dummy_frame ()
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+#define POP_FRAME \
+ pop_frame ()
+
+/* This sequence of words is the instructions bl xxxx, flag 1 */
+#define CALL_DUMMY { 0x28000000, 0x1fbe8001 }
+#define CALL_DUMMY_LENGTH 8
+
+/* Start execution at beginning of dummy */
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at 'dummyname'.*/
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ int from, to, delta, loc; \
+ loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); \
+ from = loc + 4; \
+ to = (int)(fun); \
+ delta = (to - from) >> 2; \
+ *((char *)(dummyname) + 1) = (delta & 0x1); \
+ *((char *)(dummyname) + 2) = ((delta >> 1) & 0xff); \
+ *((char *)(dummyname) + 3) = ((delta >> 9) & 0xff); \
+ *((char *)(dummyname) + 4) = ((delta >> 17) & 0x7); \
+}
+
diff --git a/gdb/config/arm/arm.mh b/gdb/config/arm/arm.mh
new file mode 100644
index 0000000..4fcf0de
--- /dev/null
+++ b/gdb/config/arm/arm.mh
@@ -0,0 +1,5 @@
+# Host: Acorn RISC machine running RISCiX (4.3bsd)
+XDEPFILES= infptrace.o inftarg.o fork-child.o arm-xdep.o arm-convert.o
+XM_FILE= xm-arm.h
+
+NAT_FILE= nm-arm.h
diff --git a/gdb/config/arm/arm.mt b/gdb/config/arm/arm.mt
new file mode 100644
index 0000000..4933c46
--- /dev/null
+++ b/gdb/config/arm/arm.mt
@@ -0,0 +1,6 @@
+# Target: Acorn RISC machine (ARM) with simulator
+TDEPFILES= arm-tdep.o remote-rdp.o
+TM_FILE= tm-arm.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/arm/libsim.a
diff --git a/gdb/config/arm/nm-arm.h b/gdb/config/arm/nm-arm.h
new file mode 100644
index 0000000..970a885
--- /dev/null
+++ b/gdb/config/arm/nm-arm.h
@@ -0,0 +1,27 @@
+/* Definitions to make GDB run on an ARM under RISCiX (4.3bsd).
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0x01000000 - (UPAGES * NBPG))
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h
new file mode 100644
index 0000000..b327ac3
--- /dev/null
+++ b/gdb/config/arm/tm-arm.h
@@ -0,0 +1,453 @@
+/* Definitions to make GDB target for an ARM
+ Copyright 1986, 1987, 1989, 1991, 1993, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifdef __STDC__ /* Forward decls for prototypes */
+struct type;
+struct value;
+#endif
+
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* IEEE format floating point */
+
+#define IEEE_FLOAT
+
+/* FIXME: may need a floatformat_ieee_double_bigbyte_littleword format for
+ BIG_ENDIAN use. -fnf */
+
+#define TARGET_DOUBLE_FORMAT (target_byte_order == BIG_ENDIAN \
+ ? &floatformat_ieee_double_big \
+ : &floatformat_ieee_double_littlebyte_bigword)
+
+/* When reading symbols, we need to zap the low bit of the address, which
+ may be set to 1 for Thumb functions. */
+
+#define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x1)
+
+/* Remove useless bits from addresses in a running program. */
+
+CORE_ADDR arm_addr_bits_remove PARAMS ((CORE_ADDR));
+
+#define ADDR_BITS_REMOVE(val) (arm_addr_bits_remove (val))
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+extern CORE_ADDR arm_skip_prologue PARAMS ((CORE_ADDR pc));
+
+#define SKIP_PROLOGUE(pc) { pc = arm_skip_prologue (pc); }
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) arm_saved_pc_after_call (frame)
+struct frame_info;
+extern CORE_ADDR arm_saved_pc_after_call PARAMS ((struct frame_info *));
+
+/* I don't know the real values for these. */
+#define TARGET_UPAGES UPAGES
+#define TARGET_NBPG NBPG
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR (0x01000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* !!!! if we're using RDP, then we're inserting breakpoints and storing
+ their handles instread of what was in memory. It is nice that
+ this is the same size as a handle - otherwise remote-rdp will
+ have to change. */
+
+/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
+ 16- or 32-bit breakpoint should be used. It returns a pointer
+ to a string of bytes that encode a breakpoint instruction, stores
+ the length of the string to *lenptr, and adjusts the pc (if necessary) to
+ point to the actual memory location where the breakpoint should be
+ inserted. */
+
+extern breakpoint_from_pc_fn arm_breakpoint_from_pc;
+#define BREAKPOINT_FROM_PC(pcptr, lenptr) arm_breakpoint_from_pc (pcptr, lenptr)
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* code to execute to print interesting information about the
+ * floating point processor (if any)
+ * No need to define if there is nothing to do.
+ */
+#define FLOAT_INFO { arm_float_info (); }
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+/* Note: I make a fake copy of the pc in register 25 (calling it ps) so
+ that I can clear the status bits from pc (register 15) */
+
+#define NUM_REGS 26
+
+/* An array of names of registers. */
+
+extern char **arm_register_names;
+#define REGISTER_NAME(i) arm_register_names[i]
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define A1_REGNUM 0 /* first integer-like argument */
+#define A4_REGNUM 3 /* last integer-like argument */
+#define AP_REGNUM 11
+#define FP_REGNUM 11 /* Contains address of executing stack frame */
+#define SP_REGNUM 13 /* Contains address of top of stack */
+#define LR_REGNUM 14 /* address to return to from a function call */
+#define PC_REGNUM 15 /* Contains program counter */
+#define F0_REGNUM 16 /* first floating point register */
+#define F3_REGNUM 19 /* last floating point argument register */
+#define F7_REGNUM 23 /* last floating point register */
+#define FPS_REGNUM 24 /* floating point status register */
+#define PS_REGNUM 25 /* Contains processor status */
+
+#define THUMB_FP_REGNUM 7 /* R7 is frame register on Thumb */
+
+#define ARM_NUM_ARG_REGS 4
+#define ARM_LAST_ARG_REGNUM A4_REGNUM
+#define ARM_NUM_FP_ARG_REGS 4
+#define ARM_LAST_FP_ARG_REGNUM F3_REGNUM
+
+/* Instruction condition field values. */
+#define INST_EQ 0x0
+#define INST_NE 0x1
+#define INST_CS 0x2
+#define INST_CC 0x3
+#define INST_MI 0x4
+#define INST_PL 0x5
+#define INST_VS 0x6
+#define INST_VC 0x7
+#define INST_HI 0x8
+#define INST_LS 0x9
+#define INST_GE 0xa
+#define INST_LT 0xb
+#define INST_GT 0xc
+#define INST_LE 0xd
+#define INST_AL 0xe
+#define INST_NV 0xf
+
+#define FLAG_N 0x80000000
+#define FLAG_Z 0x40000000
+#define FLAG_C 0x20000000
+#define FLAG_V 0x10000000
+
+
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (16*4 + 12*8 + 4 + 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) (((N) < F0_REGNUM) ? (N)*4 : \
+ (((N) < PS_REGNUM) ? 16*4 + ((N) - 16)*12 : \
+ 16*4 + 8*12 + ((N) - FPS_REGNUM) * 4))
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the vax, all regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) (((N) < F0_REGNUM || (N) >= FPS_REGNUM) ? 4 : 12)
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the vax, all regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((N) < F0_REGNUM || (N) >= FPS_REGNUM) ? 4 : 8)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 12
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+#define REGISTER_CONVERTIBLE(N) ((unsigned)(N) - F0_REGNUM < 8)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ convert_from_extended ((FROM), & val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ convert_to_extended (&val, (TO)); \
+}
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((unsigned)(N) - F0_REGNUM) < 8 ? builtin_type_double : builtin_type_int)
+
+/* The system C compiler uses a similar structure return convention to gcc */
+extern use_struct_convention_fn arm_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) arm_use_struct_convention (gcc_p, type)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (0, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ convert_from_extended (REGBUF + REGISTER_BYTE (F0_REGNUM), VALBUF); \
+ else \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) { \
+ char _buf[MAX_REGISTER_RAW_SIZE]; \
+ convert_to_extended (VALBUF, _buf); \
+ write_register_bytes (REGISTER_BYTE (F0_REGNUM), _buf, MAX_REGISTER_RAW_SIZE); \
+ } else \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Specify that for the native compiler variables for a particular
+ lexical context are listed after the beginning LBRAC instead of
+ before in the executables list of symbols. */
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p))
+
+
+/* Define other aspects of the stack frame.
+ We keep the offsets of all saved registers, 'cause we need 'em a lot!
+ We also keep the current size of the stack frame, and the offset of
+ the frame pointer from the stack pointer (for frameless functions, and
+ when we're still in the prologue of a function with a frame) */
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs fsr; \
+ int framesize; \
+ int frameoffset; \
+ int framereg;
+
+extern void arm_init_extra_frame_info PARAMS ((struct frame_info *fi));
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) arm_init_extra_frame_info (fi)
+
+/* Return the frame address. On ARM, it is R11; on Thumb it is R7. */
+CORE_ADDR arm_target_read_fp PARAMS ((void));
+#define TARGET_READ_FP() arm_target_read_fp ()
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+
+#define FRAME_CHAIN(thisframe) (CORE_ADDR) arm_frame_chain (thisframe)
+extern CORE_ADDR arm_frame_chain PARAMS ((struct frame_info *));
+
+extern int arm_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) arm_frame_chain_valid (chain, thisframe)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+{ \
+ CORE_ADDR func_start, after_prologue; \
+ func_start = (get_pc_function_start ((FI)->pc) + \
+ FUNCTION_START_OFFSET); \
+ after_prologue = func_start; \
+ SKIP_PROLOGUE (after_prologue); \
+ (FRAMELESS) = (after_prologue == func_start); \
+}
+
+/* Saved Pc. */
+
+#define FRAME_SAVED_PC(FRAME) arm_frame_saved_pc (FRAME)
+extern CORE_ADDR arm_frame_saved_pc PARAMS ((struct frame_info *));
+
+#define FRAME_ARGS_ADDRESS(fi) (fi->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) (numargs = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+struct frame_saved_regs;
+struct frame_info;
+void frame_find_saved_regs PARAMS((struct frame_info *fi,
+ struct frame_saved_regs *fsr));
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ arm_frame_find_saved_regs (frame_info, &(frame_saved_regs));
+
+
+/* Things needed for making the inferior call functions. */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = arm_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+arm_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+void arm_push_dummy_frame PARAMS ((void));
+
+#define PUSH_DUMMY_FRAME arm_push_dummy_frame ()
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+void arm_pop_frame PARAMS ((void));
+
+#define POP_FRAME arm_pop_frame ()
+
+/* This sequence of words is the instructions
+
+ mov lr,pc
+ mov pc,r4
+ illegal
+
+ Note this is 12 bytes. */
+
+#define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xE7FFDEFE}
+
+#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET arm_call_dummy_breakpoint_offset()
+extern int arm_call_dummy_breakpoint_offset PARAMS ((void));
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ arm_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
+
+void arm_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+ int nargs, struct value **args,
+ struct type *type, int gcc_p));
+
+CORE_ADDR arm_get_next_pc PARAMS ((CORE_ADDR));
+
+/* Functions for dealing with Thumb call thunks. */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) arm_in_call_stub (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc) arm_skip_stub (pc)
+extern int arm_in_call_stub PARAMS ((CORE_ADDR pc, char *name));
+extern CORE_ADDR arm_skip_stub PARAMS ((CORE_ADDR pc));
+
+/* Function to determine whether MEMADDR is in a Thumb function. */
+extern int arm_pc_is_thumb PARAMS ((bfd_vma memaddr));
+
+/* Function to determine whether MEMADDR is in a call dummy called from
+ a Thumb function. */
+extern int arm_pc_is_thumb_dummy PARAMS ((bfd_vma memaddr));
+
+/* Macros for setting and testing a bit in a minimal symbol that
+ marks it as Thumb function. The MSB of the minimal symbol's
+ "info" field is used for this purpose. This field is already
+ being used to store the symbol size, so the assumption is
+ that the symbol size cannot exceed 2^31.
+
+ COFF_MAKE_MSYMBOL_SPECIAL
+ ELF_MAKE_MSYMBOL_SPECIAL tests whether the COFF or ELF symbol corresponds
+ to a thumb function, and sets a "special" bit in a
+ minimal symbol to indicate that it does
+ MSYMBOL_SET_SPECIAL actually sets the "special" bit
+ MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
+ MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
+ the "info" field with the "special" bit masked out
+*/
+
+extern int coff_sym_is_thumb(int val);
+#define MSYMBOL_SET_SPECIAL(msym) \
+ MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000)
+#define MSYMBOL_IS_SPECIAL(msym) \
+ (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
+#define MSYMBOL_SIZE(msym) \
+ ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
+
+/* Thumb symbol are of type STT_LOPROC, (synonymous with STT_ARM_TFUNC) */
+#define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
+ { if(ELF_ST_TYPE(((elf_symbol_type *)(sym))->internal_elf_sym.st_info) == STT_LOPROC) \
+ MSYMBOL_SET_SPECIAL(msym); }
+
+#define COFF_MAKE_MSYMBOL_SPECIAL(val,msym) \
+ { if(coff_sym_is_thumb(val)) MSYMBOL_SET_SPECIAL(msym); }
+
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) 0
diff --git a/gdb/config/arm/xm-arm.h b/gdb/config/arm/xm-arm.h
new file mode 100644
index 0000000..34c0bd3
--- /dev/null
+++ b/gdb/config/arm/xm-arm.h
@@ -0,0 +1,76 @@
+/* Definitions to make GDB run on an ARM under RISCiX (4.3bsd).
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+
+#if 0
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
+ 0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0}
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movl $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("pushl fp");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("pushl 8(sp)"); \
+ asm ("pushl 8(sp)"); \
+ asm ("pushal 0x14(sp)"); \
+ asm ("pushr $037777"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("popr $037777"); \
+ asm ("subl2 $8,(sp)"); \
+ asm ("movl (sp),sp"); \
+ asm ("rei"); }
+#endif /* 0 */
diff --git a/gdb/config/convex/Convex.notes b/gdb/config/convex/Convex.notes
new file mode 100644
index 0000000..28d336b
--- /dev/null
+++ b/gdb/config/convex/Convex.notes
@@ -0,0 +1,163 @@
+
+@node Convex,,, Top
+@appendix Convex-specific info
+@cindex Convex notes
+
+Scalar registers are 64 bits long, which is a pain since
+left half of an S register frequently contains noise.
+Therefore there are two ways to obtain the value of an S register.
+
+@table @kbd
+@item $s0
+returns the low half of the register as an int
+
+@item $S0
+returns the whole register as a long long
+@end table
+
+You can print the value in floating point by using @samp{p/f $s0} or @samp{p/f $S0}
+to print a single or double precision value.
+
+@cindex vector registers
+Vector registers are handled similarly, with @samp{$V0} denoting the whole
+64-bit register and @kbd{$v0} denoting the 32-bit low half; @samp{p/f $v0}
+or @samp{p/f $V0} can be used to examine the register in floating point.
+The length of the vector registers is taken from @samp{$vl}.
+
+Individual elements of a vector register are denoted in the obvious way;
+@samp{print $v3[9]} prints the tenth element of register @kbd{v3}, and
+@samp{set $v3[9] = 1234} alters it.
+
+@kbd{$vl} and @kbd{$vs} are int, and @kbd{$vm} is an int vector.
+Elements of @kbd{$vm} can't be assigned to.
+
+@cindex communication registers
+@kindex info comm-registers
+Communication registers have names @kbd{$C0 .. $C63}, with @kbd{$c0 .. $c63}
+denoting the low-order halves. @samp{info comm-registers} will print them
+all out, and tell which are locked. (A communication register is
+locked when a value is sent to it, and unlocked when the value is
+received.) Communication registers are, of course, global to all
+threads, so it does not matter what the currently selected thread is.
+@samp{info comm-reg @var{name}} prints just that one communication
+register; @samp{name} may also be a communication register number
+@samp{nn} or @samp{0xnn}.
+@samp{info comm-reg @var{address}} prints the contents of the resource
+structure at that address.
+
+@kindex info psw
+The command @samp{info psw} prints the processor status word @kbd{$ps}
+bit by bit.
+
+@kindex set base
+GDB normally prints all integers in base 10, but the leading
+@kbd{0x80000000} of pointers is intolerable in decimal, so the default
+output radix has been changed to try to print addresses appropriately.
+The @samp{set base} command can be used to change this.
+
+@table @code
+@item set base 10
+Integer values always print in decimal.
+
+@item set base 16
+Integer values always print in hex.
+
+@item set base
+Go back to the initial state, which prints integer values in hex if they
+look like pointers (specifically, if they start with 0x8 or 0xf in the
+stack), otherwise in decimal.
+@end table
+
+@kindex set pipeline
+When an exception such as a bus error or overflow happens, usually the PC
+is several instructions ahead by the time the exception is detected.
+The @samp{set pipe} command will disable this.
+
+@table @code
+@item set pipeline off
+Forces serial execution of instructions; no vector chaining and no
+scalar instruction overlap. With this, exceptions are detected with
+the PC pointing to the instruction after the one in error.
+
+@item set pipeline on
+Returns to normal, fast, execution. This is the default.
+@end table
+
+@cindex parallel
+In a parallel program, multiple threads may be executing, each
+with its own registers, stack, and local memory. When one of them
+hits a breakpoint, that thread is selected. Other threads do
+not run while the thread is in the breakpoint.
+
+@kindex 1cont
+The selected thread can be single-stepped, given signals, and so
+on. Any other threads remain stopped. When a @samp{cont} command is given,
+all threads are resumed. To resume just the selected thread, use
+the command @samp{1cont}.
+
+@kindex thread
+The @samp{thread} command will show the active threads and the
+instruction they are about to execute. The selected thread is marked
+with an asterisk. The command @samp{thread @var{n}} will select thread @var{n},
+shifting the debugger's attention to it for single-stepping,
+registers, local memory, and so on.
+
+@kindex info threads
+The @samp{info threads} command will show what threads, if any, have
+invisibly hit breakpoints or signals and are waiting to be noticed.
+
+@kindex set parallel
+The @samp{set parallel} command controls how many threads can be active.
+
+@table @code
+@item set parallel off
+One thread. Requests by the program that other threads join in
+(spawn and pfork instructions) do not cause other threads to start up.
+This does the same thing as the @samp{limit concurrency 1} command.
+
+@item set parallel fixed
+All CPUs are assigned to your program whenever it runs. When it
+executes a pfork or spawn instruction, it begins parallel execution
+immediately. This does the same thing as the @samp{mpa -f} command.
+
+@item set parallel on
+One or more threads. Spawn and pfork cause CPUs to join in when and if
+they are free. This is the default. It is very good for system
+throughput, but not very good for finding bugs in parallel code. If you
+suspect a bug in parallel code, you probably want @samp{set parallel fixed.}
+@end table
+
+@subsection Limitations
+
+WARNING: Convex GDB evaluates expressions in long long, because S
+registers are 64 bits long. However, GDB expression semantics are not
+exactly C semantics. This is a bug, strictly speaking, but it's not one I
+know how to fix. If @samp{x} is a program variable of type int, then it
+is also type int to GDB, but @samp{x + 1} is long long, as is @samp{x + y}
+or any other expression requiring computation. So is the expression
+@samp{1}, or any other constant. You only really have to watch out for
+calls. The innocuous expression @samp{list_node (0x80001234)} has an
+argument of type long long. You must explicitly cast it to int.
+
+It is not possible to continue after an uncaught fatal signal by using
+@samp{signal 0}, @samp{return}, @samp{jump}, or anything else. The difficulty is with
+Unix, not GDB.
+
+I have made no big effort to make such things as single-stepping a
+@kbd{join} instruction do something reasonable. If the program seems to
+hang when doing this, type @kbd{ctrl-c} and @samp{cont}, or use
+@samp{thread} to shift to a live thread. Single-stepping a @kbd{spawn}
+instruction apparently causes new threads to be born with their T bit set;
+this is not handled gracefully. When a thread has hit a breakpoint, other
+threads may have invisibly hit the breakpoint in the background; if you
+clear the breakpoint gdb will be surprised when threads seem to continue
+to stop at it. All of these situations produce spurious signal 5 traps;
+if this happens, just type @samp{cont}. If it becomes a nuisance, use
+@samp{handle 5 nostop}. (It will ask if you are sure. You are.)
+
+There is no way in GDB to store a float in a register, as with
+@kbd{set $s0 = 3.1416}. The identifier @kbd{$s0} denotes an integer,
+and like any C expression which assigns to an integer variable, the
+right-hand side is casted to type int. If you should need to do
+something like this, you can assign the value to @kbd{@{float@} ($sp-4)}
+and then do @kbd{set $s0 = $sp[-4]}. Same deal with @kbd{set $v0[69] = 6.9}.
diff --git a/gdb/config/convex/convex.mh b/gdb/config/convex/convex.mh
new file mode 100644
index 0000000..35a121f
--- /dev/null
+++ b/gdb/config/convex/convex.mh
@@ -0,0 +1,3 @@
+# Host: Convex Unix (4bsd)
+XDEPFILES= convex-xdep.o
+XM_FILE= xm-convex.h
diff --git a/gdb/config/convex/convex.mt b/gdb/config/convex/convex.mt
new file mode 100644
index 0000000..eefbeb3
--- /dev/null
+++ b/gdb/config/convex/convex.mt
@@ -0,0 +1,3 @@
+# Target: Convex Unix (4bsd)
+TDEPFILES= convex-tdep.o
+TM_FILE= tm-convex.h
diff --git a/gdb/config/convex/tm-convex.h b/gdb/config/convex/tm-convex.h
new file mode 100644
index 0000000..5eb9f6e
--- /dev/null
+++ b/gdb/config/convex/tm-convex.h
@@ -0,0 +1,511 @@
+/* Definitions to make GDB run on Convex Unix (4bsd)
+ Copyright 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* There is come problem with the debugging symbols generated by the
+ compiler such that the debugging symbol for the first line of a
+ function overlap with the function prologue. */
+#define PROLOGUE_FIRSTLINE_OVERLAP
+
+/* When convex pcc says CHAR or SHORT, it provides the correct address. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Symbol types to ignore. */
+/* 0xc4 is N_MONPT. Use the numeric value for the benefit of people
+ with (rather) old OS's. */
+#define IGNORE_SYMBOL(TYPE) \
+ (((TYPE) & ~N_EXT) == N_TBSS \
+ || ((TYPE) & ~N_EXT) == N_TDATA \
+ || ((TYPE) & ~N_EXT) == 0xc4)
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code.
+ Convex prolog is:
+ [sub.w #-,sp] in one of 3 possible sizes
+ [mov psw,- fc/vc main program prolog
+ and #-,- (skip it because the "mov psw" saves the
+ mov -,psw] T bit, so continue gets a surprise trap)
+ [and #-,sp] fc/vc O2 main program prolog
+ [ld.- -(ap),-] pcc/gcc register arg loads
+*/
+
+#define SKIP_PROLOGUE(pc) \
+{ int op, ix; \
+ op = read_memory_integer (pc, 2); \
+ if ((op & 0xffc7) == 0x5ac0) pc += 2; \
+ else if (op == 0x1580) pc += 4; \
+ else if (op == 0x15c0) pc += 6; \
+ if ((read_memory_integer (pc, 2) & 0xfff8) == 0x7c40 \
+ && (read_memory_integer (pc + 2, 2) & 0xfff8) == 0x1240 \
+ && (read_memory_integer (pc + 8, 2) & 0xfff8) == 0x7c48) \
+ pc += 10; \
+ if (read_memory_integer (pc, 2) == 0x1240) pc += 6; \
+ for (;;) { \
+ op = read_memory_integer (pc, 2); \
+ ix = (op >> 3) & 7; \
+ if (ix != 6) break; \
+ if ((op & 0xfcc0) == 0x3000) pc += 4; \
+ else if ((op & 0xfcc0) == 0x3040) pc += 6; \
+ else if ((op & 0xfcc0) == 0x2800) pc += 4; \
+ else if ((op & 0xfcc0) == 0x2840) pc += 6; \
+ else break;}}
+
+/* Immediately after a function call, return the saved pc.
+ (ignore frame and return *$sp so we can handle both calls and callq) */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ read_memory_integer (read_register (SP_REGNUM), 4)
+
+/* Address of end of stack space.
+ This is ((USRSTACK + 0xfff) & -0x1000)) from <convex/vmparam.h> but
+ that expression depends on the kernel version; instead, fetch a
+ page-zero pointer and get it from that. This will be invalid if
+ they ever change the way bkpt signals are delivered. */
+
+#define STACK_END_ADDR (0xfffff000 & *(unsigned *) 0x80000050)
+
+/* User-mode traps push an extended rtn block,
+ then fault with one of the following PCs */
+
+#define is_trace_pc(pc) ((unsigned) ((pc) - (*(int *) 0x80000040)) <= 4)
+#define is_arith_pc(pc) ((unsigned) ((pc) - (*(int *) 0x80000044)) <= 4)
+#define is_break_pc(pc) ((unsigned) ((pc) - (*(int *) 0x80000050)) <= 4)
+
+/* We need to manipulate trap bits in the psw */
+
+#define PSW_TRAP_FLAGS 0x69670000
+#define PSW_T_BIT 0x08000000
+#define PSW_S_BIT 0x01000000
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. (bkpt) */
+
+#define BREAKPOINT {0x7d,0x50}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT but not always.
+ (The break PC needs to be decremented by 2, but we do it when the
+ break frame is recognized and popped. That way gdb can tell breaks
+ from trace traps with certainty.) */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 8
+
+/* Number of machine registers */
+
+#define NUM_REGS 26
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"pc","psw","fp","ap","a5","a4","a3","a2","a1","sp",\
+ "s7","s6","s5","s4","s3","s2","s1","s0",\
+ "S7","S6","S5","S4","S3","S2","S1","S0"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define S0_REGNUM 25 /* the real S regs */
+#define S7_REGNUM 18
+#define s0_REGNUM 17 /* low-order halves of S regs */
+#define s7_REGNUM 10
+#define SP_REGNUM 9 /* A regs */
+#define A1_REGNUM 8
+#define A5_REGNUM 4
+#define AP_REGNUM 3
+#define FP_REGNUM 2 /* Contains address of executing stack frame */
+#define PS_REGNUM 1 /* Contains processor status */
+#define PC_REGNUM 0 /* Contains program counter */
+
+/* convert dbx stab register number (from `r' declaration) to a gdb REGNUM */
+
+#define STAB_REG_TO_REGNUM(value) \
+ ((value) < 8 ? S0_REGNUM - (value) : SP_REGNUM - ((value) - 8))
+
+/* Vector register numbers, not handled as ordinary regs.
+ They are treated as convenience variables whose values are read
+ from the inferior when needed. */
+
+#define V0_REGNUM 0
+#define V7_REGNUM 7
+#define VM_REGNUM 8
+#define VS_REGNUM 9
+#define VL_REGNUM 10
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (4*10 + 8*8)
+
+/* Index within `registers' of the first byte of the space for
+ register N.
+ NB: must match structure of struct syscall_context for correct operation */
+
+#define REGISTER_BYTE(N) ((N) < s7_REGNUM ? 4*(N) : \
+ (N) < S7_REGNUM ? 44 + 8 * ((N)-s7_REGNUM) : \
+ 40 + 8 * ((N)-S7_REGNUM))
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) ((N) < S7_REGNUM ? 4 : 8)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < S7_REGNUM ? builtin_type_int : builtin_type_long_long)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (A1_REGNUM, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, &((char *) REGBUF) [REGISTER_BYTE (S0_REGNUM) + \
+ 8 - TYPE_LENGTH (TYPE)],\
+ TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE (S0_REGNUM), VALBUF, 8)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (*(int *) & ((char *) REGBUF) [REGISTER_BYTE (s0_REGNUM)])
+
+/* Define trapped internal variable hooks to read and write
+ vector and communication registers. */
+
+#define IS_TRAPPED_INTERNALVAR is_trapped_internalvar
+#define VALUE_OF_TRAPPED_INTERNALVAR value_of_trapped_internalvar
+#define SET_TRAPPED_INTERNALVAR set_trapped_internalvar
+
+extern struct value *value_of_trapped_internalvar ();
+
+/* Hooks to read data from soff exec and core files,
+ and to describe the files. */
+
+#define FILES_INFO_HOOK print_maps
+
+/* Hook to call to print a typeless integer value, normally printed in decimal.
+ For convex, use hex instead if the number looks like an address. */
+
+#define PRINT_TYPELESS_INTEGER decout
+
+/* For the native compiler, variables for a particular lexical context
+ are listed after the beginning LBRAC instead of before in the
+ executables list of symbols. Using "gcc_compiled." to distinguish
+ between GCC and native compiler doesn't work on Convex because the
+ linker sorts the symbols to put "gcc_compiled." in the wrong place.
+ desc is nonzero for native, zero for gcc. */
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (desc != 0)
+
+/* Pcc occaisionally puts an SO where there should be an SOL. */
+#define PCC_SOL_BROKEN
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame_info with a frame's nominal address in fi->frame,
+ and produces the frame's chain-pointer. */
+
+/* (caller fp is saved at 8(fp)) */
+
+#define FRAME_CHAIN(fi) (read_memory_integer ((fi)->frame + 8, 4))
+
+/* Define other aspects of the stack frame. */
+
+/* We need the boundaries of the text in the exec file, as a kludge,
+ for FRAMELESS_FUNCTION_INVOCATION and CALL_DUMMY_LOCATION. */
+
+#define NEED_TEXT_START_END 1
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0.
+ On convex, check at the return address for `callq' -- if so, frameless,
+ otherwise, not. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+{ \
+ extern CORE_ADDR text_start, text_end; \
+ CORE_ADDR call_addr = SAVED_PC_AFTER_CALL (FI); \
+ (FRAMELESS) = (call_addr >= text_start && call_addr < text_end \
+ && read_memory_integer (call_addr - 6, 1) == 0x22); \
+}
+
+#define FRAME_SAVED_PC(fi) (read_memory_integer ((fi)->frame, 4))
+
+#define FRAME_ARGS_ADDRESS(fi) (read_memory_integer ((fi)->frame + 12, 4))
+
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) \
+{ numargs = read_memory_integer (FRAME_ARGS_ADDRESS (fi) - 4, 4); \
+ if (numargs < 0 || numargs >= 256) numargs = -1;}
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+/* Normal (short) frames save only PC, FP, (callee's) AP. To reasonably
+ handle gcc and pcc register variables, scan the code following the
+ call for the instructions the compiler inserts to reload register
+ variables from stack slots and record the stack slots as the saved
+ locations of those registers. This will occasionally identify some
+ random load as a saved register; this is harmless. vc does not
+ declare its register allocation actions in the stabs. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ register int regnum; \
+ register int frame_length = /* 3 short, 2 long, 1 extended, 0 context */\
+ (read_memory_integer ((frame_info)->frame + 4, 4) >> 25) & 3; \
+ register CORE_ADDR frame_fp = \
+ read_memory_integer ((frame_info)->frame + 8, 4); \
+ register CORE_ADDR next_addr; \
+ memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 0; \
+ (frame_saved_regs).regs[PS_REGNUM] = (frame_info)->frame + 4; \
+ (frame_saved_regs).regs[FP_REGNUM] = (frame_info)->frame + 8; \
+ (frame_saved_regs).regs[AP_REGNUM] = frame_fp + 12; \
+ next_addr = (frame_info)->frame + 12; \
+ if (frame_length < 3) \
+ for (regnum = A5_REGNUM; regnum < SP_REGNUM; ++regnum) \
+ (frame_saved_regs).regs[regnum] = (next_addr += 4); \
+ if (frame_length < 2) \
+ (frame_saved_regs).regs[SP_REGNUM] = (next_addr += 4); \
+ next_addr -= 4; \
+ if (frame_length < 3) \
+ for (regnum = S7_REGNUM; regnum < S0_REGNUM; ++regnum) \
+ (frame_saved_regs).regs[regnum] = (next_addr += 8); \
+ if (frame_length < 2) \
+ (frame_saved_regs).regs[S0_REGNUM] = (next_addr += 8); \
+ else \
+ (frame_saved_regs).regs[SP_REGNUM] = next_addr + 8; \
+ if (frame_length == 3) { \
+ CORE_ADDR pc = read_memory_integer ((frame_info)->frame, 4); \
+ int op, ix, disp; \
+ op = read_memory_integer (pc, 2); \
+ if ((op & 0xffc7) == 0x1480) pc += 4; /* add.w #-,sp */ \
+ else if ((op & 0xffc7) == 0x58c0) pc += 2; /* add.w #-,sp */ \
+ op = read_memory_integer (pc, 2); \
+ if ((op & 0xffc7) == 0x2a06) pc += 4; /* ld.w -,ap */ \
+ for (;;) { \
+ op = read_memory_integer (pc, 2); \
+ ix = (op >> 3) & 7; \
+ if ((op & 0xfcc0) == 0x2800) { /* ld.- -,ak */ \
+ regnum = SP_REGNUM - (op & 7); \
+ disp = read_memory_integer (pc + 2, 2); \
+ pc += 4;} \
+ else if ((op & 0xfcc0) == 0x2840) { /* ld.- -,ak */ \
+ regnum = SP_REGNUM - (op & 7); \
+ disp = read_memory_integer (pc + 2, 4); \
+ pc += 6;} \
+ if ((op & 0xfcc0) == 0x3000) { /* ld.- -,sk */ \
+ regnum = S0_REGNUM - (op & 7); \
+ disp = read_memory_integer (pc + 2, 2); \
+ pc += 4;} \
+ else if ((op & 0xfcc0) == 0x3040) { /* ld.- -,sk */ \
+ regnum = S0_REGNUM - (op & 7); \
+ disp = read_memory_integer (pc + 2, 4); \
+ pc += 6;} \
+ else if ((op & 0xff00) == 0x7100) { /* br crossjump */ \
+ pc += 2 * (char) op; \
+ continue;} \
+ else if (op == 0x0140) { /* jmp crossjump */ \
+ pc = read_memory_integer (pc + 2, 4); \
+ continue;} \
+ else break; \
+ if ((frame_saved_regs).regs[regnum]) \
+ break; \
+ if (ix == 7) disp += frame_fp; \
+ else if (ix == 6) disp += read_memory_integer (frame_fp + 12, 4); \
+ else if (ix != 0) break; \
+ (frame_saved_regs).regs[regnum] = \
+ disp - 8 + (1 << ((op >> 8) & 3)); \
+ if (regnum >= S7_REGNUM) \
+ (frame_saved_regs).regs[regnum - S0_REGNUM + s0_REGNUM] = \
+ disp - 4 + (1 << ((op >> 8) & 3)); \
+ } \
+ } \
+}
+
+/* Things needed for making the inferior call functions. */
+
+#define CALL_DUMMY_LOCATION BEFORE_TEXT_END
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM); \
+ register int regnum; \
+ char buf[8]; \
+ long word; \
+ for (regnum = S0_REGNUM; regnum >= S7_REGNUM; --regnum) { \
+ read_register_bytes (REGISTER_BYTE (regnum), buf, 8); \
+ sp = push_bytes (sp, buf, 8);} \
+ for (regnum = SP_REGNUM; regnum >= FP_REGNUM; --regnum) { \
+ word = read_register (regnum); \
+ sp = push_bytes (sp, &word, 4);} \
+ word = (read_register (PS_REGNUM) &~ (3<<25)) | (1<<25); \
+ sp = push_bytes (sp, &word, 4); \
+ word = read_register (PC_REGNUM); \
+ sp = push_bytes (sp, &word, 4); \
+ write_register (SP_REGNUM, sp); \
+ write_register (FP_REGNUM, sp); \
+ write_register (AP_REGNUM, sp);}
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME do {\
+ register CORE_ADDR fp = read_register (FP_REGNUM); \
+ register int regnum; \
+ register int frame_length = /* 3 short, 2 long, 1 extended, 0 context */ \
+ (read_memory_integer (fp + 4, 4) >> 25) & 3; \
+ char buf[8]; \
+ write_register (PC_REGNUM, read_memory_integer (fp, 4)); \
+ write_register (PS_REGNUM, read_memory_integer (fp += 4, 4)); \
+ write_register (FP_REGNUM, read_memory_integer (fp += 4, 4)); \
+ write_register (AP_REGNUM, read_memory_integer (fp += 4, 4)); \
+ if (frame_length < 3) \
+ for (regnum = A5_REGNUM; regnum < SP_REGNUM; ++regnum) \
+ write_register (regnum, read_memory_integer (fp += 4, 4)); \
+ if (frame_length < 2) \
+ write_register (SP_REGNUM, read_memory_integer (fp += 4, 4)); \
+ fp -= 4; \
+ if (frame_length < 3) \
+ for (regnum = S7_REGNUM; regnum < S0_REGNUM; ++regnum) { \
+ read_memory (fp += 8, buf, 8); \
+ write_register_bytes (REGISTER_BYTE (regnum), buf, 8);} \
+ if (frame_length < 2) { \
+ read_memory (fp += 8, buf, 8); \
+ write_register_bytes (REGISTER_BYTE (regnum), buf, 8);} \
+ else write_register (SP_REGNUM, fp + 8); \
+ flush_cached_frames (); \
+} while (0)
+
+/* This sequence of words is the instructions
+ mov sp,ap
+ pshea 69696969
+ calls 32323232
+ bkpt
+ Note this is 16 bytes. */
+
+#define CALL_DUMMY {0x50860d4069696969LL,0x2140323232327d50LL}
+
+#define CALL_DUMMY_LENGTH 16
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ *(int *)((char *) dummyname + 4) = nargs; \
+ *(int *)((char *) dummyname + 10) = fun; }
+
+/* Defs to read soff symbol tables, see dbxread.c */
+
+#define NUMBER_OF_SYMBOLS ((long) opthdr.o_nsyms)
+#define STRING_TABLE_OFFSET ((long) filehdr.h_strptr)
+#define SYMBOL_TABLE_OFFSET ((long) opthdr.o_symptr)
+#define STRING_TABLE_SIZE ((long) filehdr.h_strsiz)
+#define SIZE_OF_TEXT_SEGMENT ((long) txthdr.s_size)
+#define ENTRY_POINT ((long) opthdr.o_entry)
+
+#define READ_STRING_TABLE_SIZE(BUFFER) \
+ (BUFFER = STRING_TABLE_SIZE)
+
+#define DECLARE_FILE_HEADERS \
+ FILEHDR filehdr; \
+ OPTHDR opthdr; \
+ SCNHDR txthdr
+
+#define READ_FILE_HEADERS(DESC,NAME) \
+{ \
+ int n; \
+ val = myread (DESC, &filehdr, sizeof filehdr); \
+ if (val < 0) \
+ perror_with_name (NAME); \
+ if (! IS_SOFF_MAGIC (filehdr.h_magic)) \
+ error ("%s: not an executable file.", NAME); \
+ lseek (DESC, 0L, 0); \
+ if (myread (DESC, &filehdr, sizeof filehdr) < 0) \
+ perror_with_name (NAME); \
+ if (myread (DESC, &opthdr, filehdr.h_opthdr) <= 0) \
+ perror_with_name (NAME); \
+ for (n = 0; n < filehdr.h_nscns; n++) \
+ { \
+ if (myread (DESC, &txthdr, sizeof txthdr) < 0) \
+ perror_with_name (NAME); \
+ if ((txthdr.s_flags & S_TYPMASK) == S_TEXT) \
+ break; \
+ } \
+}
diff --git a/gdb/config/convex/xm-convex.h b/gdb/config/convex/xm-convex.h
new file mode 100644
index 0000000..cfcee4e
--- /dev/null
+++ b/gdb/config/convex/xm-convex.h
@@ -0,0 +1,35 @@
+/* Definitions to make GDB run on Convex Unix (4bsd)
+ Copyright 1989, 1991, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#define ATTACH_DETACH
+#define HAVE_WAIT_STRUCT
+#define NO_SIGINTERRUPT
+
+/* Use SIGCONT rather than SIGTSTP because convex Unix occasionally
+ turkeys SIGTSTP. I think. */
+
+#define STOP_SIGNAL SIGCONT
+
+/* Hook to call after creating inferior process. Now init_trace_fun
+ is in the same place. So re-write this to use the init_trace_fun
+ (making convex a debugging target). FIXME. */
+
+#define CREATE_INFERIOR_HOOK create_inferior_hook
diff --git a/gdb/config/d10v/d10v.mt b/gdb/config/d10v/d10v.mt
new file mode 100644
index 0000000..eddb1b3
--- /dev/null
+++ b/gdb/config/d10v/d10v.mt
@@ -0,0 +1,5 @@
+# Target: Mitsubishi D10V processor
+TDEPFILES= d10v-tdep.o remote-d10v.o
+TM_FILE= tm-d10v.h
+SIM_OBS= remote-sim.o
+SIM= ../sim/d10v/libsim.a
diff --git a/gdb/config/d10v/tm-d10v.h b/gdb/config/d10v/tm-d10v.h
new file mode 100644
index 0000000..ef75bc5
--- /dev/null
+++ b/gdb/config/d10v/tm-d10v.h
@@ -0,0 +1,337 @@
+/* Target-specific definition for the Mitsubishi D10V
+ Copyright (C) 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Contributed by Martin Hunt, hunt@cygnus.com */
+
+#define GDB_TARGET_IS_D10V
+
+/* Define the bit, byte, and word ordering of the machine. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* these are the addresses the D10V-EVA board maps data */
+/* and instruction memory to. */
+
+#define DMEM_START 0x0000000
+#define IMEM_START 0x1000000
+#define STACK_START 0x0007ffe
+
+#ifdef __STDC__ /* Forward decls for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+extern CORE_ADDR d10v_skip_prologue ();
+#define SKIP_PROLOGUE(ip) \
+ {(ip) = d10v_skip_prologue(ip);}
+
+
+/* Stack grows downward. */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* for a breakpoint, use "dbt || nop" */
+#define BREAKPOINT {0x2f, 0x90, 0x5e, 0x00}
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+#define DECR_PC_AFTER_BREAK 4
+
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10","r11","r12", "r13", "r14","r15",\
+ "psw","bpsw","pc","bpc", "cr4", "cr5", "cr6", "rpt_c",\
+ "rpt_s","rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",\
+ "imap0","imap1","dmap","a0", "a1"\
+ }
+
+#define NUM_REGS 37
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define R0_REGNUM 0
+#define LR_REGNUM 13
+#define SP_REGNUM 15
+#define FP_REGNUM 11
+#define PC_REGNUM 18
+#define PSW_REGNUM 16
+#define IMAP0_REGNUM 32
+#define IMAP1_REGNUM 33
+#define DMAP_REGNUM 34
+#define A0_REGNUM 35
+
+/* Say how much memory is needed to store a copy of the register set */
+#define REGISTER_BYTES ((NUM_REGS-2)*2+16)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) \
+( ((N) > A0_REGNUM) ? ( ((N)-A0_REGNUM)*8 + A0_REGNUM*2 ) : ((N) * 2) )
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) ( ((N) >= A0_REGNUM) ? 8 : 2 )
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+#define REGISTER_VIRTUAL_SIZE(N) ( ((N) >= A0_REGNUM) ? 8 : ( ((N) == PC_REGNUM || (N) == SP_REGNUM) ? 4 : 2 ))
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+( ((N) < A0_REGNUM ) ? ((N) == PC_REGNUM || (N) == SP_REGNUM ? builtin_type_long : builtin_type_short) : builtin_type_long_long)
+
+
+/* convert $pc and $sp to/from virtual addresses */
+#define REGISTER_CONVERTIBLE(N) ((N) == PC_REGNUM || (N) == SP_REGNUM)
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ ULONGEST x = extract_unsigned_integer ((FROM), REGISTER_RAW_SIZE (REGNUM)); \
+ if (REGNUM == PC_REGNUM) x = (x << 2) | IMEM_START; \
+ else x |= DMEM_START; \
+ store_unsigned_integer ((TO), TYPE_LENGTH(TYPE), x); \
+}
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ ULONGEST x = extract_unsigned_integer ((FROM), TYPE_LENGTH(TYPE)); \
+ x &= 0x3ffff; \
+ if (REGNUM == PC_REGNUM) x >>= 2; \
+ store_unsigned_integer ((TO), 2, x); \
+}
+
+#define D10V_MAKE_DADDR(x) ((x) | DMEM_START)
+#define D10V_MAKE_IADDR(x) (((x) << 2) | IMEM_START)
+
+#define D10V_DADDR_P(X) (((X) & 0x3000000) == DMEM_START)
+#define D10V_IADDR_P(X) (((X) & 0x3000000) == IMEM_START)
+
+#define D10V_CONVERT_IADDR_TO_RAW(X) (((X) >> 2) & 0xffff)
+#define D10V_CONVERT_DADDR_TO_RAW(X) ((X) & 0xffff)
+
+#define ARG1_REGNUM R0_REGNUM
+#define ARGN_REGNUM 3
+#define RET1_REGNUM R0_REGNUM
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ We store structs through a pointer passed in the first Argument
+ register. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (ARG1_REGNUM, (ADDR)); }
+
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format.
+
+ Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE(RET1_REGNUM), VALBUF, TYPE_LENGTH (TYPE))
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (extract_address ((REGBUF) + REGISTER_BYTE (ARG1_REGNUM), REGISTER_RAW_SIZE (ARG1_REGNUM)) | DMEM_START)
+
+/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
+ EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
+ and TYPE is the type (which is known to be struct, union or array).
+
+ The d10v returns anything less than 8 bytes in size in
+ registers. */
+
+extern use_struct_convention_fn d10v_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) d10v_use_struct_convention (gcc_p, type)
+
+
+
+/* Define other aspects of the stack frame.
+ we keep a copy of the worked out return pc lying around, since it
+ is a useful bit of info */
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR return_pc; \
+ int frameless; \
+ int size;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ d10v_init_extra_frame_info(fromleaf, fi)
+
+extern void d10v_init_extra_frame_info PARAMS (( int fromleaf, struct frame_info *fi ));
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#define FRAME_CHAIN(FRAME) d10v_frame_chain(FRAME)
+extern int d10v_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) d10v_frame_chain_valid (chain, thisframe)
+#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
+#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Immediately after a function call, return the saved pc. We can't */
+/* use frame->return_pc beause that is determined by reading R13 off the */
+/*stack and that may not be written yet. */
+
+#define SAVED_PC_AFTER_CALL(frame) ((read_register(LR_REGNUM) << 2) | IMEM_START)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+/* We can't tell how many args there are */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ d10v_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+extern void d10v_frame_find_saved_regs PARAMS ((struct frame_info *, struct frame_saved_regs *));
+
+#define NAMES_HAVE_UNDERSCORE
+
+
+/* DUMMY FRAMES. Need these to support inferior function calls. They
+ work like this on D10V: First we set a breakpoint at 0 or __start.
+ Then we push all the registers onto the stack. Then put the
+ function arguments in the proper registers and set r13 to our
+ breakpoint address. Finally, the PC is set to the start of the
+ function being called (no JSR/BSR insn). When it hits the
+ breakpoint, clear the break point and pop the old register contents
+ off the stack. */
+
+extern void d10v_pop_frame PARAMS ((struct frame_info *frame));
+#define POP_FRAME generic_pop_current_frame (d10v_pop_frame)
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+extern CORE_ADDR d10v_push_return_address PARAMS ((CORE_ADDR pc, CORE_ADDR sp));
+#define PUSH_RETURN_ADDRESS(PC, SP) d10v_push_return_address (PC, SP)
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+/* #define PC_IN_CALL_DUMMY(pc, sp, frame_address) ( pc == IMEM_START + 4 ) */
+
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+/* override the default get_saved_register function with one that
+ takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+#define get_saved_register generic_get_saved_register
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = d10v_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR d10v_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+d10v_extract_return_value(TYPE, REGBUF, VALBUF)
+ extern void
+d10v_extract_return_value PARAMS ((struct type *, char *, char *));
+
+
+#define REGISTER_SIZE 2
+
+#ifdef CC_HAS_LONG_LONG
+# define LONGEST long long
+#else
+# define LONGEST long
+#endif
+#define ULONGEST unsigned LONGEST
+
+void d10v_write_pc PARAMS ((CORE_ADDR val, int pid));
+CORE_ADDR d10v_read_pc PARAMS ((int pid));
+void d10v_write_sp PARAMS ((CORE_ADDR val));
+CORE_ADDR d10v_read_sp PARAMS ((void));
+void d10v_write_fp PARAMS ((CORE_ADDR val));
+CORE_ADDR d10v_read_fp PARAMS ((void));
+
+#define TARGET_READ_PC(pid) d10v_read_pc (pid)
+#define TARGET_WRITE_PC(val,pid) d10v_write_pc (val, pid)
+#define TARGET_READ_FP() d10v_read_fp ()
+#define TARGET_WRITE_FP(val) d10v_write_fp (val)
+#define TARGET_READ_SP() d10v_read_sp ()
+#define TARGET_WRITE_SP(val) d10v_write_sp (val)
+
+/* Number of bits in the appropriate type */
+#define TARGET_INT_BIT (2 * TARGET_CHAR_BIT)
+#define TARGET_PTR_BIT (4 * TARGET_CHAR_BIT)
+#define TARGET_DOUBLE_BIT (4 * TARGET_CHAR_BIT)
+#define TARGET_LONG_DOUBLE_BIT (8 * TARGET_CHAR_BIT)
+
+
+/* For the d10v when talking to the remote d10v board, GDB addresses
+ need to be translated into a format that the d10v rom monitor
+ understands. */
+
+int remote_d10v_translate_xfer_address PARAMS ((CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR *rem_addr));
+#define REMOTE_TRANSLATE_XFER_ADDRESS(GDB_ADDR, GDB_LEN, REM_ADDR, REM_LEN) \
+(REM_LEN) = remote_d10v_translate_xfer_address ((GDB_ADDR), (GDB_LEN), &(REM_ADDR))
+
diff --git a/gdb/config/d30v/d30v.mt b/gdb/config/d30v/d30v.mt
new file mode 100644
index 0000000..da0af2f
--- /dev/null
+++ b/gdb/config/d30v/d30v.mt
@@ -0,0 +1,5 @@
+# Target: Mitsubishi D30V processor
+TDEPFILES= d30v-tdep.o
+TM_FILE= tm-d30v.h
+SIM_OBS= remote-sim.o
+SIM= ../sim/d30v/libsim.a
diff --git a/gdb/config/d30v/tm-d30v.h b/gdb/config/d30v/tm-d30v.h
new file mode 100644
index 0000000..7a69ca3
--- /dev/null
+++ b/gdb/config/d30v/tm-d30v.h
@@ -0,0 +1,325 @@
+/* Target-specific definition for the Mitsubishi D30V
+ Copyright (C) 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_D30V_H
+#define TM_D30V_H
+
+/* Define the bit, byte, and word ordering of the machine. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* these are the addresses the D30V-EVA board maps data */
+/* and instruction memory to. */
+
+#define DMEM_START 0x20000000
+#define IMEM_START 0x00000000 /* was 0x10000000 */
+#define STACK_START 0x20007ffe
+
+#ifdef __STDC__ /* Forward decls for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+extern CORE_ADDR d30v_skip_prologue ();
+#define SKIP_PROLOGUE(ip) \
+ {(ip) = d30v_skip_prologue(ip);}
+
+
+/* Stack grows downward. */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* for a breakpoint, use "dbt || nop" */
+#define BREAKPOINT {0x00, 0xb0, 0x00, 0x00,\
+ 0x00, 0xf0, 0x00, 0x00}
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+#define DECR_PC_AFTER_BREAK 0
+
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
+ "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
+ "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
+ "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
+ "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", \
+ "spi", "spu", \
+ "psw", "bpsw", "pc", "bpc", "dpsw", "dpc", "cr6", "rpt_c", \
+ "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "eit_vb",\
+ "int_s", "int_m", "a0", "a1" \
+ }
+
+#define NUM_REGS 86
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define R0_REGNUM 0
+#define FP_REGNUM 61
+#define LR_REGNUM 62
+#define SP_REGNUM 63
+#define SPI_REGNUM 64 /* Interrupt stack pointer */
+#define SPU_REGNUM 65 /* User stack pointer */
+#define CREGS_START 66
+
+#define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */
+#define PSW_SM (((unsigned long)0x80000000) >> 0) /* Stack mode: 0/SPI */
+ /* 1/SPU */
+#define PSW_EA (((unsigned long)0x80000000) >> 2) /* Execution status */
+#define PSW_DB (((unsigned long)0x80000000) >> 3) /* Debug mode */
+#define PSW_DS (((unsigned long)0x80000000) >> 4) /* Debug EIT status */
+#define PSW_IE (((unsigned long)0x80000000) >> 5) /* Interrupt enable */
+#define PSW_RP (((unsigned long)0x80000000) >> 6) /* Repeat enable */
+#define PSW_MD (((unsigned long)0x80000000) >> 7) /* Modulo enable */
+#define PSW_F0 (((unsigned long)0x80000000) >> 17) /* F0 flag */
+#define PSW_F1 (((unsigned long)0x80000000) >> 19) /* F1 flag */
+#define PSW_F2 (((unsigned long)0x80000000) >> 21) /* F2 flag */
+#define PSW_F3 (((unsigned long)0x80000000) >> 23) /* F3 flag */
+#define PSW_S (((unsigned long)0x80000000) >> 25) /* Saturation flag */
+#define PSW_V (((unsigned long)0x80000000) >> 27) /* Overflow flag */
+#define PSW_VA (((unsigned long)0x80000000) >> 29) /* Accum. overflow */
+#define PSW_C (((unsigned long)0x80000000) >> 31) /* Carry/Borrow flag */
+
+#define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */
+#define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */
+#define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */
+#define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */
+#define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */
+#define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */
+#define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/
+#define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */
+#define MOD_S_REGNUM (CREGS_START + 10)
+#define MOD_E_REGNUM (CREGS_START + 11)
+#define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */
+#define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */
+#define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */
+#define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */
+#define A0_REGNUM 84
+#define A1_REGNUM 85
+
+/* Say how much memory is needed to store a copy of the register set */
+#define REGISTER_BYTES ((NUM_REGS - 2) * 4 + 2 * 8)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) \
+( ((N) >= A0_REGNUM) ? ( ((N) - A0_REGNUM) * 8 + A0_REGNUM * 4 ) : ((N) * 4) )
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) ( ((N) >= A0_REGNUM) ? 8 : 4 )
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+( ((N) < A0_REGNUM ) ? builtin_type_long : builtin_type_long_long)
+
+/* Writing to r0 is a noop (not an error or exception or anything like
+ that, however). */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == R0_REGNUM)
+
+void d30v_do_registers_info PARAMS ((int regnum, int fpregs));
+
+#define DO_REGISTERS_INFO d30v_do_registers_info
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ We store structs through a pointer passed in R2 */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (2, (ADDR)); }
+
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format.
+
+ Things always get returned in R2/R3 */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE(2), VALBUF, TYPE_LENGTH (TYPE))
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (((CORE_ADDR *)(REGBUF))[2])
+
+
+/* Define other aspects of the stack frame.
+ we keep a copy of the worked out return pc lying around, since it
+ is a useful bit of info */
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR return_pc; \
+ CORE_ADDR dummy; \
+ int frameless; \
+ int size;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ d30v_init_extra_frame_info(fromleaf, fi)
+
+extern void d30v_init_extra_frame_info PARAMS (( int fromleaf, struct frame_info *fi ));
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#define FRAME_CHAIN(FRAME) d30v_frame_chain(FRAME)
+extern int d30v_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) d30v_frame_chain_valid (chain, thisframe)
+#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
+#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) d30v_init_frame_pc(fromleaf, prev)
+#define INIT_FRAME_PC(fromleaf, prev) /* nada */
+
+/* Immediately after a function call, return the saved pc. We can't */
+/* use frame->return_pc beause that is determined by reading R62 off the */
+/* stack and that may not be written yet. */
+
+#define SAVED_PC_AFTER_CALL(frame) (read_register(LR_REGNUM))
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+/* We can't tell how many args there are */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ d30v_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+extern void d30v_frame_find_saved_regs PARAMS ((struct frame_info *, struct frame_saved_regs *));
+
+#define NAMES_HAVE_UNDERSCORE
+
+/* DUMMY FRAMES. Need these to support inferior function calls.
+ They work like this on D30V:
+ First we set a breakpoint at 0 or __start.
+ Then we push all the registers onto the stack.
+ Then put the function arguments in the proper registers and set r13
+ to our breakpoint address.
+ Finally call the function directly.
+ When it hits the breakpoint, clear the break point and pop the old
+ register contents off the stack. */
+
+#define CALL_DUMMY { 0 }
+#define PUSH_DUMMY_FRAME
+#define CALL_DUMMY_START_OFFSET 0
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+extern CORE_ADDR d30v_call_dummy_address PARAMS ((void));
+#define CALL_DUMMY_ADDRESS() d30v_call_dummy_address()
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+sp = d30v_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
+
+#define PC_IN_CALL_DUMMY(pc, sp, frame_address) ( pc == IMEM_START + 4 )
+
+extern CORE_ADDR d30v_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR,
+ int, struct value **,
+ struct type *, int));
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = d30v_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR d30v_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+d30v_extract_return_value(TYPE, REGBUF, VALBUF)
+ extern void
+d30v_extract_return_value PARAMS ((struct type *, char *, char *));
+
+
+/* Discard from the stack the innermost frame,
+ restoring all saved registers. */
+#define POP_FRAME d30v_pop_frame();
+extern void d30v_pop_frame PARAMS((void));
+
+#define REGISTER_SIZE 4
+
+/* Need to handle SP special, as we need to select between spu and spi. */
+#if 0 /* XXX until the simulator is fixed */
+#define TARGET_READ_SP() ((read_register (PSW_REGNUM) & PSW_SM) \
+ ? read_register (SPU_REGNUM) \
+ : read_register (SPI_REGNUM))
+
+#define TARGET_WRITE_SP(val) ((read_register (PSW_REGNUM) & PSW_SM) \
+ ? write_register (SPU_REGNUM, (val)) \
+ : write_register (SPI_REGNUM, (val)))
+#endif
+
+#define STACK_ALIGN(len) (((len) + 7 ) & ~7)
+
+/* Turn this on to cause remote-sim.c to use sim_set/clear_breakpoint. */
+
+#define SIM_HAS_BREAKPOINTS
+
+#endif /* TM_D30V_H */
diff --git a/gdb/config/fr30/fr30.mt b/gdb/config/fr30/fr30.mt
new file mode 100644
index 0000000..fac307e
--- /dev/null
+++ b/gdb/config/fr30/fr30.mt
@@ -0,0 +1,5 @@
+# Target: Fujitsu FR30 processor
+TDEPFILES= fr30-tdep.o
+TM_FILE= tm-fr30.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/fr30/libsim.a
diff --git a/gdb/config/fr30/tm-fr30.h b/gdb/config/fr30/tm-fr30.h
new file mode 100644
index 0000000..ea32792
--- /dev/null
+++ b/gdb/config/fr30/tm-fr30.h
@@ -0,0 +1,232 @@
+/* Parameters for execution on a Fujitsu FR30 processor.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define FR30_GENREGS 16
+#define FR30_DEDICATEDREGS 8
+#define FR30_REGSIZE 4 /* bytes */
+
+#define NUM_REGS (FR30_GENREGS + FR30_DEDICATEDREGS)
+#define REGISTER_BYTES ((FR30_GENREGS + FR30_DEDICATEDREGS)*FR30_REGSIZE)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+#define REGISTER_BYTE(N) ((N) * FR30_REGSIZE)
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
+ "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "pc", "ps", "tbr", "rp", "ssp", "usp", "mdh", "mdl" }
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+#define FUNCTION_START_OFFSET 0
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+#define R0_REGNUM 0
+#define R1_REGNUM 1
+#define R2_REGNUM 2
+#define R3_REGNUM 3
+#define R4_REGNUM 4
+#define R5_REGNUM 5
+#define R6_REGNUM 6
+#define R7_REGNUM 7
+#define R8_REGNUM 8
+#define R9_REGNUM 9
+#define R10_REGNUM 10
+#define R11_REGNUM 11
+#define R12_REGNUM 12
+#define R13_REGNUM 13
+#define FP_REGNUM 14 /* Frame pointer */
+#define SP_REGNUM 15 /* Stack pointer */
+#define PC_REGNUM 16 /* Program counter */
+#define RP_REGNUM 19 /* Return pointer */
+
+#define FIRST_ARGREG R4_REGNUM /* first arg (or struct ret val addr) */
+#define LAST_ARGREG R7_REGNUM /* fourth (or third arg) */
+#define RETVAL_REG R4_REGNUM /* return vaue */
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+#define REGISTER_SIZE FR30_REGSIZE
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+#define REGISTER_RAW_SIZE(N) FR30_REGSIZE
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+#define MAX_REGISTER_RAW_SIZE FR30_REGSIZE
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+#define MAX_REGISTER_VIRTUAL_SIZE FR30_REGSIZE
+
+extern void fr30_pop_frame PARAMS ((void));
+#define POP_FRAME fr30_pop_frame()
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+#define PUSH_RETURN_ADDRESS(PC, SP) (write_register(RP_REGNUM, CALL_DUMMY_ADDRESS()), SP)
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+/* Number of bytes at start of arglist that are not really args. */
+#define FRAME_ARGS_SKIP 0
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE(RETVAL_REG) + \
+ (TYPE_LENGTH(TYPE) < 4 ? 4 - TYPE_LENGTH(TYPE) : 0), TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (RETVAL_REG), \
+ REGISTER_RAW_SIZE (RETVAL_REG))
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (RETVAL_REG, (ADDR)); }
+
+#define FRAME_ARGS_ADDRESS(fi) (fi->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+#define FRAME_NUM_ARGS(numargs, fi) (numargs = -1)
+
+#ifdef __STDC__ /* Forward decls for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs fsr; \
+ int framesize; \
+ int frameoffset; \
+ int framereg;
+
+extern CORE_ADDR fr30_frame_chain PARAMS ((struct frame_info *fi));
+#define FRAME_CHAIN(fi) fr30_frame_chain (fi)
+
+extern CORE_ADDR fr30_frame_saved_pc PARAMS ((struct frame_info *));
+#define FRAME_SAVED_PC(fi) (fr30_frame_saved_pc (fi))
+
+#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
+
+extern CORE_ADDR fr30_skip_prologue PARAMS ((CORE_ADDR pc));
+#define SKIP_PROLOGUE(pc) pc = fr30_skip_prologue (pc)
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
+
+/* Use INT #BREAKPOINT_INTNUM instruction for breakpoint */
+#define FR30_BREAKOP 0x1f /* opcode, type D instruction */
+#define BREAKPOINT_INTNUM 9 /* one of the reserved traps */
+#define BREAKPOINT {FR30_BREAKOP, BREAKPOINT_INTNUM}
+
+/* Define this for Wingdb */
+#define TARGET_FR30
+
+/* IEEE format floating point */
+#define IEEE_FLOAT
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+{ \
+ CORE_ADDR func_start, after_prologue; \
+ func_start = (get_pc_function_start ((FI)->pc) + \
+ FUNCTION_START_OFFSET); \
+ after_prologue = func_start; \
+ SKIP_PROLOGUE (after_prologue); \
+ (FRAMELESS) = (after_prologue == func_start); \
+}
+
+extern void fr30_init_extra_frame_info PARAMS ((struct frame_info *fi));
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) fr30_init_extra_frame_info (fi)
+
+#define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR
+fr30_push_arguments PARAMS ((int nargs, struct value **args, CORE_ADDR sp,
+ int struct_return,
+ CORE_ADDR struct_addr));
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = fr30_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+
+/* Fujitsu's ABI requires all structs to be passed using a pointer.
+ That is obviously not very efficient, so I am leaving the definitions
+ to make gdb work with GCC style struct passing, in case we decide
+ to go for better performance, rather than for compatibility with
+ Fujitsu (just change STRUCT_ALWAYS_BY_ADDR to 0) */
+
+#define STRUCT_ALWAYS_BY_ADDR 1
+
+#if(STRUCT_ALWAYS_BY_ADDR)
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) 1
+#else
+/* more standard GCC (optimized) */
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) \
+ ((TYPE_LENGTH(type) > 4) && (TYPE_LENGTH(type) & 0x3))
+#endif
+/* alway return struct by value by input pointer */
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) 1
diff --git a/gdb/config/gould/np1.mh b/gdb/config/gould/np1.mh
new file mode 100644
index 0000000..322f207
--- /dev/null
+++ b/gdb/config/gould/np1.mh
@@ -0,0 +1,3 @@
+# OBSOLETE # Host: Gould NP1
+# OBSOLETE XDEPFILES= infptrace.o inftarg.o fork-child.o gould-xdep.o
+# OBSOLETE XM_FILE= xm-np1.h
diff --git a/gdb/config/gould/np1.mt b/gdb/config/gould/np1.mt
new file mode 100644
index 0000000..4ea2da5
--- /dev/null
+++ b/gdb/config/gould/np1.mt
@@ -0,0 +1,3 @@
+# OBSOLETE # Target: Gould NP1
+# OBSOLETE TDEPFILES= gould-tdep.o
+# OBSOLETE TM_FILE= tm-np1.h
diff --git a/gdb/config/gould/pn.mh b/gdb/config/gould/pn.mh
new file mode 100644
index 0000000..9d69f90
--- /dev/null
+++ b/gdb/config/gould/pn.mh
@@ -0,0 +1,3 @@
+# OBSOLETE # Host: Gould Powernode
+# OBSOLETE XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+# OBSOLETE XM_FILE= xm-pn.h
diff --git a/gdb/config/gould/pn.mt b/gdb/config/gould/pn.mt
new file mode 100644
index 0000000..7f73fc9
--- /dev/null
+++ b/gdb/config/gould/pn.mt
@@ -0,0 +1,3 @@
+# OBSOLETE # Target: Gould Powernode
+# OBSOLETE TDEPFILES= gould-tdep.o
+# OBSOLETE TM_FILE= tm-pn.h
diff --git a/gdb/config/gould/tm-np1.h b/gdb/config/gould/tm-np1.h
new file mode 100644
index 0000000..7287155
--- /dev/null
+++ b/gdb/config/gould/tm-np1.h
@@ -0,0 +1,490 @@
+/* OBSOLETE /* Parameters for targeting on a Gould NP1, for GDB, the GNU debugger. */
+/* OBSOLETE Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc. */
+/* OBSOLETE */
+/* OBSOLETE This file is part of GDB. */
+/* OBSOLETE */
+/* OBSOLETE This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE it under the terms of the GNU General Public License as published by */
+/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE (at your option) any later version. */
+/* OBSOLETE */
+/* OBSOLETE This program is distributed in the hope that it will be useful, */
+/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* OBSOLETE GNU General Public License for more details. */
+/* OBSOLETE */
+/* OBSOLETE You should have received a copy of the GNU General Public License */
+/* OBSOLETE along with this program; if not, write to the Free Software */
+/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define GOULD_NPL */
+/* OBSOLETE */
+/* OBSOLETE #define TARGET_BYTE_ORDER BIG_ENDIAN */
+/* OBSOLETE */
+/* OBSOLETE /* N_ENTRY appears in libraries on Gould machines. */
+/* OBSOLETE Don't know what 0xa4 is; it's mentioned in stab.h */
+/* OBSOLETE but only in the sdb symbol list. *x/ */
+/* OBSOLETE #define IGNORE_SYMBOL(type) (type == N_ENTRY || type == 0xa4) */
+/* OBSOLETE */
+/* OBSOLETE /* We don't want the extra gnu symbols on the machine; */
+/* OBSOLETE they will interfere with the shared segment symbols. *x/ */
+/* OBSOLETE #define NO_GNU_STABS */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for text-offset and data info (in NPL a.out format). *x/ */
+/* OBSOLETE #define TEXTINFO \ */
+/* OBSOLETE text_offset = N_TXTOFF (exec_coffhdr, exec_aouthdr); \ */
+/* OBSOLETE exec_data_offset = N_TXTOFF (exec_coffhdr, exec_aouthdr)\ */
+/* OBSOLETE + exec_aouthdr.a_text */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for number of symbol table entries *x/ */
+/* OBSOLETE #define NUMBER_OF_SYMBOLS \ */
+/* OBSOLETE (coffhdr.f_nsyms) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for file-offset of symbol table (in NPL a.out format). *x/ */
+/* OBSOLETE #define SYMBOL_TABLE_OFFSET \ */
+/* OBSOLETE N_SYMOFF (coffhdr) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for file-offset of string table (in NPL a.out format). *x/ */
+/* OBSOLETE #define STRING_TABLE_OFFSET \ */
+/* OBSOLETE (N_STROFF (coffhdr)) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to store the length of the string table data in INTO. *x/ */
+/* OBSOLETE #define READ_STRING_TABLE_SIZE(INTO) \ */
+/* OBSOLETE { INTO = hdr.a_stsize; } */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to declare variables to hold the file's header data. *x/ */
+/* OBSOLETE #define DECLARE_FILE_HEADERS struct exec hdr; \ */
+/* OBSOLETE FILHDR coffhdr */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to read the header data from descriptor DESC and validate it. */
+/* OBSOLETE NAME is the file name, for error messages. *x/ */
+/* OBSOLETE #define READ_FILE_HEADERS(DESC, NAME) \ */
+/* OBSOLETE { val = myread (DESC, &coffhdr, sizeof coffhdr); \ */
+/* OBSOLETE if (val < 0) \ */
+/* OBSOLETE perror_with_name (NAME); \ */
+/* OBSOLETE val = myread (DESC, &hdr, sizeof hdr); \ */
+/* OBSOLETE if (val < 0) \ */
+/* OBSOLETE perror_with_name (NAME); \ */
+/* OBSOLETE if (coffhdr.f_magic != GNP1MAGIC) \ */
+/* OBSOLETE error ("File \"%s\" not in coff executable format.", NAME); \ */
+/* OBSOLETE if (N_BADMAG (hdr)) \ */
+/* OBSOLETE error ("File \"%s\" not in executable format.", NAME); } */
+/* OBSOLETE */
+/* OBSOLETE /* Define COFF and other symbolic names needed on NP1 *x/ */
+/* OBSOLETE #define NS32GMAGIC GNP1MAGIC */
+/* OBSOLETE #define NS32SMAGIC GPNMAGIC */
+/* OBSOLETE */
+/* OBSOLETE /* Address of blocks in N_LBRAC and N_RBRAC symbols are absolute addresses, */
+/* OBSOLETE not relative to start of source address. *x/ */
+/* OBSOLETE #define BLOCK_ADDRESS_ABSOLUTE */
+/* OBSOLETE */
+/* OBSOLETE /* Offset from address of function to start of its code. */
+/* OBSOLETE Zero on most machines. *x/ */
+/* OBSOLETE #define FUNCTION_START_OFFSET 8 */
+/* OBSOLETE */
+/* OBSOLETE /* Advance PC across any function entry prologue instructions */
+/* OBSOLETE to reach some "real" code. One NPL we can have one two startup */
+/* OBSOLETE sequences depending on the size of the local stack: */
+/* OBSOLETE */
+/* OBSOLETE Either: */
+/* OBSOLETE "suabr b2, #" */
+/* OBSOLETE of */
+/* OBSOLETE "lil r4, #", "suabr b2, #(r4)" */
+/* OBSOLETE */
+/* OBSOLETE "lwbr b6, #", "stw r1, 8(b2)" */
+/* OBSOLETE Optional "stwbr b3, c(b2)" */
+/* OBSOLETE Optional "trr r2,r7" (Gould first argument register passing) */
+/* OBSOLETE or */
+/* OBSOLETE Optional "stw r2,8(b3)" (Gould first argument register passing) */
+/* OBSOLETE *x/ */
+/* OBSOLETE #define SKIP_PROLOGUE(pc) { \ */
+/* OBSOLETE register int op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0xFA0B0000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x59400000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x5F000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xD4820008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0x5582000C) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xd5030008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x59000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x5F000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xD4820008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0x5582000C) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xd5030008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Immediately after a function call, return the saved pc. */
+/* OBSOLETE Can't go through the frames for this because on some machines */
+/* OBSOLETE the new frame is not set up until the new function executes */
+/* OBSOLETE some instructions. True on NPL! Return address is in R1. */
+/* OBSOLETE The true return address is REALLY 4 past that location! *x/ */
+/* OBSOLETE #define SAVED_PC_AFTER_CALL(frame) \ */
+/* OBSOLETE (read_register(R1_REGNUM) + 4) */
+/* OBSOLETE */
+/* OBSOLETE /* Address of end of stack space. *x/ */
+/* OBSOLETE #define STACK_END_ADDR 0x7fffc000 */
+/* OBSOLETE */
+/* OBSOLETE /* Stack grows downward. *x/ */
+/* OBSOLETE #define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) */
+/* OBSOLETE */
+/* OBSOLETE /* Sequence of bytes for breakpoint instruction. */
+/* OBSOLETE This is padded out to the size of a machine word. When it was just */
+/* OBSOLETE {0x28, 0x09} it gave problems if hit breakpoint on returning from a */
+/* OBSOLETE function call. *x/ */
+/* OBSOLETE #define BREAKPOINT {0x28, 0x09, 0x0, 0x0} */
+/* OBSOLETE */
+/* OBSOLETE /* Amount PC must be decremented by after a breakpoint. */
+/* OBSOLETE This is often the number of bytes in BREAKPOINT */
+/* OBSOLETE but not always. *x/ */
+/* OBSOLETE #define DECR_PC_AFTER_BREAK 2 */
+/* OBSOLETE */
+/* OBSOLETE /* Return 1 if P points to an invalid floating point value. *x/ */
+/* OBSOLETE #define INVALID_FLOAT(p, len) ((*(short *)p & 0xff80) == 0x8000) */
+/* OBSOLETE */
+/* OBSOLETE /* Say how long (ordinary) registers are. This is a piece of bogosity */
+/* OBSOLETE used in push_word and a few other places; REGISTER_RAW_SIZE is the */
+/* OBSOLETE real way to know how big a register is. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define REGISTER_SIZE 4 */
+/* OBSOLETE */
+/* OBSOLETE /* Size of bytes of vector register (NP1 only), 32 elements * sizeof(int) *x/ */
+/* OBSOLETE #define VR_SIZE 128 */
+/* OBSOLETE */
+/* OBSOLETE /* Number of machine registers *x/ */
+/* OBSOLETE #define NUM_REGS 27 */
+/* OBSOLETE #define NUM_GEN_REGS 16 */
+/* OBSOLETE #define NUM_CPU_REGS 4 */
+/* OBSOLETE #define NUM_VECTOR_REGS 7 */
+/* OBSOLETE */
+/* OBSOLETE /* Initializer for an array of names of registers. */
+/* OBSOLETE There should be NUM_REGS strings in this initializer. *x/ */
+/* OBSOLETE #define REGISTER_NAMES { \ */
+/* OBSOLETE "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ */
+/* OBSOLETE "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \ */
+/* OBSOLETE "sp", "ps", "pc", "ve", \ */
+/* OBSOLETE "v1", "v2", "v3", "v4", "v5", "v6", "v7", \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Register numbers of various important registers. */
+/* OBSOLETE Note that some of these values are "real" register numbers, */
+/* OBSOLETE and correspond to the general registers of the machine, */
+/* OBSOLETE and some are "phony" register numbers which are too large */
+/* OBSOLETE to be actual register numbers as far as the user is concerned */
+/* OBSOLETE but do serve to get the desired values when passed to read_register. *x/ */
+/* OBSOLETE #define R1_REGNUM 1 /* Gr1 => return address of caller *x/ */
+/* OBSOLETE #define R2_REGNUM 2 /* Gr2 => return value from function *x/ */
+/* OBSOLETE #define R4_REGNUM 4 /* Gr4 => register save area *x/ */
+/* OBSOLETE #define R5_REGNUM 5 /* Gr5 => register save area *x/ */
+/* OBSOLETE #define R6_REGNUM 6 /* Gr6 => register save area *x/ */
+/* OBSOLETE #define R7_REGNUM 7 /* Gr7 => register save area *x/ */
+/* OBSOLETE #define B1_REGNUM 9 /* Br1 => start of this code routine *x/ */
+/* OBSOLETE #define SP_REGNUM 10 /* Br2 == (sp) *x/ */
+/* OBSOLETE #define AP_REGNUM 11 /* Br3 == (ap) *x/ */
+/* OBSOLETE #define FP_REGNUM 16 /* A copy of Br2 saved in trap *x/ */
+/* OBSOLETE #define PS_REGNUM 17 /* Contains processor status *x/ */
+/* OBSOLETE #define PC_REGNUM 18 /* Contains program counter *x/ */
+/* OBSOLETE #define VE_REGNUM 19 /* Vector end (user setup) register *x/ */
+/* OBSOLETE #define V1_REGNUM 20 /* First vector register *x/ */
+/* OBSOLETE #define V7_REGNUM 26 /* First vector register *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* Total amount of space needed to store our copies of the machine's */
+/* OBSOLETE register state, the array `registers'. *x/ */
+/* OBSOLETE #define REGISTER_BYTES \ */
+/* OBSOLETE (NUM_GEN_REGS*4 + NUM_VECTOR_REGS*VR_SIZE + NUM_CPU_REGS*4) */
+/* OBSOLETE */
+/* OBSOLETE /* Index within `registers' of the first byte of the space for */
+/* OBSOLETE register N. *x/ */
+/* OBSOLETE #define REGISTER_BYTE(N) \ */
+/* OBSOLETE (((N) < V1_REGNUM) ? ((N) * 4) : (((N) - V1_REGNUM) * VR_SIZE) + 80) */
+/* OBSOLETE */
+/* OBSOLETE /* Number of bytes of storage in the actual machine representation */
+/* OBSOLETE for register N. On the NP1, all normal regs are 4 bytes, but */
+/* OBSOLETE the vector registers are VR_SIZE*4 bytes long. *x/ */
+/* OBSOLETE #define REGISTER_RAW_SIZE(N) \ */
+/* OBSOLETE (((N) < V1_REGNUM) ? 4 : VR_SIZE) */
+/* OBSOLETE */
+/* OBSOLETE /* Number of bytes of storage in the program's representation */
+/* OBSOLETE for register N. On the NP1, all regs are 4 bytes. *x/ */
+/* OBSOLETE #define REGISTER_VIRTUAL_SIZE(N) \ */
+/* OBSOLETE (((N) < V1_REGNUM) ? 4 : VR_SIZE) */
+/* OBSOLETE */
+/* OBSOLETE /* Largest value REGISTER_RAW_SIZE can have. *x/ */
+/* OBSOLETE #define MAX_REGISTER_RAW_SIZE VR_SIZE */
+/* OBSOLETE */
+/* OBSOLETE /* Largest value REGISTER_VIRTUAL_SIZE can have. *x/ */
+/* OBSOLETE #define MAX_REGISTER_VIRTUAL_SIZE VR_SIZE */
+/* OBSOLETE */
+/* OBSOLETE /* Return the GDB type object for the "standard" data type */
+/* OBSOLETE of data in register N. *x/ */
+/* OBSOLETE #define REGISTER_VIRTUAL_TYPE(N) \ */
+/* OBSOLETE ((N) > VE_REGNUM ? builtin_type_np1_vector : builtin_type_int) */
+/* OBSOLETE extern struct type *builtin_type_np1_vector; */
+/* OBSOLETE */
+/* OBSOLETE /* Store the address of the place in which to copy the structure the */
+/* OBSOLETE subroutine will return. This is called from call_function. */
+/* OBSOLETE */
+/* OBSOLETE On this machine this is a no-op, because gcc isn't used on it */
+/* OBSOLETE yet. So this calling convention is not used. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define STORE_STRUCT_RETURN(ADDR, SP) push_word(SP + 8, ADDR) */
+/* OBSOLETE */
+/* OBSOLETE /* Extract from an arrary REGBUF containing the (raw) register state */
+/* OBSOLETE a function return value of type TYPE, and copy that, in virtual format, */
+/* OBSOLETE into VALBUF. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ */
+/* OBSOLETE memcpy (VALBUF, ((int *)(REGBUF)) + 2, TYPE_LENGTH (TYPE)) */
+/* OBSOLETE */
+/* OBSOLETE /* Write into appropriate registers a function return value */
+/* OBSOLETE of type TYPE, given in virtual format. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define STORE_RETURN_VALUE(TYPE,VALBUF) \ */
+/* OBSOLETE write_register_bytes (REGISTER_BYTE (R2_REGNUM), VALBUF, \ */
+/* OBSOLETE TYPE_LENGTH (TYPE)) */
+/* OBSOLETE */
+/* OBSOLETE /* Extract from an array REGBUF containing the (raw) register state */
+/* OBSOLETE the address in which a function should return its structure value, */
+/* OBSOLETE as a CORE_ADDR (or an expression that can be used as one). *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*((int *)(REGBUF) + 2)) */
+/* OBSOLETE */
+/* OBSOLETE /* Both gcc and cc return small structs in registers (i.e. in GDB */
+/* OBSOLETE terminology, small structs don't use the struct return convention). *x/ */
+/* OBSOLETE extern use_struct_convention_fn gould_use_struct_convention; */
+/* OBSOLETE #define USE_STRUCT_CONVENTION(gcc_p, type) gould_use_struct_convention (gcc_p, type) */
+/* OBSOLETE */
+/* OBSOLETE /* Describe the pointer in each stack frame to the previous stack frame */
+/* OBSOLETE (its caller). *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* FRAME_CHAIN takes a frame's nominal address */
+/* OBSOLETE and produces the frame's chain-pointer. */
+/* OBSOLETE */
+/* OBSOLETE However, if FRAME_CHAIN_VALID returns zero, */
+/* OBSOLETE it means the given frame is the outermost one and has no caller. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* In the case of the NPL, the frame's norminal address is Br2 and the */
+/* OBSOLETE previous routines frame is up the stack X bytes, where X is the */
+/* OBSOLETE value stored in the code function header xA(Br1). *x/ */
+/* OBSOLETE #define FRAME_CHAIN(thisframe) (findframe(thisframe)) */
+/* OBSOLETE */
+/* OBSOLETE extern int gould_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *)); */
+/* OBSOLETE #define FRAME_CHAIN_VALID(chain, thisframe) gould_frame_chain_valid (chain, thisframe) */
+/* OBSOLETE */
+/* OBSOLETE /* Define other aspects of the stack frame on NPL. *x/ */
+/* OBSOLETE #define FRAME_SAVED_PC(FRAME) \ */
+/* OBSOLETE (read_memory_integer ((FRAME)->frame + 8, 4)) */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_ARGS_ADDRESS(fi) \ */
+/* OBSOLETE ((fi)->next ? \ */
+/* OBSOLETE read_memory_integer ((fi)->frame + 12, 4) : \ */
+/* OBSOLETE read_register (AP_REGNUM)) */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) */
+/* OBSOLETE */
+/* OBSOLETE /* Set VAL to the number of args passed to frame described by FI. */
+/* OBSOLETE Can set VAL to -1, meaning no way to tell. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* We can check the stab info to see how */
+/* OBSOLETE many arg we have. No info in stack will tell us *x/ */
+/* OBSOLETE #define FRAME_NUM_ARGS(val,fi) (val = findarg(fi)) */
+/* OBSOLETE */
+/* OBSOLETE /* Return number of bytes at start of arglist that are not really args. *x/ */
+/* OBSOLETE #define FRAME_ARGS_SKIP 8 */
+/* OBSOLETE */
+/* OBSOLETE /* Put here the code to store, into a struct frame_saved_regs, */
+/* OBSOLETE the addresses of the saved registers of frame described by FRAME_INFO. */
+/* OBSOLETE This includes special registers such as pc and fp saved in special */
+/* OBSOLETE ways in the stack frame. sp is even more special: */
+/* OBSOLETE the address we return for it IS the sp for the next frame. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ */
+/* OBSOLETE { \ */
+/* OBSOLETE memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \ */
+/* OBSOLETE (frame_saved_regs).regs[SP_REGNUM] = framechain (frame_info); \ */
+/* OBSOLETE (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 8; \ */
+/* OBSOLETE (frame_saved_regs).regs[R4_REGNUM] = (frame_info)->frame + 0x30; \ */
+/* OBSOLETE (frame_saved_regs).regs[R5_REGNUM] = (frame_info)->frame + 0x34; \ */
+/* OBSOLETE (frame_saved_regs).regs[R6_REGNUM] = (frame_info)->frame + 0x38; \ */
+/* OBSOLETE (frame_saved_regs).regs[R7_REGNUM] = (frame_info)->frame + 0x3C; \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Things needed for making the inferior call functions. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_LOCATION BEFORE_TEXT_END */
+/* OBSOLETE #define NEED_TEXT_START_END 1 */
+/* OBSOLETE */
+/* OBSOLETE /* Push an empty stack frame, to record the current PC, etc. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define PUSH_DUMMY_FRAME \ */
+/* OBSOLETE { register CORE_ADDR sp = read_register (SP_REGNUM); \ */
+/* OBSOLETE register int regnum; \ */
+/* OBSOLETE for (regnum = 0; regnum < FP_REGNUM; regnum++) \ */
+/* OBSOLETE sp = push_word (sp, read_register (regnum)); \ */
+/* OBSOLETE sp = push_word (sp, read_register (PS_REGNUM)); \ */
+/* OBSOLETE sp = push_word (sp, read_register (PC_REGNUM)); \ */
+/* OBSOLETE write_register (SP_REGNUM, sp);} */
+/* OBSOLETE */
+/* OBSOLETE /* Discard from the stack the innermost frame, */
+/* OBSOLETE restoring all saved registers. *x/ */
+/* OBSOLETE /* FIXME: Should be using {store,extract}_unsigned_integer. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define POP_FRAME \ */
+/* OBSOLETE { CORE_ADDR sp = read_register(SP_REGNUM); \ */
+/* OBSOLETE ULONGEST reg; \ */
+/* OBSOLETE int regnum; \ */
+/* OBSOLETE for(regnum = 0;regnum < FP_REGNUM;regnum++){ \ */
+/* OBSOLETE sp-=REGISTER_SIZE; \ */
+/* OBSOLETE read_memory(sp,&reg,REGISTER_SIZE); \ */
+/* OBSOLETE write_register(regnum,reg);} \ */
+/* OBSOLETE sp-=REGISTER_SIZE; \ */
+/* OBSOLETE read_memory(sp,&reg,REGISTER_SIZE); \ */
+/* OBSOLETE write_register(PS_REGNUM,reg); \ */
+/* OBSOLETE sp-=REGISTER_SIZE; \ */
+/* OBSOLETE read_memory(sp,&reg,REGISTER_SIZE); \ */
+/* OBSOLETE write_register(PC_REGNUM,reg);} */
+/* OBSOLETE */
+/* OBSOLETE /* MJD - Size of dummy frame pushed onto stack by PUSH_DUMMY_FRAME *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define DUMMY_FRAME_SIZE (0x48) */
+/* OBSOLETE */
+/* OBSOLETE /* MJD - The sequence of words in the instructions is */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE subr b2,stack size,0 grab stack space for dummy call */
+/* OBSOLETE labr b3,x0(b2),0 set AP_REGNUM to point at arguments */
+/* OBSOLETE lw r2,x8(b3),0 load r2 with first argument */
+/* OBSOLETE lwbr b1,arguments size(b2),0 load address of function to be called */
+/* OBSOLETE brlnk r1,x8(b1),0 call function */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE labr b2,stack size(b2),0 give back stack */
+/* OBSOLETE break break */
+/* OBSOLETE *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY {0x00000000, \ */
+/* OBSOLETE 0x00000000, \ */
+/* OBSOLETE 0x59000000, \ */
+/* OBSOLETE 0x598a0000, \ */
+/* OBSOLETE 0xb5030008, \ */
+/* OBSOLETE 0x5c820000, \ */
+/* OBSOLETE 0x44810008, \ */
+/* OBSOLETE 0x00000000, \ */
+/* OBSOLETE 0x590a0000, \ */
+/* OBSOLETE 0x28090000 } */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_LENGTH 40 */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_START_OFFSET 8 */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_STACK_ADJUST 8 */
+/* OBSOLETE */
+/* OBSOLETE /* MJD - Fixup CALL_DUMMY for the specific function call. */
+/* OBSOLETE OK heres the problems */
+/* OBSOLETE 1) On a trap there are two copies of the stack pointer, one in SP_REGNUM */
+/* OBSOLETE which is read/write and one in FP_REGNUM which is only read. It seems */
+/* OBSOLETE that when restarting the GOULD NP1 uses FP_REGNUM's value. */
+/* OBSOLETE 2) Loading function address into b1 looks a bit difficult if bigger than */
+/* OBSOLETE 0x0000fffc, infact from what I can tell the compiler sets up table of */
+/* OBSOLETE function address in base3 through which function calls are referenced. */
+/* OBSOLETE */
+/* OBSOLETE OK my solutions */
+/* OBSOLETE Calculate the size of the dummy stack frame and do adjustments of */
+/* OBSOLETE SP_REGNUM in the dummy call. */
+/* OBSOLETE Push function address onto the stack and load it in the dummy call */
+/* OBSOLETE *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FIX_CALL_DUMMY(dummyname, sp, fun, nargs, args, type, gcc_p) \ */
+/* OBSOLETE { int i;\ */
+/* OBSOLETE int arg_len = 0, total_len;\ */
+/* OBSOLETE old_sp = push_word(old_sp,fun);\ */
+/* OBSOLETE for(i = nargs - 1;i >= 0;i--)\ */
+/* OBSOLETE arg_len += TYPE_LENGTH (VALUE_TYPE (value_arg_coerce (args[i])));\ */
+/* OBSOLETE if(struct_return)\ */
+/* OBSOLETE arg_len += TYPE_LENGTH(value_type);\ */
+/* OBSOLETE total_len = DUMMY_FRAME_SIZE+CALL_DUMMY_STACK_ADJUST+4+arg_len;\ */
+/* OBSOLETE dummyname[0] += total_len;\ */
+/* OBSOLETE dummyname[2] += total_len;\ */
+/* OBSOLETE dummyname[5] += arg_len+CALL_DUMMY_STACK_ADJUST;\ */
+/* OBSOLETE dummyname[8] += total_len;} */
+/* OBSOLETE */
+/* OBSOLETE /* MJD - So the stack should end up looking like this */
+/* OBSOLETE */
+/* OBSOLETE | Normal stack frame | */
+/* OBSOLETE | from normal program | */
+/* OBSOLETE | flow | */
+/* OBSOLETE +---------------------+ <- Final sp - 0x08 - argument size */
+/* OBSOLETE | | - 0x4 - dummy_frame_size */
+/* OBSOLETE | Pushed dummy frame | */
+/* OBSOLETE | b0-b7, r0-r7 | */
+/* OBSOLETE | pc and ps | */
+/* OBSOLETE | | */
+/* OBSOLETE +---------------------+ */
+/* OBSOLETE | Function address | */
+/* OBSOLETE +---------------------+ <- Final sp - 0x8 - arguments size */
+/* OBSOLETE | | */
+/* OBSOLETE | | */
+/* OBSOLETE | | */
+/* OBSOLETE | Arguments to | */
+/* OBSOLETE | Function | */
+/* OBSOLETE | | */
+/* OBSOLETE | | */
+/* OBSOLETE | | */
+/* OBSOLETE +---------------------+ <- Final sp - 0x8 */
+/* OBSOLETE | Dummy_stack_adjust | */
+/* OBSOLETE +---------------------+ <- Final sp */
+/* OBSOLETE | | */
+/* OBSOLETE | where call will | */
+/* OBSOLETE | build frame | */
+/* OBSOLETE *x/ */
diff --git a/gdb/config/gould/tm-pn.h b/gdb/config/gould/tm-pn.h
new file mode 100644
index 0000000..b44d4ee
--- /dev/null
+++ b/gdb/config/gould/tm-pn.h
@@ -0,0 +1,409 @@
+/* OBSOLETE /* Parameters for targe of a Gould Powernode, for GDB, the GNU debugger. */
+/* OBSOLETE Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc. */
+/* OBSOLETE */
+/* OBSOLETE This file is part of GDB. */
+/* OBSOLETE */
+/* OBSOLETE This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE it under the terms of the GNU General Public License as published by */
+/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE (at your option) any later version. */
+/* OBSOLETE */
+/* OBSOLETE This program is distributed in the hope that it will be useful, */
+/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* OBSOLETE GNU General Public License for more details. */
+/* OBSOLETE */
+/* OBSOLETE You should have received a copy of the GNU General Public License */
+/* OBSOLETE along with this program; if not, write to the Free Software */
+/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define GOULD_PN */
+/* OBSOLETE */
+/* OBSOLETE #define TARGET_BYTE_ORDER BIG_ENDIAN */
+/* OBSOLETE */
+/* OBSOLETE /* This code appears in libraries on Gould machines. Ignore it. *x/ */
+/* OBSOLETE #define IGNORE_SYMBOL(type) (type == N_ENTRY) */
+/* OBSOLETE */
+/* OBSOLETE /* We don't want the extra gnu symbols on the machine; */
+/* OBSOLETE they will interfere with the shared segment symbols. *x/ */
+/* OBSOLETE #define NO_GNU_STABS */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for text-offset and data info (in PN a.out format). *x/ */
+/* OBSOLETE #define TEXTINFO \ */
+/* OBSOLETE text_offset = N_TXTOFF (exec_coffhdr); \ */
+/* OBSOLETE exec_data_offset = N_TXTOFF (exec_coffhdr) \ */
+/* OBSOLETE + exec_aouthdr.a_text */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for number of symbol table entries (this used to be checked */
+/* OBSOLETE in dbxread.c and caused the last psymtab to use this as the end of */
+/* OBSOLETE text. I'm not sure whether it would still be necessary). *x/ */
+/* OBSOLETE #define END_OF_TEXT_DEFAULT \ */
+/* OBSOLETE (0xffffff) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for number of symbol table entries *x/ */
+/* OBSOLETE #define NUMBER_OF_SYMBOLS \ */
+/* OBSOLETE (coffhdr.f_nsyms) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for file-offset of symbol table (in usual a.out format). *x/ */
+/* OBSOLETE #define SYMBOL_TABLE_OFFSET \ */
+/* OBSOLETE N_SYMOFF (coffhdr) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro for file-offset of string table (in usual a.out format). *x/ */
+/* OBSOLETE #define STRING_TABLE_OFFSET \ */
+/* OBSOLETE (N_STROFF (coffhdr) + sizeof(int)) */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to store the length of the string table data in INTO. *x/ */
+/* OBSOLETE #define READ_STRING_TABLE_SIZE(INTO) \ */
+/* OBSOLETE { INTO = hdr.a_stsize; } */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to declare variables to hold the file's header data. *x/ */
+/* OBSOLETE #define DECLARE_FILE_HEADERS struct old_exec hdr; \ */
+/* OBSOLETE FILHDR coffhdr */
+/* OBSOLETE */
+/* OBSOLETE /* Macro to read the header data from descriptor DESC and validate it. */
+/* OBSOLETE NAME is the file name, for error messages. *x/ */
+/* OBSOLETE #define READ_FILE_HEADERS(DESC, NAME) \ */
+/* OBSOLETE { val = myread (DESC, &coffhdr, sizeof coffhdr); \ */
+/* OBSOLETE if (val < 0) \ */
+/* OBSOLETE perror_with_name (NAME); \ */
+/* OBSOLETE val = myread (DESC, &hdr, sizeof hdr); \ */
+/* OBSOLETE if (val < 0) \ */
+/* OBSOLETE perror_with_name (NAME); \ */
+/* OBSOLETE if (coffhdr.f_magic != GNP1MAGIC) \ */
+/* OBSOLETE error ("File \"%s\" not in coff executable format.", NAME); \ */
+/* OBSOLETE if (N_BADMAG (hdr)) \ */
+/* OBSOLETE error ("File \"%s\" not in executable format.", NAME); } */
+/* OBSOLETE */
+/* OBSOLETE /* Define COFF and other symbolic names needed on NP1 *x/ */
+/* OBSOLETE #define NS32GMAGIC GDPMAGIC */
+/* OBSOLETE #define NS32SMAGIC PN_MAGIC */
+/* OBSOLETE */
+/* OBSOLETE /* Offset from address of function to start of its code. */
+/* OBSOLETE Zero on most machines. *x/ */
+/* OBSOLETE #define FUNCTION_START_OFFSET 4 */
+/* OBSOLETE */
+/* OBSOLETE /* Advance PC across any function entry prologue instructions */
+/* OBSOLETE to reach some "real" code. One PN we can have one or two startup */
+/* OBSOLETE sequences depending on the size of the local stack: */
+/* OBSOLETE */
+/* OBSOLETE Either: */
+/* OBSOLETE "suabr b2, #" */
+/* OBSOLETE of */
+/* OBSOLETE "lil r4, #", "suabr b2, #(r4)" */
+/* OBSOLETE */
+/* OBSOLETE "lwbr b6, #", "stw r1, 8(b2)" */
+/* OBSOLETE Optional "stwbr b3, c(b2)" */
+/* OBSOLETE Optional "trr r2,r7" (Gould first argument register passing) */
+/* OBSOLETE or */
+/* OBSOLETE Optional "stw r2,8(b3)" (Gould first argument register passing) */
+/* OBSOLETE *x/ */
+/* OBSOLETE #define SKIP_PROLOGUE(pc) { \ */
+/* OBSOLETE register int op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x580B0000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x59400000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x5F000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xD4820008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0x5582000C) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xd5030008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x59000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if ((op & 0xffff0000) == 0x5F000000) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xD4820008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0x5582000C) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 4); \ */
+/* OBSOLETE if (op == 0xd5030008) { \ */
+/* OBSOLETE pc += 4; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } else { \ */
+/* OBSOLETE op = read_memory_integer ((pc), 2); \ */
+/* OBSOLETE if (op == 0x2fa0) { \ */
+/* OBSOLETE pc += 2; \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Immediately after a function call, return the saved pc. */
+/* OBSOLETE Can't go through the frames for this because on some machines */
+/* OBSOLETE the new frame is not set up until the new function executes */
+/* OBSOLETE some instructions. True on PN! Return address is in R1. */
+/* OBSOLETE Note: true return location is 4 bytes past R1! *x/ */
+/* OBSOLETE #define SAVED_PC_AFTER_CALL(frame) \ */
+/* OBSOLETE (read_register(R1_REGNUM) + 4) */
+/* OBSOLETE */
+/* OBSOLETE /* Address of end of stack space. *x/ */
+/* OBSOLETE #define STACK_END_ADDR 0x480000 */
+/* OBSOLETE */
+/* OBSOLETE /* Stack grows downward. *x/ */
+/* OBSOLETE #define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) */
+/* OBSOLETE */
+/* OBSOLETE /* Sequence of bytes for breakpoint instruction. *x/ */
+/* OBSOLETE #define BREAKPOINT {0x28, 0x09} */
+/* OBSOLETE */
+/* OBSOLETE /* Amount PC must be decremented by after a breakpoint. */
+/* OBSOLETE This is often the number of bytes in BREAKPOINT */
+/* OBSOLETE but not always. *x/ */
+/* OBSOLETE #define DECR_PC_AFTER_BREAK 2 */
+/* OBSOLETE */
+/* OBSOLETE /* Return 1 if P points to an invalid floating point value. *x/ */
+/* OBSOLETE #define INVALID_FLOAT(p, len) ((*(short *)p & 0xff80) == 0x8000) */
+/* OBSOLETE */
+/* OBSOLETE /* Say how long (ordinary) registers are. This is a piece of bogosity */
+/* OBSOLETE used in push_word and a few other places; REGISTER_RAW_SIZE is the */
+/* OBSOLETE real way to know how big a register is. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define REGISTER_SIZE 4 */
+/* OBSOLETE */
+/* OBSOLETE /* Number of machine registers *x/ */
+/* OBSOLETE #define NUM_REGS 19 */
+/* OBSOLETE #define NUM_GEN_REGS 16 */
+/* OBSOLETE #define NUM_CPU_REGS 3 */
+/* OBSOLETE */
+/* OBSOLETE /* Initializer for an array of names of registers. */
+/* OBSOLETE There should be NUM_REGS strings in this initializer. *x/ */
+/* OBSOLETE #define REGISTER_NAMES { \ */
+/* OBSOLETE "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ */
+/* OBSOLETE "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \ */
+/* OBSOLETE "sp", "ps", "pc", \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Register numbers of various important registers. */
+/* OBSOLETE Note that some of these values are "real" register numbers, */
+/* OBSOLETE and correspond to the general registers of the machine, */
+/* OBSOLETE and some are "phony" register numbers which are too large */
+/* OBSOLETE to be actual register numbers as far as the user is concerned */
+/* OBSOLETE but do serve to get the desired values when passed to read_register. *x/ */
+/* OBSOLETE #define R1_REGNUM 1 /* Gr1 => return address of caller *x/ */
+/* OBSOLETE #define R4_REGNUM 4 /* Gr4 => register save area *x/ */
+/* OBSOLETE #define R5_REGNUM 5 /* Gr5 => register save area *x/ */
+/* OBSOLETE #define R6_REGNUM 6 /* Gr6 => register save area *x/ */
+/* OBSOLETE #define R7_REGNUM 7 /* Gr7 => register save area *x/ */
+/* OBSOLETE #define B1_REGNUM 9 /* Br1 => start of this code routine *x/ */
+/* OBSOLETE #define FP_REGNUM 10 /* Br2 == (sp) *x/ */
+/* OBSOLETE #define AP_REGNUM 11 /* Br3 == (ap) *x/ */
+/* OBSOLETE #define SP_REGNUM 16 /* A copy of Br2 saved in trap *x/ */
+/* OBSOLETE #define PS_REGNUM 17 /* Contains processor status *x/ */
+/* OBSOLETE #define PC_REGNUM 18 /* Contains program counter *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* Total amount of space needed to store our copies of the machine's */
+/* OBSOLETE register state, the array `registers'. *x/ */
+/* OBSOLETE #define REGISTER_BYTES (NUM_GEN_REGS*4 + NUM_CPU_REGS*4) */
+/* OBSOLETE */
+/* OBSOLETE /* Index within `registers' of the first byte of the space for */
+/* OBSOLETE register N. *x/ */
+/* OBSOLETE #define REGISTER_BYTE(N) ((N) * 4) */
+/* OBSOLETE */
+/* OBSOLETE /* Number of bytes of storage in the actual machine representation */
+/* OBSOLETE for register N. On the PN, all normal regs are 4 bytes. *x/ */
+/* OBSOLETE #define REGISTER_RAW_SIZE(N) (4) */
+/* OBSOLETE */
+/* OBSOLETE /* Number of bytes of storage in the program's representation */
+/* OBSOLETE for register N. On the PN, all regs are 4 bytes. *x/ */
+/* OBSOLETE #define REGISTER_VIRTUAL_SIZE(N) (4) */
+/* OBSOLETE */
+/* OBSOLETE /* Largest value REGISTER_RAW_SIZE can have. *x/ */
+/* OBSOLETE #define MAX_REGISTER_RAW_SIZE (4) */
+/* OBSOLETE */
+/* OBSOLETE /* Largest value REGISTER_VIRTUAL_SIZE can have. *x/ */
+/* OBSOLETE #define MAX_REGISTER_VIRTUAL_SIZE (4) */
+/* OBSOLETE */
+/* OBSOLETE /* Return the GDB type object for the "standard" data type */
+/* OBSOLETE of data in register N. *x/ */
+/* OBSOLETE #define REGISTER_VIRTUAL_TYPE(N) (builtin_type_int) */
+/* OBSOLETE */
+/* OBSOLETE /* Store the address of the place in which to copy the structure the */
+/* OBSOLETE subroutine will return. This is called from call_function. */
+/* OBSOLETE */
+/* OBSOLETE On this machine this is a no-op, because gcc isn't used on it */
+/* OBSOLETE yet. So this calling convention is not used. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define STORE_STRUCT_RETURN(ADDR, SP) */
+/* OBSOLETE */
+/* OBSOLETE /* Extract from an arrary REGBUF containing the (raw) register state */
+/* OBSOLETE a function return value of type TYPE, and copy that, in virtual format, */
+/* OBSOLETE into VALBUF. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ */
+/* OBSOLETE memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE)) */
+/* OBSOLETE */
+/* OBSOLETE /* Write into appropriate registers a function return value */
+/* OBSOLETE of type TYPE, given in virtual format. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define STORE_RETURN_VALUE(TYPE,VALBUF) \ */
+/* OBSOLETE write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE)) */
+/* OBSOLETE */
+/* OBSOLETE /* Extract from an array REGBUF containing the (raw) register state */
+/* OBSOLETE the address in which a function should return its structure value, */
+/* OBSOLETE as a CORE_ADDR (or an expression that can be used as one). *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF)) */
+/* OBSOLETE */
+/* OBSOLETE */
+/* OBSOLETE /* Describe the pointer in each stack frame to the previous stack frame */
+/* OBSOLETE (its caller). *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* FRAME_CHAIN takes a frame's nominal address */
+/* OBSOLETE and produces the frame's chain-pointer. */
+/* OBSOLETE */
+/* OBSOLETE However, if FRAME_CHAIN_VALID returns zero, */
+/* OBSOLETE it means the given frame is the outermost one and has no caller. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* In the case of the NPL, the frame's norminal address is Br2 and the */
+/* OBSOLETE previous routines frame is up the stack X bytes, where X is the */
+/* OBSOLETE value stored in the code function header xA(Br1). *x/ */
+/* OBSOLETE #define FRAME_CHAIN(thisframe) (findframe(thisframe)) */
+/* OBSOLETE */
+/* OBSOLETE extern int gould_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *)); */
+/* OBSOLETE #define FRAME_CHAIN_VALID(chain, thisframe) gould_frame_chain_valid (chain, thisframe) */
+/* OBSOLETE */
+/* OBSOLETE /* Define other aspects of the stack frame on NPL. *x/ */
+/* OBSOLETE #define FRAME_SAVED_PC(frame) \ */
+/* OBSOLETE (read_memory_integer ((frame)->frame + 8, 4)) */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_ARGS_ADDRESS(fi) \ */
+/* OBSOLETE ((fi)->next ? \ */
+/* OBSOLETE read_memory_integer ((fi)->frame + 12, 4) : \ */
+/* OBSOLETE read_register (AP_REGNUM)) */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame + 80) */
+/* OBSOLETE */
+/* OBSOLETE /* Set VAL to the number of args passed to frame described by FI. */
+/* OBSOLETE Can set VAL to -1, meaning no way to tell. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* We can check the stab info to see how */
+/* OBSOLETE many arg we have. No info in stack will tell us *x/ */
+/* OBSOLETE #define FRAME_NUM_ARGS(val,fi) (val = findarg(fi)) */
+/* OBSOLETE */
+/* OBSOLETE /* Return number of bytes at start of arglist that are not really args. *x/ */
+/* OBSOLETE #define FRAME_ARGS_SKIP 8 */
+/* OBSOLETE */
+/* OBSOLETE /* Put here the code to store, into a struct frame_saved_regs, */
+/* OBSOLETE the addresses of the saved registers of frame described by FRAME_INFO. */
+/* OBSOLETE This includes special registers such as pc and fp saved in special */
+/* OBSOLETE ways in the stack frame. sp is even more special: */
+/* OBSOLETE the address we return for it IS the sp for the next frame. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ */
+/* OBSOLETE { \ */
+/* OBSOLETE memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \ */
+/* OBSOLETE (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 8; \ */
+/* OBSOLETE (frame_saved_regs).regs[R4_REGNUM] = (frame_info)->frame + 0x30; \ */
+/* OBSOLETE (frame_saved_regs).regs[R5_REGNUM] = (frame_info)->frame + 0x34; \ */
+/* OBSOLETE (frame_saved_regs).regs[R6_REGNUM] = (frame_info)->frame + 0x38; \ */
+/* OBSOLETE (frame_saved_regs).regs[R7_REGNUM] = (frame_info)->frame + 0x3C; \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Things needed for making the inferior call functions. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* Push an empty stack frame, to record the current PC, etc. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define PUSH_DUMMY_FRAME \ */
+/* OBSOLETE { register CORE_ADDR sp = read_register (SP_REGNUM); \ */
+/* OBSOLETE register int regnum; \ */
+/* OBSOLETE sp = push_word (sp, read_register (PC_REGNUM)); \ */
+/* OBSOLETE sp = push_word (sp, read_register (FP_REGNUM)); \ */
+/* OBSOLETE write_register (FP_REGNUM, sp); \ */
+/* OBSOLETE for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--) \ */
+/* OBSOLETE sp = push_word (sp, read_register (regnum)); \ */
+/* OBSOLETE sp = push_word (sp, read_register (PS_REGNUM)); \ */
+/* OBSOLETE write_register (SP_REGNUM, sp); } */
+/* OBSOLETE */
+/* OBSOLETE /* Discard from the stack the innermost frame, */
+/* OBSOLETE restoring all saved registers. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define POP_FRAME \ */
+/* OBSOLETE { register struct frame_info *frame = get_current_frame (); \ */
+/* OBSOLETE register CORE_ADDR fp; \ */
+/* OBSOLETE register int regnum; \ */
+/* OBSOLETE struct frame_saved_regs fsr; \ */
+/* OBSOLETE struct frame_info *fi; \ */
+/* OBSOLETE fp = frame->frame; \ */
+/* OBSOLETE get_frame_saved_regs (frame, &fsr); \ */
+/* OBSOLETE for (regnum = FP_REGNUM - 1; regnum >= 0; regnum--) \ */
+/* OBSOLETE if (fsr.regs[regnum]) \ */
+/* OBSOLETE write_register (regnum, read_memory_integer (fsr.regs[regnum], 4)); \ */
+/* OBSOLETE if (fsr.regs[PS_REGNUM]) \ */
+/* OBSOLETE write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4)); \ */
+/* OBSOLETE write_register (FP_REGNUM, read_memory_integer (fp, 4)); \ */
+/* OBSOLETE write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); \ */
+/* OBSOLETE write_register (SP_REGNUM, fp + 8); \ */
+/* OBSOLETE flush_cached_frames (); \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* This sequence of words is the instructions: */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE suabr b2, #<stacksize> */
+/* OBSOLETE lwbr b6, #con */
+/* OBSOLETE stw r1, 8(b2) - save caller address, do we care? */
+/* OBSOLETE lw r2, 60(b2) - arg1 */
+/* OBSOLETE labr b3, 50(b2) */
+/* OBSOLETE std r4, 30(b2) - save r4-r7 */
+/* OBSOLETE std r6, 38(b2) */
+/* OBSOLETE lwbr b1, #<func> - load function call address */
+/* OBSOLETE brlnk r1, 8(b1) - call function */
+/* OBSOLETE halt */
+/* OBSOLETE halt */
+/* OBSOLETE ld r4, 30(b2) - restore r4-r7 */
+/* OBSOLETE ld r6, 38(b2) */
+/* OBSOLETE */
+/* OBSOLETE Setup our stack frame, load argumemts, call and then restore registers. */
+/* OBSOLETE *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* FIXME: The below defines an m68k CALL_DUMMY, which looks nothing like what */
+/* OBSOLETE is documented above. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY {0xf227e0ff, 0x48e7fffc, 0x426742e7, 0x4eb93232, 0x3232dffc, 0x69696969, 0x4e4f4e71} */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_LENGTH 28 */
+/* OBSOLETE */
+/* OBSOLETE #define CALL_DUMMY_START_OFFSET 12 */
+/* OBSOLETE */
+/* OBSOLETE /* Insert the specified number of args and function address */
+/* OBSOLETE into a call sequence of the above form stored at DUMMYNAME. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \ */
+/* OBSOLETE { *(int *)((char *) dummyname + 20) = nargs * 4; \ */
+/* OBSOLETE *(int *)((char *) dummyname + 14) = fun; } */
diff --git a/gdb/config/gould/xm-np1.h b/gdb/config/gould/xm-np1.h
new file mode 100644
index 0000000..63bc450
--- /dev/null
+++ b/gdb/config/gould/xm-np1.h
@@ -0,0 +1,94 @@
+/* OBSOLETE /* Parameters for execution on a Gould NP1, for GDB, the GNU debugger. */
+/* OBSOLETE Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc. */
+/* OBSOLETE */
+/* OBSOLETE This file is part of GDB. */
+/* OBSOLETE */
+/* OBSOLETE This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE it under the terms of the GNU General Public License as published by */
+/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE (at your option) any later version. */
+/* OBSOLETE */
+/* OBSOLETE This program is distributed in the hope that it will be useful, */
+/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* OBSOLETE GNU General Public License for more details. */
+/* OBSOLETE */
+/* OBSOLETE You should have received a copy of the GNU General Public License */
+/* OBSOLETE along with this program; if not, write to the Free Software */
+/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define HOST_BYTE_ORDER BIG_ENDIAN */
+/* OBSOLETE */
+/* OBSOLETE /* Address of U in kernel space *x/ */
+/* OBSOLETE #define KERNEL_U_ADDR 0x7fffc000 */
+/* OBSOLETE */
+/* OBSOLETE /* This is a piece of magic that is given a register number REGNO */
+/* OBSOLETE and as BLOCKEND the address in the system of the end of the user structure */
+/* OBSOLETE and stores in ADDR the address in the kernel or core dump */
+/* OBSOLETE of that register. *x/ */
+/* OBSOLETE #define REGISTER_U_ADDR(addr, blockend, regno) { \ */
+/* OBSOLETE addr = blockend + regno * 4; \ */
+/* OBSOLETE if (regno == VE_REGNUM) addr = blockend - 9 * 4; \ */
+/* OBSOLETE if (regno == PC_REGNUM) addr = blockend - 8 * 4; \ */
+/* OBSOLETE if (regno == PS_REGNUM) addr = blockend - 7 * 4; \ */
+/* OBSOLETE if (regno == FP_REGNUM) addr = blockend - 6 * 4; \ */
+/* OBSOLETE if (regno >= V1_REGNUM) \ */
+/* OBSOLETE addr = blockend + 16 * 4 + (regno - V1_REGNUM) * VR_SIZE; \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* Don't try to write the frame pointer. *x/ */
+/* OBSOLETE #define CANNOT_STORE_REGISTER(regno) ((regno) == FP_REGNUM) */
+/* OBSOLETE */
+/* OBSOLETE /* */
+/* OBSOLETE * No KDB support, Yet! *x/ */
+/* OBSOLETE /* Interface definitions for kernel debugger KDB. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* Map machine fault codes into signal numbers. */
+/* OBSOLETE First subtract 0, divide by 4, then index in a table. */
+/* OBSOLETE Faults for which the entry in this table is 0 */
+/* OBSOLETE are not handled by KDB; the program's own trap handler */
+/* OBSOLETE gets to handle then. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FAULT_CODE_ORIGIN 0 */
+/* OBSOLETE #define FAULT_CODE_UNITS 4 */
+/* OBSOLETE #define FAULT_TABLE \ */
+/* OBSOLETE { 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \ */
+/* OBSOLETE 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \ */
+/* OBSOLETE 0, 0, 0, 0, 0, 0, 0, 0, \ */
+/* OBSOLETE SIGILL } */
+/* OBSOLETE */
+/* OBSOLETE /* Start running with a stack stretching from BEG to END. */
+/* OBSOLETE BEG and END should be symbols meaningful to the assembler. */
+/* OBSOLETE This is used only for kdb. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define INIT_STACK(beg, end) \ */
+/* OBSOLETE { asm (".globl end"); \ */
+/* OBSOLETE asm ("movel $ end, sp"); \ */
+/* OBSOLETE asm ("clrl fp"); } */
+/* OBSOLETE */
+/* OBSOLETE /* Push the frame pointer register on the stack. *x/ */
+/* OBSOLETE #define PUSH_FRAME_PTR \ */
+/* OBSOLETE asm ("movel fp, -(sp)"); */
+/* OBSOLETE */
+/* OBSOLETE /* Copy the top-of-stack to the frame pointer register. *x/ */
+/* OBSOLETE #define POP_FRAME_PTR \ */
+/* OBSOLETE asm ("movl (sp), fp"); */
+/* OBSOLETE */
+/* OBSOLETE /* After KDB is entered by a fault, push all registers */
+/* OBSOLETE that GDB thinks about (all NUM_REGS of them), */
+/* OBSOLETE so that they appear in order of ascending GDB register number. */
+/* OBSOLETE The fault code will be on the stack beyond the last register. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define PUSH_REGISTERS \ */
+/* OBSOLETE { asm ("clrw -(sp)"); \ */
+/* OBSOLETE asm ("pea 10(sp)"); \ */
+/* OBSOLETE asm ("movem $ 0xfffe,-(sp)"); } */
+/* OBSOLETE */
+/* OBSOLETE /* Assuming the registers (including processor status) have been */
+/* OBSOLETE pushed on the stack in order of ascending GDB register number, */
+/* OBSOLETE restore them and return to the address in the saved PC register. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define POP_REGISTERS \ */
+/* OBSOLETE { asm ("subil $8,28(sp)"); \ */
+/* OBSOLETE asm ("movem (sp),$ 0xffff"); \ */
+/* OBSOLETE asm ("rte"); } */
diff --git a/gdb/config/gould/xm-pn.h b/gdb/config/gould/xm-pn.h
new file mode 100644
index 0000000..2540cfc
--- /dev/null
+++ b/gdb/config/gould/xm-pn.h
@@ -0,0 +1,87 @@
+/* OBSOLETE /* Parameters for execution on a Gould PN, for GDB, the GNU debugger. */
+/* OBSOLETE Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc. */
+/* OBSOLETE */
+/* OBSOLETE This file is part of GDB. */
+/* OBSOLETE */
+/* OBSOLETE This program is free software; you can redistribute it and/or modify */
+/* OBSOLETE it under the terms of the GNU General Public License as published by */
+/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */
+/* OBSOLETE (at your option) any later version. */
+/* OBSOLETE */
+/* OBSOLETE This program is distributed in the hope that it will be useful, */
+/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* OBSOLETE GNU General Public License for more details. */
+/* OBSOLETE */
+/* OBSOLETE You should have received a copy of the GNU General Public License */
+/* OBSOLETE along with this program; if not, write to the Free Software */
+/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define HOST_BYTE_ORDER BIG_ENDIAN */
+/* OBSOLETE */
+/* OBSOLETE /* Address of U in kernel space *x/ */
+/* OBSOLETE #define KERNEL_U_ADDR 0x3fc000 */
+/* OBSOLETE */
+/* OBSOLETE /* This is a piece of magic that is given a register number REGNO */
+/* OBSOLETE and as BLOCKEND the address in the system of the end of the user structure */
+/* OBSOLETE and stores in ADDR the address in the kernel or core dump */
+/* OBSOLETE of that register. *x/ */
+/* OBSOLETE #define REGISTER_U_ADDR(addr, blockend, regno) { \ */
+/* OBSOLETE addr = blockend + regno * 4; \ */
+/* OBSOLETE if (regno == PC_REGNUM) addr = blockend - 8 * 4; \ */
+/* OBSOLETE if (regno == PS_REGNUM) addr = blockend - 7 * 4; \ */
+/* OBSOLETE if (regno == SP_REGNUM) addr = blockend - 6 * 4; \ */
+/* OBSOLETE } */
+/* OBSOLETE */
+/* OBSOLETE /* No KDB support, Yet! *x/ */
+/* OBSOLETE /* Interface definitions for kernel debugger KDB. *x/ */
+/* OBSOLETE */
+/* OBSOLETE /* Map machine fault codes into signal numbers. */
+/* OBSOLETE First subtract 0, divide by 4, then index in a table. */
+/* OBSOLETE Faults for which the entry in this table is 0 */
+/* OBSOLETE are not handled by KDB; the program's own trap handler */
+/* OBSOLETE gets to handle then. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define FAULT_CODE_ORIGIN 0 */
+/* OBSOLETE #define FAULT_CODE_UNITS 4 */
+/* OBSOLETE #define FAULT_TABLE \ */
+/* OBSOLETE { 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \ */
+/* OBSOLETE 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \ */
+/* OBSOLETE 0, 0, 0, 0, 0, 0, 0, 0, \ */
+/* OBSOLETE SIGILL } */
+/* OBSOLETE */
+/* OBSOLETE /* Start running with a stack stretching from BEG to END. */
+/* OBSOLETE BEG and END should be symbols meaningful to the assembler. */
+/* OBSOLETE This is used only for kdb. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define INIT_STACK(beg, end) \ */
+/* OBSOLETE { asm (".globl end"); \ */
+/* OBSOLETE asm ("movel $ end, sp"); \ */
+/* OBSOLETE asm ("clrl fp"); } */
+/* OBSOLETE */
+/* OBSOLETE /* Push the frame pointer register on the stack. *x/ */
+/* OBSOLETE #define PUSH_FRAME_PTR \ */
+/* OBSOLETE asm ("movel fp, -(sp)"); */
+/* OBSOLETE */
+/* OBSOLETE /* Copy the top-of-stack to the frame pointer register. *x/ */
+/* OBSOLETE #define POP_FRAME_PTR \ */
+/* OBSOLETE asm ("movl (sp), fp"); */
+/* OBSOLETE */
+/* OBSOLETE /* After KDB is entered by a fault, push all registers */
+/* OBSOLETE that GDB thinks about (all NUM_REGS of them), */
+/* OBSOLETE so that they appear in order of ascending GDB register number. */
+/* OBSOLETE The fault code will be on the stack beyond the last register. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define PUSH_REGISTERS \ */
+/* OBSOLETE { asm ("clrw -(sp)"); \ */
+/* OBSOLETE asm ("pea 10(sp)"); \ */
+/* OBSOLETE asm ("movem $ 0xfffe,-(sp)"); } */
+/* OBSOLETE */
+/* OBSOLETE /* Assuming the registers (including processor status) have been */
+/* OBSOLETE pushed on the stack in order of ascending GDB register number, */
+/* OBSOLETE restore them and return to the address in the saved PC register. *x/ */
+/* OBSOLETE */
+/* OBSOLETE #define POP_REGISTERS \ */
+/* OBSOLETE { asm ("subil $8,28(sp)"); \ */
+/* OBSOLETE asm ("movem (sp),$ 0xffff"); \ */
+/* OBSOLETE asm ("rte"); } */
diff --git a/gdb/config/h8300/h8300.mt b/gdb/config/h8300/h8300.mt
new file mode 100644
index 0000000..c6e25ab
--- /dev/null
+++ b/gdb/config/h8300/h8300.mt
@@ -0,0 +1,6 @@
+# Target: H8300 with HMS monitor, E7000 ICE and H8 simulator
+TDEPFILES= h8300-tdep.o remote-e7000.o ser-e7kpc.o monitor.o remote-hms.o dsrec.o
+TM_FILE= tm-h8300.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/h8300/libsim.a
diff --git a/gdb/config/h8300/tm-h8300.h b/gdb/config/h8300/tm-h8300.h
new file mode 100644
index 0000000..b398d2f
--- /dev/null
+++ b/gdb/config/h8300/tm-h8300.h
@@ -0,0 +1,303 @@
+/* Parameters for execution on a H8/300 series machine.
+ Copyright 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+#endif
+
+/* 1 if debugging H8/300H application */
+extern int h8300hmode;
+extern int h8300smode;
+
+/* Number of bytes in a word */
+
+#define BINWORD (h8300hmode?4:2)
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs *fsr; \
+ CORE_ADDR from_pc; \
+ CORE_ADDR args_pointer;\
+ CORE_ADDR locals_pointer ;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+ so that FRAME_FIND_SAVED_REGS () will know to allocate and
+ initialize a frame_saved_regs struct the first time it is called.
+ Set the arg_pointer to -1, which is not valid; 0 and other values
+ indicate real, cached values. */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ h8300_init_extra_frame_info (fromleaf, fi)
+
+extern void h8300_init_extra_frame_info ();
+
+#define IEEE_FLOAT
+/* Define the bit, byte, and word ordering of the machine. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+#undef TARGET_INT_BIT
+#define TARGET_INT_BIT 16
+#undef TARGET_LONG_BIT
+#define TARGET_LONG_BIT 32
+#undef TARGET_PTR_BIT
+#define TARGET_PTR_BIT (h8300hmode ? 32:16)
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(ip) {(ip) = h8300_skip_prologue(ip);}
+extern CORE_ADDR h8300_skip_prologue ();
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ read_memory_unsigned_integer (read_register (SP_REGNUM), BINWORD)
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/*#define BREAKPOINT {0x7A, 0xFF}*/
+#define BREAKPOINT {0x01, 0x80} /* Sleep */
+#define REMOTE_BREAKPOINT { 0x57, 0x30} /* trapa #3 */
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are. */
+
+#define REGISTER_SIZE 4
+
+#define NUM_REGS 13
+
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the H8/300, all regs are 2 bytes. */
+
+#define REGISTER_RAW_SIZE(N) (h8300hmode ? 4 : 2)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (h8300hmode ? 4 : 2)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+(h8300hmode ? builtin_type_unsigned_long : builtin_type_unsigned_short)
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+#define REGISTER_NAMES \
+ {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "ccr","pc","cycles","tick","inst"}
+
+/* An array of names of registers. */
+
+extern char **h8300_register_names;
+#define REGISTER_NAME(i) h8300_register_names[i]
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define ARG0_REGNUM 0 /* first reg in which an arg may be passed */
+#define ARGLAST_REGNUM 2 /* last reg in which an arg may be passed */
+#define FP_REGNUM 6 /* Contain saddress of executing stack frame */
+#define SP_REGNUM 7 /* Contains address of top of stack */
+#define CCR_REGNUM 8 /* Contains processor status */
+#define PC_REGNUM 9 /* Contains program counter */
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+/* FIXME: Won't work with both h8/300's. */
+
+extern void h8300_extract_return_value PARAMS((struct type *, char *, char *));
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ h8300_extract_return_value (TYPE, (char *)(REGBUF), (char *)(VALBUF))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. Assumes floats are passed
+ in d0/d1. */
+/* FIXME: Won't work with both h8/300's. */
+
+extern void h8300_store_return_value PARAMS((struct type *, char *));
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ h8300_store_return_value(TYPE, (char *) (VALBUF))
+
+/* struct passing and returning stuff */
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
+ write_register (0, STRUCT_ADDR)
+
+#define USE_STRUCT_CONVENTION(gcc_p, type) (1)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (0), \
+ REGISTER_RAW_SIZE (0))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+
+#define FRAME_CHAIN(FRAME) h8300_frame_chain(FRAME)
+CORE_ADDR h8300_frame_chain PARAMS ((struct frame_info *));
+
+/* In the case of the H8/300, the frame's nominal address
+ is the address of a 2-byte word containing the calling frame's address. */
+
+/* Use the alternate method of avoiding running up off the end of
+ the frame chain or following frames back into the startup code.
+ See the comments in objfile.h */
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+/* Any function with a frame looks like this
+ SECOND ARG
+ FIRST ARG
+ RET PC
+ SAVED R2
+ SAVED R3
+ SAVED FP <-FP POINTS HERE
+ LOCALS0
+ LOCALS1 <-SP POINTS HERE
+ */
+
+#define FRAME_SAVED_PC(FRAME) h8300_frame_saved_pc(FRAME)
+
+#define FRAME_ARGS_ADDRESS(fi) frame_args_address(fi)
+
+#define FRAME_LOCALS_ADDRESS(fi) frame_locals_address(fi);
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ h8300_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+
+typedef unsigned short INSN_WORD;
+
+
+#define PRINT_REGISTER_HOOK(regno) print_register_hook(regno)
+
+#define GDB_TARGET_IS_H8300
+
+#define NUM_REALREGS 10
+#define NOP { 0x01, 0x80} /* A sleep insn */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/*
+ * CALL_DUMMY stuff:
+ */
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_LENGTH (0)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+extern CORE_ADDR h8300_push_arguments PARAMS ((int nargs,
+ struct value **args,
+ CORE_ADDR sp,
+ unsigned char struct_return,
+ CORE_ADDR struct_addr));
+extern CORE_ADDR h8300_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+#define FIX_CALL_DUMMY(DUMMY, START_SP, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = h8300_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+/* Push an empty stack frame, to record the current PC, etc. */
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+/* Discard from the stack the innermost frame, restoring all registers. */
+#define POP_FRAME h8300_pop_frame ()
+#define PUSH_RETURN_ADDRESS(PC, SP) h8300_push_return_address (PC, SP)
+
+/* override the standard get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+
diff --git a/gdb/config/h8500/h8500.mt b/gdb/config/h8500/h8500.mt
new file mode 100644
index 0000000..35f6b4d
--- /dev/null
+++ b/gdb/config/h8500/h8500.mt
@@ -0,0 +1,6 @@
+# Target: H8500 with HMS monitor and H8 simulator
+TDEPFILES= h8500-tdep.o monitor.o remote-hms.o dsrec.o
+TM_FILE= tm-h8500.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/h8500/libsim.a
diff --git a/gdb/config/h8500/tm-h8500.h b/gdb/config/h8500/tm-h8500.h
new file mode 100644
index 0000000..8f7d966
--- /dev/null
+++ b/gdb/config/h8500/tm-h8500.h
@@ -0,0 +1,293 @@
+/* Parameters for execution on a H8/500 series machine.
+ Copyright (C) 1993, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#define GDB_TARGET_IS_H8500
+
+#define IEEE_FLOAT 1
+
+/* Define the bit, byte, and word ordering of the machine. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Define the sizes of integers and pointers. */
+
+#define TARGET_INT_BIT 16
+
+#define TARGET_LONG_BIT 32
+
+#define TARGET_PTR_BIT (minimum_mode ? 16 : 32)
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(ip) { (ip) = h8500_skip_prologue(ip); }
+extern CORE_ADDR h8500_skip_prologue PARAMS ((CORE_ADDR));
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call()
+extern CORE_ADDR saved_pc_after_call PARAMS ((void));
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Illegal instruction - used by the simulator for breakpoint
+ detection */
+
+#define BREAKPOINT {0x0b}
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are. */
+
+#define REGISTER_TYPE unsigned long
+
+/* Say how much memory is needed to store a copy of the register set */
+
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) h8500_register_size(N)
+extern int h8500_register_size PARAMS ((int regno));
+
+#define REGISTER_SIZE 4
+
+#define REGISTER_VIRTUAL_SIZE(N) h8500_register_size(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) h8500_register_virtual_type(N)
+extern struct type *h8500_register_virtual_type PARAMS ((int regno));
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+#define REGISTER_NAMES \
+ { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "pr0","pr1","pr2","pr3","pr4","pr5","pr6","pr7", \
+ "cp", "dp", "ep", "tp", "sr", "pc"}
+
+/* Register numbers of various important registers. Note that some of
+ these values are "real" register numbers, and correspond to the
+ general registers of the machine, and some are "phony" register
+ numbers which are too large to be actual register numbers as far as
+ the user is concerned but do serve to get the desired values when
+ passed to read_register. */
+
+#define R0_REGNUM 0
+#define R1_REGNUM 1
+#define R2_REGNUM 2
+#define R3_REGNUM 3
+#define R4_REGNUM 4
+#define R5_REGNUM 5
+#define R6_REGNUM 6
+#define R7_REGNUM 7
+
+#define PR0_REGNUM 8
+#define PR1_REGNUM 9
+#define PR2_REGNUM 10
+#define PR3_REGNUM 11
+#define PR4_REGNUM 12
+#define PR5_REGNUM 13
+#define PR6_REGNUM 14
+#define PR7_REGNUM 15
+
+#define SEG_C_REGNUM 16 /* Segment registers */
+#define SEG_D_REGNUM 17
+#define SEG_E_REGNUM 18
+#define SEG_T_REGNUM 19
+
+#define CCR_REGNUM 20 /* Contains processor status */
+#define PC_REGNUM 21 /* Contains program counter */
+
+#define NUM_REGS 22
+
+#define SP_REGNUM PR7_REGNUM /* Contains address of top of stack */
+#define FP_REGNUM PR6_REGNUM /* Contains address of executing stack frame */
+
+#define PTR_SIZE (minimum_mode ? 2 : 4)
+#define PTR_MASK (minimum_mode ? 0x0000ffff : 0x00ffffff)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+/*#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (0, (ADDR)); abort(); }*/
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+/* Any function with a frame looks like this
+ SECOND ARG
+ FIRST ARG
+ RET PC
+ SAVED R2
+ SAVED R3
+ SAVED FP <-FP POINTS HERE
+ LOCALS0
+ LOCALS1 <-SP POINTS HERE
+
+ */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) ;
+/* (fci)->frame |= read_register(SEG_T_REGNUM) << 16;*/
+
+#define FRAME_CHAIN(FRAME) h8500_frame_chain(FRAME)
+struct frame_info;
+extern CORE_ADDR h8500_frame_chain PARAMS ((struct frame_info *));
+
+#define FRAME_SAVED_PC(FRAME) frame_saved_pc(FRAME)
+extern CORE_ADDR frame_saved_pc PARAMS ((struct frame_info *frame));
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ frame_find_saved_regs(frame_info, &(frame_saved_regs))
+struct frame_saved_regs;
+extern void frame_find_saved_regs PARAMS ((struct frame_info *frame_info, struct frame_saved_regs *frame_saved_regs));
+
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME { h8500_pop_frame (); }
+extern void h8500_pop_frame PARAMS ((void));
+
+#define SHORT_INT_MAX 32767
+#define SHORT_INT_MIN -32768
+
+#define NAMES_HAVE_UNDERSCORE
+
+typedef unsigned short INSN_WORD;
+
+extern CORE_ADDR h8500_addr_bits_remove PARAMS ((CORE_ADDR));
+#define ADDR_BITS_REMOVE(addr) h8500_addr_bits_remove (addr)
+
+#define read_memory_short(x) (read_memory_integer(x,2) & 0xffff)
+
+#define PRINT_REGISTER_HOOK(regno) print_register_hook(regno)
+extern void print_register_hook PARAMS ((int));
+
+extern int minimum_mode;
+
+#define CALL_DUMMY_LENGTH 10
+
+/* Fake variables to make it easy to use 24 bit register pointers */
+
+#define IS_TRAPPED_INTERNALVAR h8500_is_trapped_internalvar
+extern int h8500_is_trapped_internalvar PARAMS ((char *name));
+
+#define VALUE_OF_TRAPPED_INTERNALVAR h8500_value_of_trapped_internalvar
+extern struct value * h8500_value_of_trapped_internalvar (/* struct internalvar *var */);
+
+#define SET_TRAPPED_INTERNALVAR h8500_set_trapped_internalvar
+extern void h8500_set_trapped_internalvar (/* struct internalvar *var, value newval, int bitpos, int bitsize, int offset */);
+
+extern CORE_ADDR h8500_read_sp PARAMS ((void));
+extern void h8500_write_sp PARAMS ((CORE_ADDR));
+
+extern CORE_ADDR h8500_read_fp PARAMS ((void));
+extern void h8500_write_fp PARAMS ((CORE_ADDR));
+
+extern CORE_ADDR h8500_read_pc PARAMS ((int));
+extern void h8500_write_pc PARAMS ((CORE_ADDR, int));
+
+#define TARGET_READ_SP() h8500_read_sp()
+#define TARGET_WRITE_SP(x) h8500_write_sp(x)
+
+#define TARGET_READ_PC(pid) h8500_read_pc(pid)
+#define TARGET_WRITE_PC(x,pid) h8500_write_pc(x,pid)
+
+#define TARGET_READ_FP() h8500_read_fp()
+#define TARGET_WRITE_FP(x) h8500_write_fp(x)
diff --git a/gdb/config/i386/cygwin.mh b/gdb/config/i386/cygwin.mh
new file mode 100644
index 0000000..d93acb6
--- /dev/null
+++ b/gdb/config/i386/cygwin.mh
@@ -0,0 +1,6 @@
+MH_CFLAGS=
+XM_FILE=xm-cygwin.h
+XDEPFILES=ser-tcp.o
+NATDEPFILES= win32-nat.o
+NAT_FILE=../nm-empty.h
+XM_CLIBS=
diff --git a/gdb/config/i386/cygwin.mt b/gdb/config/i386/cygwin.mt
new file mode 100644
index 0000000..4dfc0c2
--- /dev/null
+++ b/gdb/config/i386/cygwin.mt
@@ -0,0 +1,6 @@
+# Target: Intel 386 run win32
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-cygwin.h
+
+
+
diff --git a/gdb/config/i386/fbsd.mh b/gdb/config/i386/fbsd.mh
new file mode 100644
index 0000000..499ed48
--- /dev/null
+++ b/gdb/config/i386/fbsd.mh
@@ -0,0 +1,5 @@
+# Host: Intel 386 running FreeBSD
+XDEPFILES= ser-tcp.o
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o core-aout.o i386b-nat.o
+XM_FILE= xm-i386bsd.h
+NAT_FILE= nm-fbsd.h
diff --git a/gdb/config/i386/fbsd.mt b/gdb/config/i386/fbsd.mt
new file mode 100644
index 0000000..e644f1c
--- /dev/null
+++ b/gdb/config/i386/fbsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running FreeBSD
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o
+TM_FILE= tm-fbsd.h
diff --git a/gdb/config/i386/gdbserve.mt b/gdb/config/i386/gdbserve.mt
new file mode 100644
index 0000000..d8a7cba
--- /dev/null
+++ b/gdb/config/i386/gdbserve.mt
@@ -0,0 +1,3 @@
+# Target: GDBSERVE.NLM running on a i386
+TDEPFILES= i386.o
+CPU_FILE= i386
diff --git a/gdb/config/i386/go32.mh b/gdb/config/i386/go32.mh
new file mode 100644
index 0000000..311ee1c
--- /dev/null
+++ b/gdb/config/i386/go32.mh
@@ -0,0 +1,8 @@
+MH_CFLAGS=-D__GO32__ -D__MSDOS__
+XDEPFILES= go32-xdep.o
+XM_FILE= xm-go32.h
+HOST_IPC=-DDOS_IPC
+SER_HARDWIRE= ser-go32.o
+CC=i386-go32-gcc -O2 -fno-omit-frame-pointer
+
+
diff --git a/gdb/config/i386/i386aix.mh b/gdb/config/i386/i386aix.mh
new file mode 100644
index 0000000..cea05f0
--- /dev/null
+++ b/gdb/config/i386/i386aix.mh
@@ -0,0 +1,10 @@
+# Host: IBM PS/2 (i386) running AIX PS/2
+
+XM_FILE= xm-i386aix.h
+XDEPFILES=
+
+NAT_FILE= nm-i386aix.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o i386aix-nat.o
+
+# Use gcc. Only coff output can be debugged
+CC=gcc
diff --git a/gdb/config/i386/i386aix.mt b/gdb/config/i386/i386aix.mt
new file mode 100644
index 0000000..12e0e1f
--- /dev/null
+++ b/gdb/config/i386/i386aix.mt
@@ -0,0 +1,7 @@
+# This port, for aix ps/2 (i386), will allow you to debug the coff
+# output generated gcc-2.3.3 + gas. It will not understand IBM's
+# proprietary debug info.
+#
+# Target: IBM PS/2 (i386) running AIX PS/2
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386aix.h
diff --git a/gdb/config/i386/i386aout.mt b/gdb/config/i386/i386aout.mt
new file mode 100644
index 0000000..1c94ba5
--- /dev/null
+++ b/gdb/config/i386/i386aout.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 with a.out
+TDEPFILES= i386-tdep.o
+TM_FILE= tm-i386v.h
diff --git a/gdb/config/i386/i386bsd.mh b/gdb/config/i386/i386bsd.mh
new file mode 100644
index 0000000..f95c6ed
--- /dev/null
+++ b/gdb/config/i386/i386bsd.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running 386BSD
+
+XM_FILE= xm-i386bsd.h
+XDEPFILES=
+
+NAT_FILE= nm-i386bsd.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o core-aout.o i386b-nat.o
diff --git a/gdb/config/i386/i386bsd.mt b/gdb/config/i386/i386bsd.mt
new file mode 100644
index 0000000..ef61731
--- /dev/null
+++ b/gdb/config/i386/i386bsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running BSD
+TM_FILE= tm-i386bsd.h
+TDEPFILES= i386-tdep.o
diff --git a/gdb/config/i386/i386dgux.mh b/gdb/config/i386/i386dgux.mh
new file mode 100644
index 0000000..e05ebcd
--- /dev/null
+++ b/gdb/config/i386/i386dgux.mh
@@ -0,0 +1,9 @@
+# Host: Intel 386 running DGUX, cloned from SVR4
+
+XM_FILE= xm-i386v4.h
+XDEPFILES= ser-tcp.o
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o solib.o procfs.o fork-child.o i386v4-nat.o
diff --git a/gdb/config/i386/i386gnu.mh b/gdb/config/i386/i386gnu.mh
new file mode 100644
index 0000000..4ceac7e
--- /dev/null
+++ b/gdb/config/i386/i386gnu.mh
@@ -0,0 +1,31 @@
+# Host: Intel 386 running the GNU Hurd
+XDEPFILES= i387-tdep.o
+NATDEPFILES= i386gnu-nat.o gnu-nat.o fork-child.o solib.o corelow.o notify_S.o process_reply_S.o msg_reply_S.o msg_U.o exc_request_U.o exc_request_S.o
+XM_FILE= xm-i386gnu.h
+NAT_FILE= nm-gnu.h
+MH_CFLAGS = -D_GNU_SOURCE
+
+XM_CLIBS = -lshouldbeinlibc
+
+# Use our own user stubs for the msg rpcs, so we can make them time out, in
+# case the program is fucked, or we guess the wrong signal thread.
+msg-MIGUFLAGS = -D'MSG_IMPORTS=waittime 1000;'
+
+# ick
+MIG = mig
+MIGCOM = $(MIG) -cc cat - /dev/null
+
+# Reply servers need special massaging of the code mig generates, to make
+# them work correctly for error returns in some cases.
+%_reply_S.h %_reply_S.c: %_reply.defs
+ $(CPP) $(CPPFLAGS) -DSERVERPREFIX=S_ -x c $< \
+ | $(MIGCOM) -sheader $*_reply_S.h -server $*_reply_S.raw -user /dev/null -header /dev/null \
+ && $(AWK) -f $(srcdir)/reply_mig_hack.awk < $*_reply_S.raw > $*_reply_S.c
+# Normal servers
+%_S.h %_S.c: %.defs
+ $(CPP) $(CPPFLAGS) -DSERVERPREFIX=S_ -x c $< \
+ | $(MIGCOM) -sheader $*_S.h -server $*_S.c -user /dev/null -header /dev/null
+# User rpc stubs
+%_U.h %_U.c: %.defs
+ $(CPP) $(CPPFLAGS) $($*-MIGUFLAGS) -x c $< \
+ | $(MIGCOM) -sheader /dev/null -server /dev/null -user $*_U.c -header $*_U.h
diff --git a/gdb/config/i386/i386gnu.mt b/gdb/config/i386/i386gnu.mt
new file mode 100644
index 0000000..64fb018
--- /dev/null
+++ b/gdb/config/i386/i386gnu.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386/elf/GNU Hurd
+TDEPFILES= i386-tdep.o
+TM_FILE= tm-i386gnu.h
diff --git a/gdb/config/i386/i386lynx.mh b/gdb/config/i386/i386lynx.mh
new file mode 100644
index 0000000..9cb086f
--- /dev/null
+++ b/gdb/config/i386/i386lynx.mh
@@ -0,0 +1,11 @@
+# Host: Intel 386 running LynxOS
+
+XM_FILE= xm-i386lynx.h
+XM_CLIBS= -lbsd
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-i386lynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
+
+GDBSERVER_LIBS= -lbsd
+GDBSERVER_DEPFILES= low-lynx.o
diff --git a/gdb/config/i386/i386lynx.mt b/gdb/config/i386/i386lynx.mt
new file mode 100644
index 0000000..6704b43
--- /dev/null
+++ b/gdb/config/i386/i386lynx.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running LynxOS
+TDEPFILES= coff-solib.o i386-tdep.o i386ly-tdep.o
+TM_FILE= tm-i386lynx.h
diff --git a/gdb/config/i386/i386m3.mh b/gdb/config/i386/i386m3.mh
new file mode 100644
index 0000000..0a83ebf
--- /dev/null
+++ b/gdb/config/i386/i386m3.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running Mach3
+
+XDEPFILES= i387-tdep.o core-aout.o
+NATDEPFILES= i386m3-nat.o m3-nat.o fork-child.o
+NAT_CLIBS= -lmachid -lnetname -lmach
+XM_FILE= xm-i386m3.h
+NAT_FILE= nm-m3.h
diff --git a/gdb/config/i386/i386m3.mt b/gdb/config/i386/i386m3.mt
new file mode 100644
index 0000000..e985ae3
--- /dev/null
+++ b/gdb/config/i386/i386m3.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 with a.out under Mach 3
+TDEPFILES= i386-tdep.o
+TM_FILE= tm-i386m3.h
diff --git a/gdb/config/i386/i386mach.mh b/gdb/config/i386/i386mach.mh
new file mode 100644
index 0000000..44766c5
--- /dev/null
+++ b/gdb/config/i386/i386mach.mh
@@ -0,0 +1,10 @@
+# Host: Intel 386 running Mach
+
+# This is for mach2, maybe, or is obsolete (and seems to have only
+# host and native, not target). Once we get the mach3 stuff working,
+# I think it can go away.
+
+XDEPFILES=
+XM_FILE= xm-i386mach.h
+NAT_FILE= nm-i386mach.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o i386mach-nat.o
diff --git a/gdb/config/i386/i386mk.mh b/gdb/config/i386/i386mk.mh
new file mode 100644
index 0000000..849677c
--- /dev/null
+++ b/gdb/config/i386/i386mk.mh
@@ -0,0 +1,4 @@
+# Host: Intel 386 running Mach3 with OSF 1/MK
+
+XDEPFILES= os-mach3.o i386mach3-xdep.o i387-tdep.o
+XM_FILE= xm-i386osf1mk.h
diff --git a/gdb/config/i386/i386mk.mt b/gdb/config/i386/i386mk.mt
new file mode 100644
index 0000000..fc59442
--- /dev/null
+++ b/gdb/config/i386/i386mk.mt
@@ -0,0 +1,6 @@
+# Target: Intel 386 with a.out in osf 1/mk
+TDEPFILES= i386-tdep.o
+TM_FILE= tm-i386osf1mk.h
+
+TM_CFLAGS= -I/usr/mach3/include
+TM_CLIBS= /usr/mach3/ccs/lib/libmachid.a /usr/mach3/ccs/lib/libnetname.a /usr/mach3/ccs/lib/libmach.a
diff --git a/gdb/config/i386/i386nw.mt b/gdb/config/i386/i386nw.mt
new file mode 100644
index 0000000..3109c42
--- /dev/null
+++ b/gdb/config/i386/i386nw.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running NetWare
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386nw.h
diff --git a/gdb/config/i386/i386os9k.mt b/gdb/config/i386/i386os9k.mt
new file mode 100644
index 0000000..5a8794d
--- /dev/null
+++ b/gdb/config/i386/i386os9k.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running OS9000
+TDEPFILES= i386-tdep.o remote-os9k.o
+TM_FILE= tm-i386os9k.h
diff --git a/gdb/config/i386/i386sco.mh b/gdb/config/i386/i386sco.mh
new file mode 100644
index 0000000..69076b5
--- /dev/null
+++ b/gdb/config/i386/i386sco.mh
@@ -0,0 +1,13 @@
+# Host: Intel 386 running SCO Unix (pre-SVR4)
+
+XM_FILE= xm-i386sco.h
+XDEPFILES=
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386sco.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
+#msg The SCO C compiler cannot parse symtab.h when value.h has been included.
+#msg This is a bug in the compiler; the code is valid.
+#msg Therefore, you must use GCC to compile GDB on SCO machines.
+CC=gcc -D_POSIX_SOURCE=1
diff --git a/gdb/config/i386/i386sco4.mh b/gdb/config/i386/i386sco4.mh
new file mode 100644
index 0000000..a13f993
--- /dev/null
+++ b/gdb/config/i386/i386sco4.mh
@@ -0,0 +1,12 @@
+# Host: Intel 386 running SCO Unix 3.2v4
+
+XM_FILE= xm-i386sco.h
+XDEPFILES=
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386sco4.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
+# The cc compiler mishandles const in cases like
+# struct type ** const (c_builtin_types[]) =
+MH_CFLAGS=-Dconst=
diff --git a/gdb/config/i386/i386sco5.mh b/gdb/config/i386/i386sco5.mh
new file mode 100644
index 0000000..3bea87a
--- /dev/null
+++ b/gdb/config/i386/i386sco5.mh
@@ -0,0 +1,17 @@
+# Host: Intel 386 running SCO OpenServer 5
+# Much like 3.2v4, except we don't have to avoid problems with const
+
+XM_FILE= xm-i386sco.h
+
+#
+# Not all configurations of SCO OpenServer 5 come with the TCP/IP
+# runtime, but all come with the development system, so we always
+# have socket(), gethostbyname(), and friends.
+#
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lPW -lsocket
+
+NAT_FILE= nm-i386sco5.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corefile.o core-aout.o \
+ corelow.o i386v-nat.o solib.o
+
diff --git a/gdb/config/i386/i386sco5.mt b/gdb/config/i386/i386sco5.mt
new file mode 100644
index 0000000..54dc68d
--- /dev/null
+++ b/gdb/config/i386/i386sco5.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SCO Open Server 5
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386sco5.h
diff --git a/gdb/config/i386/i386sol2.mh b/gdb/config/i386/i386sol2.mh
new file mode 100644
index 0000000..ff24294
--- /dev/null
+++ b/gdb/config/i386/i386sol2.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running Solaris 2 (SVR4)
+
+XM_FILE= xm-i386v4.h
+XDEPFILES=
+
+NAT_FILE= nm-i386sol2.h
+NATDEPFILES= core-regset.o procfs.o fork-child.o i386v4-nat.o corelow.o
diff --git a/gdb/config/i386/i386sol2.mt b/gdb/config/i386/i386sol2.mt
new file mode 100644
index 0000000..80b576f
--- /dev/null
+++ b/gdb/config/i386/i386sol2.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o
+TM_FILE= tm-i386sol2.h
diff --git a/gdb/config/i386/i386v.mh b/gdb/config/i386/i386v.mh
new file mode 100644
index 0000000..d67a30f
--- /dev/null
+++ b/gdb/config/i386/i386v.mh
@@ -0,0 +1,8 @@
+# Host: Intel 386 running System V
+
+XM_FILE= xm-i386v.h
+XDEPFILES=
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
diff --git a/gdb/config/i386/i386v.mt b/gdb/config/i386/i386v.mt
new file mode 100644
index 0000000..7242d3e
--- /dev/null
+++ b/gdb/config/i386/i386v.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running System V
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v.h
diff --git a/gdb/config/i386/i386v32.mh b/gdb/config/i386/i386v32.mh
new file mode 100644
index 0000000..5b4175f
--- /dev/null
+++ b/gdb/config/i386/i386v32.mh
@@ -0,0 +1,9 @@
+# Host: Intel 386 running System V release 3.2
+
+XM_FILE= xm-i386v32.h
+XDEPFILES=
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
diff --git a/gdb/config/i386/i386v4.mh b/gdb/config/i386/i386v4.mh
new file mode 100644
index 0000000..4653887
--- /dev/null
+++ b/gdb/config/i386/i386v4.mh
@@ -0,0 +1,9 @@
+# Host: Intel 386 running SVR4
+
+XM_FILE= xm-i386v4.h
+XDEPFILES=
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o solib.o procfs.o fork-child.o i386v4-nat.o
diff --git a/gdb/config/i386/i386v4.mt b/gdb/config/i386/i386v4.mt
new file mode 100644
index 0000000..c22b675
--- /dev/null
+++ b/gdb/config/i386/i386v4.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v4.h
diff --git a/gdb/config/i386/i386v42mp.mh b/gdb/config/i386/i386v42mp.mh
new file mode 100644
index 0000000..94b6c06
--- /dev/null
+++ b/gdb/config/i386/i386v42mp.mh
@@ -0,0 +1,11 @@
+# Host: Intel 386 running SVR4
+
+XM_FILE= xm-i386v4.h
+XDEPFILES=
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+# we don't want nm-i386v4.h since that defines LOSING_POLL which isn't
+# appropriate for i386v42mp
+NAT_FILE= nm-i386v42mp.h
+NATDEPFILES= corelow.o core-regset.o solib.o procfs.o fork-child.o i386v4-nat.o
diff --git a/gdb/config/i386/i386v42mp.mt b/gdb/config/i386/i386v42mp.mt
new file mode 100644
index 0000000..0b2dea8
--- /dev/null
+++ b/gdb/config/i386/i386v42mp.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4.2MP
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v42mp.h
diff --git a/gdb/config/i386/linux.mh b/gdb/config/i386/linux.mh
new file mode 100644
index 0000000..30de91d
--- /dev/null
+++ b/gdb/config/i386/linux.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running GNU/Linux
+
+XM_FILE= xm-linux.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o core-aout.o core-regset.o i386v-nat.o i386v4-nat.o
diff --git a/gdb/config/i386/linux.mt b/gdb/config/i386/linux.mt
new file mode 100644
index 0000000..66cc97d
--- /dev/null
+++ b/gdb/config/i386/linux.mt
@@ -0,0 +1,5 @@
+# Target: Intel 386 running GNU/Linux
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-linux.h
+
+GDBSERVER_DEPFILES= low-linux.o
diff --git a/gdb/config/i386/nbsd.mh b/gdb/config/i386/nbsd.mh
new file mode 100644
index 0000000..c76b897
--- /dev/null
+++ b/gdb/config/i386/nbsd.mh
@@ -0,0 +1,5 @@
+# Host: Intel 386 running NetBSD
+XDEPFILES= ser-tcp.o
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o i386b-nat.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/i386/nbsd.mt b/gdb/config/i386/nbsd.mt
new file mode 100644
index 0000000..7570850
--- /dev/null
+++ b/gdb/config/i386/nbsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running NetBSD
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/i386/ncr3000.mh b/gdb/config/i386/ncr3000.mh
new file mode 100644
index 0000000..4f60756
--- /dev/null
+++ b/gdb/config/i386/ncr3000.mh
@@ -0,0 +1,16 @@
+# Host: NCR 3000 (Intel 386 running SVR4)
+
+# The NCR 3000 ships with a MetaWare compiler installed as /bin/cc.
+# This compiler not only emits obnoxious copyright messages every time
+# you run it, but it chokes and dies on a whole bunch of GNU source
+# files. Default to using the AT&T compiler installed in /usr/ccs/ATT/cc.
+# Unfortunately though, the AT&T compiler sometimes generates code that
+# the assembler barfs on if -g is used, so disable it by default as well.
+CC = /usr/ccs/ATT/cc
+CFLAGS =
+
+XM_FILE= xm-i386v4.h
+XDEPFILES=
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o procfs.o fork-child.o i386v4-nat.o
diff --git a/gdb/config/i386/ncr3000.mt b/gdb/config/i386/ncr3000.mt
new file mode 100644
index 0000000..0bbf9b3
--- /dev/null
+++ b/gdb/config/i386/ncr3000.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o
+TM_FILE= tm-i386v4.h
diff --git a/gdb/config/i386/nm-fbsd.h b/gdb/config/i386/nm-fbsd.h
new file mode 100644
index 0000000..727623c
--- /dev/null
+++ b/gdb/config/i386/nm-fbsd.h
@@ -0,0 +1,98 @@
+/* Native-dependent definitions for Intel 386 running BSD Unix, for GDB.
+ Copyright 1986, 1987, 1989, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_FREEBSD_H
+#define NM_FREEBSD_H
+
+/* Be shared lib aware */
+#include "solib.h"
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#include <machine/vmparam.h>
+#define KERNEL_U_ADDR USRSTACK
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int
+i386_register_u_addr PARAMS ((int, int));
+
+#define PTRACE_ARG3_TYPE char*
+
+/* make structure definitions match up with those expected in solib.c */
+#define link_object sod
+#define lo_name sod_name
+#define lo_library sod_library
+#define lo_unused sod_reserved
+#define lo_major sod_major
+#define lo_minor sod_minor
+#define lo_next sod_next
+
+#define link_map so_map
+#define lm_addr som_addr
+#define lm_name som_path
+#define lm_next som_next
+#define lm_lop som_sod
+#define lm_lob som_sodbase
+#define lm_rwt som_write
+#define lm_ld som_dynamic
+#define lm_lpd som_spd
+
+#define link_dynamic_2 section_dispatch_table
+#define ld_loaded sdt_loaded
+#define ld_need sdt_sods
+#define ld_rules sdt_filler1
+#define ld_got sdt_got
+#define ld_plt sdt_plt
+#define ld_rel sdt_rel
+#define ld_hash sdt_hash
+#define ld_stab sdt_nzlist
+#define ld_stab_hash sdt_filler2
+#define ld_buckets sdt_buckets
+#define ld_symbols sdt_strings
+#define ld_symb_size sdt_str_sz
+#define ld_text sdt_text_sz
+#define ld_plt_sz sdt_plt_sz
+
+#define rtc_symb rt_symbol
+#define rtc_sp rt_sp
+#define rtc_next rt_next
+
+#define ld_debug so_debug
+#define ldd_version dd_version
+#define ldd_in_debugger dd_in_debugger
+#define ldd_sym_loaded dd_sym_loaded
+#define ldd_bp_addr dd_bpt_addr
+#define ldd_bp_inst dd_bpt_shadow
+#define ldd_cp dd_cc
+
+#define link_dynamic _dynamic
+#define ld_version d_version
+#define ldd d_debug
+#define ld_un d_un
+#define ld_2 d_sdt
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+#endif /* NM_FREEBSD_H */
diff --git a/gdb/config/i386/nm-gnu.h b/gdb/config/i386/nm-gnu.h
new file mode 100644
index 0000000..95f25a5
--- /dev/null
+++ b/gdb/config/i386/nm-gnu.h
@@ -0,0 +1,22 @@
+/* Native-dependent definitions for Intel 386 running the GNU Hurd
+ Copyright 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include the generic hurd definitions. */
+
+#include "nm-gnu.h"
diff --git a/gdb/config/i386/nm-i386aix.h b/gdb/config/i386/nm-i386aix.h
new file mode 100644
index 0000000..4240393
--- /dev/null
+++ b/gdb/config/i386/nm-i386aix.h
@@ -0,0 +1,42 @@
+/* Native support for i386 aix ps/2.
+ Copyright 1986, 1987, 1989, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Changes for IBM AIX PS/2 by Minh Tran-Le (tranle@intellicorp.com)
+ * Revision: 5-May-93 00:11:35
+ */
+
+#ifndef NM_I386AIX_H
+#define NM_I386AIX_H 1
+
+/* code to execute to print interesting information about the
+ * floating point processor (if any)
+ * No need to define if there is nothing to do.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+#undef KERNEL_U_ADDR
+#define KERNEL_U_ADDR 0xf03fd000
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+#endif /* NM_I386AIX_H */
diff --git a/gdb/config/i386/nm-i386bsd.h b/gdb/config/i386/nm-i386bsd.h
new file mode 100644
index 0000000..7366f2d
--- /dev/null
+++ b/gdb/config/i386/nm-i386bsd.h
@@ -0,0 +1,39 @@
+/* Native-dependent definitions for Intel 386 running BSD Unix, for GDB.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_I386BSD_H
+#define NM_I386BSD_H
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#include <machine/vmparam.h>
+#define KERNEL_U_ADDR USRSTACK
+
+#undef FLOAT_INFO /* No float info yet */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int
+i386_register_u_addr PARAMS ((int, int));
+
+#define PTRACE_ARG3_TYPE char*
+
+#endif /* NM_I386BSD_H */
diff --git a/gdb/config/i386/nm-i386lynx.h b/gdb/config/i386/nm-i386lynx.h
new file mode 100644
index 0000000..e29821f
--- /dev/null
+++ b/gdb/config/i386/nm-i386lynx.h
@@ -0,0 +1,25 @@
+/* Native-dependent definitions for Intel 386 running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_I386LYNX_H
+#define NM_I386LYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_I386LYNX_H */
diff --git a/gdb/config/i386/nm-i386mach.h b/gdb/config/i386/nm-i386mach.h
new file mode 100644
index 0000000..f01d2b1
--- /dev/null
+++ b/gdb/config/i386/nm-i386mach.h
@@ -0,0 +1,26 @@
+/* Native definitions for Mach on an Intel 386
+ Copyright (C) 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+/* #define ATTACH_DETACH 1 */
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
diff --git a/gdb/config/i386/nm-i386sco.h b/gdb/config/i386/nm-i386sco.h
new file mode 100644
index 0000000..33ab6de
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco.h
@@ -0,0 +1,41 @@
+/* Native support for i386.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+ Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if 0
+/* code to execute to print interesting information about the
+ floating point processor (if any)
+ No need to define if there is nothing to do.
+ On the 386, unfortunately this code is host-dependent (and lives
+ in the i386-xdep.c file), so we can't
+ do this unless we *know* we aren't cross-debugging. FIXME.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+#endif /*0*/
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int
+i386_register_u_addr PARAMS ((int, int));
+
+/* When calling functions on SCO, sometimes we get an error writing some
+ of the segment registers. This would appear to be a kernel
+ bug/non-feature. */
+#define CANNOT_STORE_REGISTER(regno) ((regno) == 14 || (regno) == 15)
diff --git a/gdb/config/i386/nm-i386sco4.h b/gdb/config/i386/nm-i386sco4.h
new file mode 100644
index 0000000..41daef5
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco4.h
@@ -0,0 +1,32 @@
+/* Native support for SCO 3.2v4.
+ Copyright 1993 Free Software Foundation, Inc.
+ Contributed by Cygnus Support. By Ian Lance Taylor
+ <ian@cygnus.com> based on work by Martin Walker <maw@netcom.com>.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* SCO 3.2v4 is actually just like SCO 3.2v2, except that it
+ additionally supports attaching to a process. */
+
+#include "i386/nm-i386sco.h"
+
+#define ATTACH_DETACH
+
+/* SCO, in its wisdom, does not provide <sys/ptrace.h>. infptrace.c
+ does not have defaults for these values. */
+#define PTRACE_ATTACH 10
+#define PTRACE_DETACH 11
diff --git a/gdb/config/i386/nm-i386sco5.h b/gdb/config/i386/nm-i386sco5.h
new file mode 100644
index 0000000..10e749b
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco5.h
@@ -0,0 +1,39 @@
+/* Native support for SCO OpenServer 5
+ Copyright 1996, 1998 Free Software Foundation, Inc.
+ Re-written by J. Kean Johnston <jkj@sco.com>.
+ Originally written by Robert Lipe <robertl@dgii.com>, based on
+ work by Ian Lance Taylor <ian@cygnus.com> and
+ Martin Walker <maw@netcom.com>.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* Basically, its a lot like the older versions ... */
+#include "i386/nm-i386sco.h"
+
+/* ... but it can do a lot of SVR4 type stuff too. */
+#define SVR4_SHARED_LIBS
+#include "solib.h" /* Pick up shared library support */
+
+#define ATTACH_DETACH
+
+/* SCO does not provide <sys/ptrace.h>. infptrace.c does not
+ have defaults for these values. */
+
+#define PTRACE_ATTACH 10
+#define PTRACE_DETACH 11
+
+
diff --git a/gdb/config/i386/nm-i386sol2.h b/gdb/config/i386/nm-i386sol2.h
new file mode 100644
index 0000000..2ae966c
--- /dev/null
+++ b/gdb/config/i386/nm-i386sol2.h
@@ -0,0 +1,35 @@
+/* Native support for i386 running Solaris 2.
+ Copyright 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-sysv4.h"
+
+#ifdef HAVE_THREAD_DB_LIB
+
+#ifdef __STDC__
+struct objfile;
+#endif
+
+#define target_new_objfile(OBJFILE) sol_thread_new_objfile (OBJFILE)
+
+void sol_thread_new_objfile PARAMS ((struct objfile *objfile));
+
+#define FIND_NEW_THREADS sol_find_new_threads
+void sol_find_new_threads PARAMS ((void));
+
+#endif
diff --git a/gdb/config/i386/nm-i386v.h b/gdb/config/i386/nm-i386v.h
new file mode 100644
index 0000000..8e6877e
--- /dev/null
+++ b/gdb/config/i386/nm-i386v.h
@@ -0,0 +1,36 @@
+/* Native support for i386.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+ Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if 0
+/* code to execute to print interesting information about the
+ floating point processor (if any)
+ No need to define if there is nothing to do.
+ On the 386, unfortunately this code is host-dependent (and lives
+ in the i386-xdep.c file), so we can't
+ do this unless we *know* we aren't cross-debugging. FIXME.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+#endif /*0*/
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int
+i386_register_u_addr PARAMS ((int, int));
diff --git a/gdb/config/i386/nm-i386v4.h b/gdb/config/i386/nm-i386v4.h
new file mode 100644
index 0000000..8722a40
--- /dev/null
+++ b/gdb/config/i386/nm-i386v4.h
@@ -0,0 +1,24 @@
+/* Native support for i386 running SVR4.
+ Copyright 1986, 1987, 1989, 1992, 1996 Free Software Foundation, Inc.
+ Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-sysv4.h"
+
+/* Poll causes GDB to hang, at least under Unixware 1.1.2. */
+#define LOSING_POLL
diff --git a/gdb/config/i386/nm-i386v42mp.h b/gdb/config/i386/nm-i386v42mp.h
new file mode 100644
index 0000000..6ffd128
--- /dev/null
+++ b/gdb/config/i386/nm-i386v42mp.h
@@ -0,0 +1,22 @@
+/* Native support for i386 running SVR4.
+ Copyright 1986, 1987, 1989, 1992, 1996 Free Software Foundation, Inc.
+ Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-sysv4.h"
+
diff --git a/gdb/config/i386/nm-linux.h b/gdb/config/i386/nm-linux.h
new file mode 100644
index 0000000..ad0b8db
--- /dev/null
+++ b/gdb/config/i386/nm-linux.h
@@ -0,0 +1,73 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992, 1996, 1998
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+#include "i386/nm-i386v.h"
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+/* Tell gdb that we can attach and detach other processes */
+#define ATTACH_DETACH
+
+#define U_REGS_OFFSET 0
+
+/* GNU/Linux supports the 386 hardware debugging registers. */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* After a watchpoint trap, the PC points to the instruction after
+ the one that caused the trap. Therefore we don't need to step over it.
+ But we do need to reset the status register to avoid another trap. */
+#define HAVE_CONTINUABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ i386_stopped_by_watchpoint (inferior_pid)
+
+/* Use these macros for watchpoint insertion/removal. */
+
+#define target_insert_watchpoint(addr, len, type) \
+ i386_insert_watchpoint (inferior_pid, addr, len, type)
+
+#define target_remove_watchpoint(addr, len, type) \
+ i386_remove_watchpoint (inferior_pid, addr, len)
+
+/* We define this if link.h is available, because with ELF we use SVR4 style
+ shared libraries. */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h" /* Support for shared libraries. */
+#endif
+
+extern CORE_ADDR
+i386_stopped_by_watchpoint PARAMS ((int));
+extern int
+i386_insert_watchpoint PARAMS ((int pid, CORE_ADDR addr, int len, int rw));
+extern int
+i386_remove_watchpoint PARAMS ((int pid, CORE_ADDR addr, int len));
+
+#endif /* #ifndef NM_LINUX_H */
diff --git a/gdb/config/i386/nm-m3.h b/gdb/config/i386/nm-m3.h
new file mode 100644
index 0000000..5127091
--- /dev/null
+++ b/gdb/config/i386/nm-m3.h
@@ -0,0 +1,22 @@
+/* Native-dependent definitions for Intel 386 running Mach 3.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include the generic Mach 3 definitions. */
+
+#include "nm-m3.h"
diff --git a/gdb/config/i386/nm-nbsd.h b/gdb/config/i386/nm-nbsd.h
new file mode 100644
index 0000000..b59fec6
--- /dev/null
+++ b/gdb/config/i386/nm-nbsd.h
@@ -0,0 +1,34 @@
+/* Native-dependent definitions for Intel 386 running NetBSD, for GDB.
+ Copyright 1986, 1987, 1989, 1992, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "nm-nbsd.h"
+
+/* #define FLOAT_INFO { i386_float_info(); } */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int
+i386_register_u_addr PARAMS ((int, int));
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/i386/nm-ptx4.h b/gdb/config/i386/nm-ptx4.h
new file mode 100644
index 0000000..5e6cd56
--- /dev/null
+++ b/gdb/config/i386/nm-ptx4.h
@@ -0,0 +1,62 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx
+ with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-sysv4.h"
+
+#undef USE_PROC_FS
+
+#include "nm-symmetry.h"
+
+#define PTRACE_READ_REGS(pid,regaddr) mptrace (XPT_RREGS, (pid), (regaddr), 0)
+#define PTRACE_WRITE_REGS(pid,regaddr) \
+ mptrace (XPT_WREGS, (pid), (regaddr), 0)
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We must fetch all the regs before storing, since we store all at once. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+#define CHILD_WAIT
+struct target_waitstatus;
+extern int child_wait PARAMS ((int, struct target_waitstatus *));
+
+/*
+ * ptx does attach as of ptx version 2.1. Prior to that, the interface
+ * exists but does not work.
+ *
+ * FIXME: Using attach/detach requires using the ptx MPDEBUGGER
+ * interface. There are still problems with that, so for now don't
+ * enable attach/detach. If you turn it on anyway, it will mostly
+ * work, but has a number of bugs. -fubar, 2/94.
+ */
+/*#define ATTACH_DETACH 1*/
+#undef ATTACH_DETACH
+#define PTRACE_ATTACH XPT_DEBUG
+#define PTRACE_DETACH XPT_UNDEBUG
+/*
+ * The following drivel is needed because there are two ptrace-ish
+ * calls on ptx: ptrace() and mptrace(), each of which does about half
+ * of the ptrace functions.
+ */
+#define PTRACE_ATTACH_CALL(pid) ptx_do_attach(pid)
+#define PTRACE_DETACH_CALL(pid, signo) ptx_do_detach(pid, signo)
diff --git a/gdb/config/i386/nm-sun386.h b/gdb/config/i386/nm-sun386.h
new file mode 100644
index 0000000..f7a904b
--- /dev/null
+++ b/gdb/config/i386/nm-sun386.h
@@ -0,0 +1,27 @@
+/* Native support for Sun 386i, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
diff --git a/gdb/config/i386/nm-symmetry.h b/gdb/config/i386/nm-symmetry.h
new file mode 100644
index 0000000..80cf097
--- /dev/null
+++ b/gdb/config/i386/nm-symmetry.h
@@ -0,0 +1,46 @@
+/* Definitions to make GDB run on a Sequent Symmetry under dynix 3.0,
+ with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We must fetch all the regs before storing, since we store all at once. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+#ifdef _SEQUENT_
+#define CHILD_WAIT
+extern int child_wait PARAMS ((int, struct target_waitstatus *));
+#endif
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#ifdef _SEQUENT_
+#include <sys/param.h>
+#include <sys/user.h>
+#include <sys/mc_vmparam.h>
+/* VA_UAREA is defined in <sys/mc_vmparam.h>, and is dependant upon
+ sizeof(struct user) */
+#define KERNEL_U_ADDR (VA_UAREA) /* ptx */
+#else
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG)) /* dynix */
+#endif
diff --git a/gdb/config/i386/ptx.mh b/gdb/config/i386/ptx.mh
new file mode 100644
index 0000000..e623538
--- /dev/null
+++ b/gdb/config/i386/ptx.mh
@@ -0,0 +1,7 @@
+# Host: Sequent Symmetry running ptx 1.3, with Weitek 1167 or i387
+
+XM_FILE= xm-ptx.h
+XDEPFILES= inftarg.o fork-child.o symm-nat.o corelow.o core-aout.o
+XM_CLIBS= -lPW -lseq
+
+NAT_FILE= nm-symmetry.h
diff --git a/gdb/config/i386/ptx.mt b/gdb/config/i386/ptx.mt
new file mode 100644
index 0000000..757df33
--- /dev/null
+++ b/gdb/config/i386/ptx.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running ptx 2.0, with Weitek 1167 or i387.
+TDEPFILES= symm-tdep.o i387-tdep.o i386-tdep.o
+TM_FILE= tm-ptx.h
diff --git a/gdb/config/i386/ptx4.mh b/gdb/config/i386/ptx4.mh
new file mode 100644
index 0000000..7b9d11b
--- /dev/null
+++ b/gdb/config/i386/ptx4.mh
@@ -0,0 +1,7 @@
+# Host: Sequent Symmetry running ptx 1.3, with Weitek 1167 or i387
+
+XM_FILE= xm-ptx4.h
+XDEPFILES= inftarg.o fork-child.o symm-nat.o corelow.o core-aout.o solib.o core-regset.o
+XM_CLIBS= -lseq
+
+NAT_FILE= nm-ptx4.h
diff --git a/gdb/config/i386/ptx4.mt b/gdb/config/i386/ptx4.mt
new file mode 100644
index 0000000..f347809
--- /dev/null
+++ b/gdb/config/i386/ptx4.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running ptx 4.0, with Weitek 1167 or i387.
+TDEPFILES= symm-tdep.o i387-tdep.o i386-tdep.o
+TM_FILE= tm-ptx4.h
diff --git a/gdb/config/i386/sun386.mh b/gdb/config/i386/sun386.mh
new file mode 100644
index 0000000..d249661
--- /dev/null
+++ b/gdb/config/i386/sun386.mh
@@ -0,0 +1,5 @@
+# Host: Sun 386i
+XDEPFILES=
+XM_FILE= xm-sun386.h
+NAT_FILE= nm-sun386.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o sun386-nat.o
diff --git a/gdb/config/i386/sun386.mt b/gdb/config/i386/sun386.mt
new file mode 100644
index 0000000..665ca64
--- /dev/null
+++ b/gdb/config/i386/sun386.mt
@@ -0,0 +1,3 @@
+# Target: Sun 386i target configuration file.
+TDEPFILES= i386-tdep.o solib.o
+TM_FILE= tm-sun386.h
diff --git a/gdb/config/i386/symmetry.mh b/gdb/config/i386/symmetry.mh
new file mode 100644
index 0000000..69c05bc
--- /dev/null
+++ b/gdb/config/i386/symmetry.mh
@@ -0,0 +1,5 @@
+# Host: Sequent Symmetry running Dynix 3.0, with Weitek 1167 or i387.
+XDEPFILES=
+XM_FILE= xm-symmetry.h
+NAT_FILE= nm-symmetry.h
+NATDEPFILES= inftarg.o fork-child.o corelow.o core-aout.o symm-nat.o
diff --git a/gdb/config/i386/symmetry.mt b/gdb/config/i386/symmetry.mt
new file mode 100644
index 0000000..a3dba70
--- /dev/null
+++ b/gdb/config/i386/symmetry.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running Dynix 3.0, with Weitek 1167 or i387.
+TDEPFILES= i386-tdep.o symm-tdep.o i387-tdep.o
+TM_FILE= tm-symmetry.h
diff --git a/gdb/config/i386/tm-cygwin.h b/gdb/config/i386/tm-cygwin.h
new file mode 100644
index 0000000..b1ad894
--- /dev/null
+++ b/gdb/config/i386/tm-cygwin.h
@@ -0,0 +1,127 @@
+/* Macro definitions for i386 running under the win32 API Unix.
+ Copyright 1995, 1996 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+#include "i386/tm-i386v.h"
+
+#undef MAX_REGISTER_RAW_SIZE
+#undef MAX_REGISTER_VIRTUAL_SIZE
+#undef NUM_REGS
+#undef REGISTER_BYTE
+#undef REGISTER_BYTES
+#undef REGISTER_CONVERTIBLE
+#undef REGISTER_CONVERT_TO_RAW
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#undef REGISTER_NAMES
+#undef REGISTER_RAW_SIZE
+#undef REGISTER_VIRTUAL_SIZE
+#undef REGISTER_VIRTUAL_TYPE
+
+/* Number of machine registers */
+
+#define NUM_REGS 24
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+/* the order of the first 8 registers must match the compiler's
+ * numbering scheme (which is the same as the 386 scheme)
+ * also, this table must match regmap in i386-pinsn.c.
+ */
+
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+ "esp", "ebp", "esi", "edi", \
+ "eip", "ps", "cs", "ss", \
+ "ds", "es", "fs", "gs", \
+ "st", "st(1)","st(2)","st(3)",\
+ "st(4)","st(5)","st(6)","st(7)",}
+
+#define FP0_REGNUM 16
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#define REGISTER_BYTES (16 * 4 + 8 * 10)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) (((N) < 16) ? (N) * 4 : (((N) - 16) * 10) + (16 * 4))
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) (((N) < 16) ? 4 : 10)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((N) < 16) ? 4 : 10)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 10
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#define REGISTER_CONVERTIBLE(N) \
+ ((N < FP0_REGNUM) ? 0 : 1)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+extern void
+i387_to_double PARAMS ((char *, char *));
+
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ i387_to_double ((FROM), (char *)&val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+extern void
+double_to_i387 PARAMS ((char *, char *));
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ double_to_i387((char *)&val, (TO)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N < FP0_REGNUM) ? builtin_type_int : \
+ builtin_type_double)
+
+#define NAMES_HAVE_UNDERSCORE
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) skip_trampoline_code (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, 0)
+extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR pc, char *name));
+
+extern char *cygwin_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) cygwin_pid_to_str (PID)
diff --git a/gdb/config/i386/tm-fbsd.h b/gdb/config/i386/tm-fbsd.h
new file mode 100644
index 0000000..9933e10
--- /dev/null
+++ b/gdb/config/i386/tm-fbsd.h
@@ -0,0 +1,32 @@
+/* Target macro definitions for i386 running FreeBSD
+ Copyright (C) 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#include "i386/tm-i386bsd.h"
+
+
+#undef NUM_REGS
+#define NUM_REGS 14
+
+
+#undef IN_SOLIB_CALL_TRAMPOLINE
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) STREQ (name, "_DYNAMIC")
+
+
+extern i386_float_info ();
+#define FLOAT_INFO i386_float_info ()
diff --git a/gdb/config/i386/tm-i386.h b/gdb/config/i386/tm-i386.h
new file mode 100644
index 0000000..e2039e5
--- /dev/null
+++ b/gdb/config/i386/tm-i386.h
@@ -0,0 +1,307 @@
+/* Macro definitions for GDB on an Intel i[345]86.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#ifndef TM_I386_H
+#define TM_I386_H 1
+
+#ifdef __STDC__ /* Forward decl's for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+#endif
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* Used for example in valprint.c:print_floating() to enable checking
+ for NaN's */
+
+#define IEEE_FLOAT
+
+/* Number of traps that happen between exec'ing the shell to run an
+ inferior, and when we finally get to the inferior code. This is 2
+ on most implementations. */
+
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions to reach some
+ "real" code. */
+
+#define SKIP_PROLOGUE(frompc) {(frompc) = i386_skip_prologue((frompc));}
+
+extern int i386_skip_prologue PARAMS ((int));
+
+/* Immediately after a function call, return the saved pc. Can't always go
+ through the frames for this because on some machines the new frame is not
+ set up until the new function executes some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) (read_memory_integer (read_register (SP_REGNUM), 4))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0xcc}
+
+/* Amount PC must be decremented by after a breakpoint. This is often the
+ number of bytes in BREAKPOINT but not always. */
+
+#define DECR_PC_AFTER_BREAK 1
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_FREGS 0 /*8*/ /* Number of FP regs */
+#define NUM_REGS (16 + NUM_FREGS) /* Basic i*86 regs + FP regs */
+
+/* Initializer for an array of names of registers. There should be at least
+ NUM_REGS strings in this initializer. Any excess ones are simply ignored.
+ The order of the first 8 registers must match the compiler's numbering
+ scheme (which is the same as the 386 scheme) and also regmap in the various
+ *-nat.c files. */
+
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+ "esp", "ebp", "esi", "edi", \
+ "eip", "eflags", "cs", "ss", \
+ "ds", "es", "fs", "gs", \
+ "st0", "st1", "st2", "st3", \
+ "st4", "st5", "st6", "st7", \
+ }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define FP_REGNUM 5 /* (ebp) Contains address of executing stack frame */
+#define SP_REGNUM 4 /* (usp) Contains address of top of stack */
+#define PC_REGNUM 8 /* (eip) Contains program counter */
+#define PS_REGNUM 9 /* (ps) Contains processor status */
+
+#define FP0_REGNUM 16 /* (st0) 387 register */
+#define FPC_REGNUM 25 /* 80387 control register */
+
+/* Total amount of space needed to store our copies of the machine's register
+ state, the array `registers'. */
+
+#define REGISTER_BYTES ((NUM_REGS - NUM_FREGS)*4 + NUM_FREGS*10)
+
+/* Index within `registers' of the first byte of the space for register N. */
+
+#define REGISTER_BYTE(N) \
+ (((N) < FP0_REGNUM) ? ((N) * 4) : ((((N) - FP0_REGNUM) * 10) + 64))
+
+/* Number of bytes of storage in the actual machine representation for
+ register N. All registers are 4 bytes, except 387 st(0) - st(7),
+ which are 80 bits each. */
+
+#define REGISTER_RAW_SIZE(N) (((N) < FP0_REGNUM) ? 4 : 10)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((N) < FP0_REGNUM) ? 4 : 8)
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type of data in
+ register N. Perhaps si and di should go here, but potentially they
+ could be used for things other than address. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM) \
+ ? lookup_pointer_type (builtin_type_void) \
+ : (((N) < FP0_REGNUM) \
+ ? builtin_type_int \
+ : builtin_type_double))
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { char buf[REGISTER_SIZE]; \
+ (SP) -= sizeof (ADDR); \
+ store_address (buf, sizeof (ADDR), ADDR); \
+ write_memory ((SP), buf, sizeof (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ i386_extract_return_value ((TYPE),(REGBUF),(VALBUF))
+
+extern void i386_extract_return_value PARAMS ((struct type *, char [], char *));
+
+/* Write into appropriate registers a function return value of type TYPE, given
+ in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ { \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM), (VALBUF), \
+ TYPE_LENGTH (TYPE)); \
+ else \
+ write_register_bytes (0, (VALBUF), TYPE_LENGTH (TYPE)); \
+ }
+
+/* Extract from an array REGBUF containing the (raw) register state the address
+ in which a function should return its structure value, as a CORE_ADDR (or an
+ expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* The following redefines make backtracing through sigtramp work.
+ They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+ from the sigcontext structure which is pushed by the kernel on the
+ user stack, along with a pointer to it. */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+ chain-pointer.
+ In the case of the i386, the frame's nominal address
+ is the address of a 4-byte word containing the calling frame's address. */
+
+#define FRAME_CHAIN(thisframe) \
+ ((thisframe)->signal_handler_caller \
+ ? (thisframe)->frame \
+ : (!inside_entry_file ((thisframe)->pc) \
+ ? read_memory_integer ((thisframe)->frame, 4) \
+ : 0))
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ do { \
+ if ((FI)->signal_handler_caller) \
+ (FRAMELESS) = 0; \
+ else \
+ (FRAMELESS) = frameless_look_for_prologue(FI); \
+ } while (0)
+
+/* Saved Pc. Get it from sigcontext if within sigtramp. */
+
+#define FRAME_SAVED_PC(FRAME) \
+ (((FRAME)->signal_handler_caller \
+ ? sigtramp_saved_pc (FRAME) \
+ : read_memory_integer ((FRAME)->frame + 4, 4)) \
+ )
+
+extern CORE_ADDR sigtramp_saved_pc PARAMS ((struct frame_info *));
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame. Can return -1, meaning no way
+ to tell, which is typical now that the C compiler delays popping them. */
+
+#define FRAME_NUM_ARGS(numargs, fi) (numargs) = i386_frame_num_args(fi)
+
+extern int i386_frame_num_args PARAMS ((struct frame_info *));
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ i386_frame_find_saved_regs ((frame_info), &(frame_saved_regs)); }
+
+extern void i386_frame_find_saved_regs PARAMS ((struct frame_info *,
+ struct frame_saved_regs *));
+
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME { i386_push_dummy_frame (); }
+
+extern void i386_push_dummy_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME { i386_pop_frame (); }
+
+extern void i386_pop_frame PARAMS ((void));
+
+
+/* this is
+ * call 11223344 (32 bit relative)
+ * int3
+ */
+
+#define CALL_DUMMY { 0x223344e8, 0xcc11 }
+
+#define CALL_DUMMY_LENGTH 8
+
+#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET 5
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ int from, to, delta, loc; \
+ loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); \
+ from = loc + 5; \
+ to = (int)(fun); \
+ delta = to - from; \
+ *((char *)(dummyname) + 1) = (delta & 0xff); \
+ *((char *)(dummyname) + 2) = ((delta >> 8) & 0xff); \
+ *((char *)(dummyname) + 3) = ((delta >> 16) & 0xff); \
+ *((char *)(dummyname) + 4) = ((delta >> 24) & 0xff); \
+}
+
+extern void print_387_control_word PARAMS ((unsigned int));
+extern void print_387_status_word PARAMS ((unsigned int));
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+#endif /* ifndef TM_I386_H */
diff --git a/gdb/config/i386/tm-i386aix.h b/gdb/config/i386/tm-i386aix.h
new file mode 100644
index 0000000..b0121fa
--- /dev/null
+++ b/gdb/config/i386/tm-i386aix.h
@@ -0,0 +1,67 @@
+/* Macro defintions for IBM AIX PS/2 (i386).
+ Copyright 1986, 1987, 1989, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Changes for IBM AIX PS/2 by Minh Tran-Le (tranle@intellicorp.com). */
+
+#ifndef TM_I386AIX_H
+#define TM_I386AIX_H 1
+
+#include "i386/tm-i386.h"
+#include <sys/reg.h>
+
+#ifndef I386
+# define I386 1
+#endif
+#ifndef I386_AIX_TARGET
+# define I386_AIX_TARGET 1
+#endif
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#undef REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) \
+ ((N < FP0_REGNUM) ? 0 : 1)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ i387_to_double ((FROM), (char *)&val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+extern void
+i387_to_double PARAMS ((char *, char *));
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ double_to_i387((char *)&val, (TO)); \
+}
+extern void
+double_to_i387 PARAMS ((char *, char *));
+
+#endif /* TM_I386AIX_H */
diff --git a/gdb/config/i386/tm-i386bsd.h b/gdb/config/i386/tm-i386bsd.h
new file mode 100644
index 0000000..8b8c3a9
--- /dev/null
+++ b/gdb/config/i386/tm-i386bsd.h
@@ -0,0 +1,43 @@
+/* Macro definitions for i386 running under BSD Unix.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386BSD_H
+#define TM_I386BSD_H 1
+
+#include "i386/tm-i386.h"
+
+/* 386BSD cannot handle the segment registers. */
+/* BSDI can't handle them either. */
+
+#undef NUM_REGS
+#define NUM_REGS 10
+
+/* On 386 bsd, sigtramp is above the user stack and immediately below
+ the user area. Using constants here allows for cross debugging.
+ These are tested for BSDI but should work on 386BSD. */
+
+#define SIGTRAMP_START(pc) 0xfdbfdfc0
+#define SIGTRAMP_END(pc) 0xfdbfe000
+
+/* Saved Pc. Get it from sigcontext if within sigtramp. */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#endif /* ifndef TM_I386BSD_H */
diff --git a/gdb/config/i386/tm-i386gnu.h b/gdb/config/i386/tm-i386gnu.h
new file mode 100644
index 0000000..a6e3c08
--- /dev/null
+++ b/gdb/config/i386/tm-i386gnu.h
@@ -0,0 +1,48 @@
+/* Macro definitions for i386, GNU Hurd
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include common definitions for gnu systems */
+#include "nm-gnu.h"
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define THREAD_STATE_FLAVOR i386_THREAD_STATE
+#define THREAD_STATE_SIZE i386_THREAD_STATE_COUNT
+#define THREAD_STATE_SET_TRACED(state) \
+ ((struct i386_thread_state *)state)->efl |= 0x100
+#define THREAD_STATE_CLEAR_TRACED(state) \
+ ((((struct i386_thread_state *)state)->efl &= ~0x100), 1)
+
+/* we can do it */
+#define ATTACH_DETACH 1
+
+/* Sigh. There should be a file for i386 but no sysv stuff in it */
+#include "i386/tm-i386v.h"
+
+/* I want to test this float info code. See comment in tm-i386v.h */
+#undef FLOAT_INFO
+#define FLOAT_INFO { i386_mach3_float_info (); }
+
+/* Address of end of stack space.
+ * for MACH, see <machine/vmparam.h>
+ * @@@ I don't know what is in the 5 ints...
+ */
+#undef STACK_END_ADDR
+#define STACK_END_ADDR (0xc0000000-sizeof(int [5]))
diff --git a/gdb/config/i386/tm-i386lynx.h b/gdb/config/i386/tm-i386lynx.h
new file mode 100644
index 0000000..9e732b3
--- /dev/null
+++ b/gdb/config/i386/tm-i386lynx.h
@@ -0,0 +1,33 @@
+/* Macro definitions for Intel 386 running under LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386LYNX_H
+#define TM_I386LYNX_H
+
+#include "tm-lynx.h"
+
+/* Most definitions from sysv could be used. */
+#include "i386/tm-i386.h"
+
+#undef SAVED_PC_AFTER_CALL
+
+#define SAVED_PC_AFTER_CALL i386lynx_saved_pc_after_call
+CORE_ADDR i386lynx_saved_pc_after_call ();
+
+#endif /* TM_I386LYNX_H */
diff --git a/gdb/config/i386/tm-i386m3.h b/gdb/config/i386/tm-i386m3.h
new file mode 100644
index 0000000..2f97505
--- /dev/null
+++ b/gdb/config/i386/tm-i386m3.h
@@ -0,0 +1,60 @@
+/* Macro definitions for i386, Mach 3.0
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include common definitions for Mach3 systems */
+#include "nm-m3.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+#define MACHINE_CPROC_SP_OFFSET 20
+#define MACHINE_CPROC_PC_OFFSET 16
+#define MACHINE_CPROC_FP_OFFSET 12
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define TRACE_FLAVOR i386_THREAD_STATE
+#define TRACE_FLAVOR_SIZE i386_THREAD_STATE_COUNT
+#define TRACE_SET(x,state) \
+ ((struct i386_thread_state *)state)->efl |= 0x100
+#define TRACE_CLEAR(x,state) \
+ ((((struct i386_thread_state *)state)->efl &= ~0x100), 1)
+
+/* we can do it */
+#define ATTACH_DETACH 1
+
+/* Define this if the C compiler puts an underscore at the front
+ of external names before giving them to the linker. */
+
+#define NAMES_HAVE_UNDERSCORE
+
+/* Sigh. There should be a file for i386 but no sysv stuff in it */
+#include "i386/tm-i386.h"
+
+/* I want to test this float info code. See comment in tm-i386v.h */
+#undef FLOAT_INFO
+#define FLOAT_INFO { i386_mach3_float_info (); }
+
+/* Address of end of stack space.
+ * for MACH, see <machine/vmparam.h>
+ * @@@ I don't know what is in the 5 ints...
+ */
+#undef STACK_END_ADDR
+#define STACK_END_ADDR (0xc0000000-sizeof(int [5]))
diff --git a/gdb/config/i386/tm-i386mk.h b/gdb/config/i386/tm-i386mk.h
new file mode 100644
index 0000000..3625efb
--- /dev/null
+++ b/gdb/config/i386/tm-i386mk.h
@@ -0,0 +1,25 @@
+/* Macro definitions for i386, Mach 3.0, OSF 1/MK
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Until OSF switches to a newer Mach kernel that has
+ * a different get_emul_vector() interface.
+ */
+#define MK67 1
+
+#include "i386/tm-i386m3.h"
diff --git a/gdb/config/i386/tm-i386nw.h b/gdb/config/i386/tm-i386nw.h
new file mode 100644
index 0000000..e5cdade
--- /dev/null
+++ b/gdb/config/i386/tm-i386nw.h
@@ -0,0 +1,49 @@
+/* Macro definitions for i386 running NetWare.
+ Copyright 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386NW_H
+#define TM_I386NW_H 1
+
+#include "i386/tm-i386.h"
+
+/* Stop backtracing when we wander into main. */
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+
+/* Offsets (in target ints) into jmp_buf. Not defined in any system header
+ file, so we have to step through setjmp/longjmp with a debugger and figure
+ them out. */
+
+#define JB_ELEMENT_SIZE 4 /* jmp_buf[] is array of ints */
+
+#define JB_PC 6 /* Setjmp()'s return PC saved here */
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+#endif /* ifndef TM_I386NW_H */
+
diff --git a/gdb/config/i386/tm-i386os9k.h b/gdb/config/i386/tm-i386os9k.h
new file mode 100644
index 0000000..2b48641
--- /dev/null
+++ b/gdb/config/i386/tm-i386os9k.h
@@ -0,0 +1,63 @@
+/* Macro definitions for i386 running under BSD Unix.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386OS9K_H
+#define TM_I386OS9K_H 1
+
+#include "i386/tm-i386.h"
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS (16) /* Basic i*86 regs */
+
+/* Initializer for an array of names of registers. There should be at least
+ NUM_REGS strings in this initializer. Any excess ones are simply ignored.
+ The order of the first 8 registers must match the compiler's numbering
+ scheme (which is the same as the 386 scheme) and also regmap in the various
+ *-nat.c files. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+ "esp", "ebp", "esi", "edi", \
+ "eip", "eflags", "cs", "ss", \
+ "ds", "es", "fs", "gs", \
+ }
+
+#define DATABASE_REG 3 /* ebx */
+
+/* Amount PC must be decremented by after a breakpoint. This is often the
+ number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+/* On 386 bsd, sigtramp is above the user stack and immediately below
+ the user area. Using constants here allows for cross debugging.
+ These are tested for BSDI but should work on 386BSD. */
+#define SIGTRAMP_START(pc) 0xfdbfdfc0
+#define SIGTRAMP_END(pc) 0xfdbfe000
+
+/* Saved Pc. Get it from sigcontext if within sigtramp. */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#define BELIEVE_PCC_PROMOTION 1
+
+#endif /* #ifndef TM_I386OS9K_H */
diff --git a/gdb/config/i386/tm-i386sco5.h b/gdb/config/i386/tm-i386sco5.h
new file mode 100644
index 0000000..ffac5b3
--- /dev/null
+++ b/gdb/config/i386/tm-i386sco5.h
@@ -0,0 +1,62 @@
+/* Macro definitions for GDB on an Intel i386 running SCO Open Server 5.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+ Written by J. Kean Johnston (jkj@sco.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386SCO5_H
+#define TM_I386SCO5_H 1
+
+/* Pick up most of what we need from the generic i386 target include file. */
+
+#include "i386/tm-i386.h"
+
+/* Pick up more stuff from the generic SYSV and SVR4 host include files. */
+#include "i386/tm-i386v.h"
+#include "tm-sysv4.h"
+
+#define KERNEL_U_SIZE kernel_u_size()
+
+/*
+ * SCO is unlike other SVR3 targets in that it has SVR4 style shared
+ * libs, with a slight twist. We expect 3 traps (2 for the exec and
+ * one for the dynamic loader). After the third trap we insert the
+ * SOLIB breakpoints, then wait for the 4th trap.
+ */
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 3
+
+/* We can also do hardware watchpoints */
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* After a watchpoint trap, the PC points to the instruction which
+ caused the trap. But we can continue over it without disabling the
+ trap. */
+#define HAVE_CONTINUABLE_WATCHPOINT
+#define HAVE_STEPPABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ i386_stopped_by_watchpoint (inferior_pid)
+
+#define target_insert_watchpoint(addr, len, type) \
+ i386_insert_watchpoint (inferior_pid, addr, len, type)
+
+#define target_remove_watchpoint(addr, len, type) \
+ i386_remove_watchpoint (inferior_pid, addr, len)
+
+#endif /* ifndef TM_I386SCO5_H */
diff --git a/gdb/config/i386/tm-i386sol2.h b/gdb/config/i386/tm-i386sol2.h
new file mode 100644
index 0000000..dbd6317
--- /dev/null
+++ b/gdb/config/i386/tm-i386sol2.h
@@ -0,0 +1,64 @@
+/* Macro definitions for GDB on an Intel i386 running Solaris 2.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386SOL2_H
+#define TM_I386SOL2_H 1
+
+#include "i386/tm-i386v4.h"
+
+/* Signal handler frames under Solaris 2 are recognized by a return address
+ of 0xFFFFFFFF, the third parameter on the signal handler stack is
+ a pointer to an ucontext. */
+#undef sigtramp_saved_pc
+#undef I386V4_SIGTRAMP_SAVED_PC
+#define SIGCONTEXT_PC_OFFSET (36 + 14 * 4)
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) (pc == 0xFFFFFFFF)
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+ and for SunPRO 3.0, N_FUN symbols too. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '.')
+
+#define FAULTED_USE_SIGINFO
+
+/* Macros to extract process id and thread id from a composite pid/tid */
+#define PIDGET(pid) ((pid) & 0xffff)
+#define TIDGET(pid) (((pid) >> 16) & 0xffff)
+
+/* Macro to extract carry from given regset. */
+#define PS_FLAG_CARRY 0x1 /* Carry bit in PS */
+#define PROCFS_GET_CARRY(regset) ((regset)[EFL] & PS_FLAG_CARRY)
+
+#ifdef HAVE_THREAD_DB_LIB
+
+extern char *solaris_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) solaris_pid_to_str (PID)
+
+#else
+
+extern char *procfs_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) procfs_pid_to_str (PID)
+
+#endif
+
+#endif /* ifndef TM_I386SOL2_H */
diff --git a/gdb/config/i386/tm-i386v.h b/gdb/config/i386/tm-i386v.h
new file mode 100644
index 0000000..bb31cb0
--- /dev/null
+++ b/gdb/config/i386/tm-i386v.h
@@ -0,0 +1,163 @@
+/* Macro definitions for i386, Unix System V.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386V_H
+#define TM_I386V_H 1
+
+/* First pick up the generic *86 target file. */
+
+#include "i386/tm-i386.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+ inferior, and when we finally get to the inferior code. This is
+ 2 on most implementations. Override here to 4. */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 4
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS 16
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+/* the order of the first 8 registers must match the compiler's
+ * numbering scheme (which is the same as the 386 scheme)
+ * also, this table must match regmap in i386-pinsn.c.
+ */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+ "esp", "ebp", "esi", "edi", \
+ "eip", "ps", "cs", "ss", \
+ "ds", "es", "fs", "gs", \
+ }
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) (4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#undef REGISTER_VIRTUAL_SIZE
+#define REGISTER_VIRTUAL_SIZE(N) (4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#undef MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#undef MAX_REGISTER_VIRTUAL_SIZE
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+/* Perhaps si and di should go here, but potentially they could be
+ used for things other than address. */
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM ? \
+ lookup_pointer_type (builtin_type_void) : builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#undef STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { char buf[REGISTER_SIZE]; \
+ (SP) -= sizeof (ADDR); \
+ store_address (buf, sizeof (ADDR), ADDR); \
+ write_memory ((SP), buf, sizeof (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy ((VALBUF), (REGBUF), TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#undef FRAMELESS_FUNCTION_INVOCATION
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(FRAME) (read_memory_integer ((FRAME)->frame + 4, 4))
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#undef FRAME_NUM_ARGS
+#define FRAME_NUM_ARGS(numargs, fi) (numargs) = -1
+
+#ifdef __STDC__ /* Forward decl's for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+#endif
+
+extern int
+i386_frame_num_args PARAMS ((struct frame_info *));
+
+#endif /* ifndef TM_I386V_H */
diff --git a/gdb/config/i386/tm-i386v4.h b/gdb/config/i386/tm-i386v4.h
new file mode 100644
index 0000000..eafff01
--- /dev/null
+++ b/gdb/config/i386/tm-i386v4.h
@@ -0,0 +1,78 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.
+ Copyright (C) 1991, 1994 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386V4_H
+#define TM_I386V4_H 1
+
+/* Pick up most of what we need from the generic i386 target include file. */
+
+#include "i386/tm-i386.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "tm-sysv4.h"
+
+/* Use the alternate method of determining valid frame chains. */
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+/* Offsets (in target ints) into jmp_buf. Not defined in any system header
+ file, so we have to step through setjmp/longjmp with a debugger and figure
+ them out. Note that <setjmp> defines _JBLEN as 10, which is the default
+ if no specific machine is selected, even though we only use 6 slots. */
+
+#define JB_ELEMENT_SIZE sizeof(int) /* jmp_buf[_JBLEN] is array of ints */
+
+#define JB_EBX 0
+#define JB_ESI 1
+#define JB_EDI 2
+#define JB_EBP 3
+#define JB_ESP 4
+#define JB_EDX 5
+
+#define JB_PC JB_EDX /* Setjmp()'s return PC saved in EDX */
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+/* The following redefines make backtracing through sigtramp work.
+ They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+ from the ucontext structure which is pushed by the kernel on the
+ user stack. Unfortunately there are three variants of sigtramp handlers. */
+
+#define I386V4_SIGTRAMP_SAVED_PC
+#define IN_SIGTRAMP(pc, name) ((name) \
+ && (STREQ ("_sigreturn", name) \
+ || STREQ ("_sigacthandler", name) \
+ || STREQ ("sigvechandler", name)))
+
+/* Saved Pc. Get it from ucontext if within sigtramp. */
+
+#define sigtramp_saved_pc i386v4_sigtramp_saved_pc
+extern CORE_ADDR i386v4_sigtramp_saved_pc PARAMS ((struct frame_info *));
+
+#endif /* ifndef TM_I386V4_H */
diff --git a/gdb/config/i386/tm-i386v42mp.h b/gdb/config/i386/tm-i386v42mp.h
new file mode 100644
index 0000000..81df85b
--- /dev/null
+++ b/gdb/config/i386/tm-i386v42mp.h
@@ -0,0 +1,44 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.2MP
+ Copyright (C) 1991, 1994 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_I386V42MP_H
+#define TM_I386V42MP_H 1
+
+/* pick up more generic x86 sysv4 stuff */
+
+#include "i386/tm-i386v4.h"
+
+/* procfs on this architecture has multiple fds (ctl, as, map, status)
+ including a control fd */
+
+#ifndef HAVE_MULTIPLE_PROC_FDS
+#define HAVE_MULTIPLE_PROC_FDS
+#endif
+
+/* procfs on this architecture communicates with read/write instead
+ of ioctl */
+
+#define PROCFS_USE_READ_WRITE
+
+/* define to select for other sysv4.2mp weirdness */
+
+#define UNIXWARE
+
+#endif /* ifndef TM_I386V42MP_H */
diff --git a/gdb/config/i386/tm-linux.h b/gdb/config/i386/tm-linux.h
new file mode 100644
index 0000000..417d151
--- /dev/null
+++ b/gdb/config/i386/tm-linux.h
@@ -0,0 +1,38 @@
+/* Definitions to target GDB to GNU/Linux on 386.
+ Copyright 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_LINUX_H
+#define TM_LINUX_H
+
+/* FIXME: If nothing else gets added to this file, it could be removed
+ and configure could just use tm-i386.h instead. -fnf */
+
+#include "i386/tm-i386.h"
+
+/* Offset to saved PC in sigcontext, from <linux/signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 38
+
+/* We need this file for the SOLIB_TRAMPOLINE stuff. */
+
+#include "tm-sysv4.h"
+
+/* The following works around a problem with /usr/include/sys/procfs.h */
+#define sys_quotactl 1
+
+#endif /* #ifndef TM_LINUX_H */
diff --git a/gdb/config/i386/tm-nbsd.h b/gdb/config/i386/tm-nbsd.h
new file mode 100644
index 0000000..cf5159f
--- /dev/null
+++ b/gdb/config/i386/tm-nbsd.h
@@ -0,0 +1,42 @@
+/* Macro definitions for i386 running under NetBSD.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "i386/tm-i386bsd.h"
+#include "tm-nbsd.h"
+
+#undef NUM_REGS
+#define NUM_REGS 16
+
+#define JB_ELEMENT_SIZE sizeof(int) /* jmp_buf[_JBLEN] is array of ints */
+#define JB_PC 0 /* Setjmp()'s return PC saved here */
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/i386/tm-ptx.h b/gdb/config/i386/tm-ptx.h
new file mode 100644
index 0000000..c9f67d7
--- /dev/null
+++ b/gdb/config/i386/tm-ptx.h
@@ -0,0 +1,232 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under ptx
+ with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PTX_H
+#define TM_PTX_H 1
+
+/* I don't know if this will work for cross-debugging, even if you do get
+ a copy of the right include file. */
+
+#include <sys/reg.h>
+
+#ifdef SEQUENT_PTX4
+#include "i386/tm-i386v4.h"
+#else /* !SEQUENT_PTX4 */
+#include "i386/tm-i386v.h"
+#endif
+
+/* Number of traps that happen between exec'ing the shell to run an
+ inferior, and when we finally get to the inferior code. This is 2
+ on most implementations. Here we have to undo what tm-i386v.h gave
+ us and restore the default. */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Amount PC must be decremented by after a breakpoint. This is often the
+ number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+#if 0
+ --- this code can't be used unless we know we are running native,
+ since it uses host specific ptrace calls.
+/* code for 80387 fpu. Functions are from i386-dep.c, copied into
+ * symm-dep.c.
+ */
+#define FLOAT_INFO { i386_float_info(); }
+#endif
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS 49
+
+/* Initializer for an array of names of registers. There should be at least
+ NUM_REGS strings in this initializer. Any excess ones are simply ignored.
+ The order of the first 8 registers must match the compiler's numbering
+ scheme (which is the same as the 386 scheme) and also regmap in the various
+ *-nat.c files. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+ "esp", "ebp", "esi", "edi", \
+ "eip", "eflags", "st0", "st1", \
+ "st2", "st3", "st4", "st5", \
+ "st6", "st7", "fp1", "fp2", \
+ "fp3", "fp4", "fp5", "fp6", \
+ "fp7", "fp8", "fp9", "fp10", \
+ "fp11", "fp12", "fp13", "fp14", \
+ "fp15", "fp16", "fp17", "fp18", \
+ "fp19", "fp20", "fp21", "fp22", \
+ "fp23", "fp24", "fp25", "fp26", \
+ "fp27", "fp28", "fp29", "fp30", \
+ "fp31" }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define EAX_REGNUM 0
+#define ECX_REGNUM 1
+#define EDX_REGNUM 2
+#define EBX_REGNUM 3
+
+#define ESP_REGNUM 4
+#define EBP_REGNUM 5
+
+#define ESI_REGNUM 6
+#define EDI_REGNUM 7
+
+#define EIP_REGNUM 8
+#define EFLAGS_REGNUM 9
+
+#define ST0_REGNUM 10
+#define ST1_REGNUM 11
+#define ST2_REGNUM 12
+#define ST3_REGNUM 13
+
+#define ST4_REGNUM 14
+#define ST5_REGNUM 15
+#define ST6_REGNUM 16
+#define ST7_REGNUM 17
+
+#define FP1_REGNUM 18 /* first 1167 register */
+/* Get %fp2 - %fp31 by addition, since they are contiguous */
+
+#undef SP_REGNUM
+#define SP_REGNUM ESP_REGNUM /* Contains address of top of stack */
+#undef FP_REGNUM
+#define FP_REGNUM EBP_REGNUM /* Contains address of executing stack frame */
+#undef PC_REGNUM
+#define PC_REGNUM EIP_REGNUM /* Contains program counter */
+#undef PS_REGNUM
+#define PS_REGNUM EFLAGS_REGNUM /* Contains processor status */
+
+/*
+ * For ptx, this is a little bit bizarre, since the register block
+ * is below the u area in memory. This means that blockend here ends
+ * up being negative (for the call from coredep.c) since the value in
+ * u.u_ar0 will be less than KERNEL_U_ADDR (and coredep.c passes us
+ * u.u_ar0 - KERNEL_U_ADDR in blockend). Since we also define
+ * FETCH_INFERIOR_REGISTERS (and supply our own functions for that),
+ * the core file case will be the only use of this function.
+ */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ (addr) = ptx_register_u_addr((blockend), (regno)); }
+
+extern int
+ptx_register_u_addr PARAMS ((int, int));
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. 10 i*86 registers, 8 i387
+ registers, and 31 Weitek 1167 registers */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES ((10 * 4) + (8 * 10) + (31 * 4))
+
+/* Index within `registers' of the first byte of the space for register N. */
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+(((N) < ST0_REGNUM) ? ((N) * 4) : \
+ ((N) < FP1_REGNUM) ? (40 + (((N) - ST0_REGNUM) * 10)) : \
+ (40 + 80 + (((N) - FP1_REGNUM) * 4)))
+
+/* Number of bytes of storage in the actual machine representation for
+ register N. All registers are 4 bytes, except 387 st(0) - st(7),
+ which are 80 bits each. */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+(((N) < ST0_REGNUM) ? 4 : \
+ ((N) < FP1_REGNUM) ? 10 : \
+ 4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#undef MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#undef REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) \
+((N < ST0_REGNUM) ? 0 : \
+ (N < FP1_REGNUM) ? 1 : \
+ 0)
+
+/* Convert data from raw format for register REGNUM
+ to virtual format for register REGNUM. */
+extern const struct floatformat floatformat_i387_ext; /* from floatformat.h */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+((REGNUM < ST0_REGNUM) ? (void)memcpy ((TO), (FROM), 4) : \
+ (REGNUM < FP1_REGNUM) ? (void)floatformat_to_double(&floatformat_i387_ext, \
+ (FROM),(TO)) : \
+ (void)memcpy ((TO), (FROM), 4))
+
+/* Convert data from virtual format for register REGNUM
+ to raw format for register REGNUM. */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+((REGNUM < ST0_REGNUM) ? (void)memcpy ((TO), (FROM), 4) : \
+ (REGNUM < FP1_REGNUM) ? (void)floatformat_from_double(&floatformat_i387_ext, \
+ (FROM),(TO)) : \
+ (void)memcpy ((TO), (FROM), 4))
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+/*
+ * Note: the 1167 registers (the last line, builtin_type_float) are
+ * generally used in pairs, with each pair being treated as a double.
+ * It it also possible to use them singly as floats. I'm not sure how
+ * in gdb to treat the register pair pseudo-doubles. -fubar
+ */
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+((N < ST0_REGNUM) ? builtin_type_int : \
+ (N < FP1_REGNUM) ? builtin_type_double : \
+ builtin_type_float)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ symmetry_extract_return_value(TYPE, REGBUF, VALBUF)
+
+/*
+#undef FRAME_FIND_SAVED_REGS
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ ptx_frame_find_saved_regs((frame_info), &(frame_saved_regs)); }
+*/
+
+#endif /* ifndef TM_PTX_H */
diff --git a/gdb/config/i386/tm-ptx4.h b/gdb/config/i386/tm-ptx4.h
new file mode 100644
index 0000000..a576acc
--- /dev/null
+++ b/gdb/config/i386/tm-ptx4.h
@@ -0,0 +1,24 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under ptx
+ with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define SEQUENT_PTX4
+
+#include "tm-ptx.h"
diff --git a/gdb/config/i386/tm-sun386.h b/gdb/config/i386/tm-sun386.h
new file mode 100644
index 0000000..259fd51
--- /dev/null
+++ b/gdb/config/i386/tm-sun386.h
@@ -0,0 +1,205 @@
+/* Parameters for a Sun 386i target machine, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (TM_SUN386_H)
+#define TM_SUN386_H 1
+
+#include "i386/tm-i386.h"
+
+#ifndef sun386
+#define sun386
+#endif
+#define GDB_TARGET_IS_SUN386 1
+#define SUNOS4
+#define USE_MACHINE_REG_H
+
+/* Perhaps some day this will work even without the following #define */
+#define COFF_ENCAPSULATE
+
+#ifdef COFF_ENCAPSULATE
+/* Avoid conflicts between our include files and <sys/exec.h>
+ (maybe not needed anymore). */
+#define _EXEC_
+#endif
+
+/* sun386 ptrace seems unable to change the frame pointer */
+#define PTRACE_FP_BUG
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR 0xfc000000
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS 35
+
+/* Initializer for an array of names of registers. There should be NUM_REGS
+ strings in this initializer. The order of the first 8 registers must match
+ the compiler's numbering scheme (which is the same as the 386 scheme) also,
+ this table must match regmap in i386-pinsn.c. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { "gs", "fs", "es", "ds", \
+ "edi", "esi", "ebp", "esp", \
+ "ebx", "edx", "ecx", "eax", \
+ "retaddr", "trapnum", "errcode", "ip", \
+ "cs", "ps", "sp", "ss", \
+ "fst0", "fst1", "fst2", "fst3", \
+ "fst4", "fst5", "fst6", "fst7", \
+ "fctrl", "fstat", "ftag", "fip", \
+ "fcs", "fopoff", "fopsel" \
+ }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#undef FP_REGNUM
+#define FP_REGNUM 6 /* (ebp) Contains address of executing stack frame */
+#undef SP_REGNUM
+#define SP_REGNUM 18 /* (usp) Contains address of top of stack */
+#undef PS_REGNUM
+#define PS_REGNUM 17 /* (ps) Contains processor status */
+#undef PC_REGNUM
+#define PC_REGNUM 15 /* (eip) Contains program counter */
+#undef FP0_REGNUM
+#define FP0_REGNUM 20 /* Floating point register 0 */
+#undef FPC_REGNUM
+#define FPC_REGNUM 28 /* 80387 control register */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (20*4+8*10+7*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+ ((N) >= FPC_REGNUM ? (((N) - FPC_REGNUM) * 4) + 160 \
+ : (N) >= FP0_REGNUM ? (((N) - FP0_REGNUM) * 10) + 80 \
+ : (N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) (((unsigned)((N) - FP0_REGNUM)) < 8 ? 10 : 4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#undef REGISTER_VIRTUAL_SIZE
+#define REGISTER_VIRTUAL_SIZE(N) (((unsigned)((N) - FP0_REGNUM)) < 8 ? 8 : 4)
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#undef REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) (((unsigned)((N) - FP0_REGNUM)) < 8)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ i387_to_double ((FROM), (char *)&val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+extern void
+i387_to_double PARAMS ((char *, char *));
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ double_to_i387((char *)&val, (TO)); \
+}
+extern void
+double_to_i387 PARAMS ((char *, char *));
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((unsigned)((N) - FP0_REGNUM)) < 8 ? builtin_type_double : builtin_type_int)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 11), TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 11), VALBUF, TYPE_LENGTH (TYPE))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#undef FRAMELESS_FUNCTION_INVOCATION
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+{ (FRAMELESS) = frameless_look_for_prologue (FI); }
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(FRAME) (read_memory_integer ((FRAME)->frame + 4, 4))
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#undef FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ *(int *)((char *)(dummyname) + 1) = (int)(fun) - (pc) - 5; \
+}
+
+#endif /* !defined (TM_SUN386_H) */
+
diff --git a/gdb/config/i386/tm-symmetry.h b/gdb/config/i386/tm-symmetry.h
new file mode 100644
index 0000000..11931d4
--- /dev/null
+++ b/gdb/config/i386/tm-symmetry.h
@@ -0,0 +1,321 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under dynix 3.0,
+ with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
+ Free Software Foundation, Inc.
+ Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_SYMMETRY_H
+#define TM_SYMMETRY_H 1
+
+/* I don't know if this will work for cross-debugging, even if you do get
+ a copy of the right include file. */
+#include <machine/reg.h>
+
+#include "i386/tm-i386v.h"
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Amount PC must be decremented by after a breakpoint. This is often the
+ number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+#if 0
+/* --- this code can't be used unless we know we are running native,
+ since it uses host specific ptrace calls. */
+/* code for 80387 fpu. Functions are from i386-dep.c, copied into
+ * symm-dep.c.
+ */
+#define FLOAT_INFO { i386_float_info(); }
+#endif
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS 49
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+/* Initializer for an array of names of registers. There should be at least
+ NUM_REGS strings in this initializer. Any excess ones are simply ignored.
+ Symmetry registers are in this weird order to match the register numbers
+ in the symbol table entries. If you change the order, things will probably
+ break mysteriously for no apparent reason. Also note that the st(0)...
+ st(7) 387 registers are represented as st0...st7. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { "eax", "edx", "ecx", "st0", "st1", \
+ "ebx", "esi", "edi", "st2", "st3", \
+ "st4", "st5", "st6", "st7", "esp", \
+ "ebp", "eip", "eflags","fp1", "fp2", \
+ "fp3", "fp4", "fp5", "fp6", "fp7", \
+ "fp8", "fp9", "fp10", "fp11", "fp12", \
+ "fp13", "fp14", "fp15", "fp16", "fp17", \
+ "fp18", "fp19", "fp20", "fp21", "fp22", \
+ "fp23", "fp24", "fp25", "fp26", "fp27", \
+ "fp28", "fp29", "fp30", "fp31" }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define EAX_REGNUM 0
+#define EDX_REGNUM 1
+#define ECX_REGNUM 2
+#define ST0_REGNUM 3
+#define ST1_REGNUM 4
+#define EBX_REGNUM 5
+#define ESI_REGNUM 6
+#define EDI_REGNUM 7
+#define ST2_REGNUM 8
+#define ST3_REGNUM 9
+
+#define ST4_REGNUM 10
+#define ST5_REGNUM 11
+#define ST6_REGNUM 12
+#define ST7_REGNUM 13
+
+#define FP1_REGNUM 18 /* first 1167 register */
+/* Get %fp2 - %fp31 by addition, since they are contiguous */
+
+#undef SP_REGNUM
+#define SP_REGNUM 14 /* (usp) Contains address of top of stack */
+#define ESP_REGNUM 14
+#undef FP_REGNUM
+#define FP_REGNUM 15 /* (ebp) Contains address of executing stack frame */
+#define EBP_REGNUM 15
+#undef PC_REGNUM
+#define PC_REGNUM 16 /* (eip) Contains program counter */
+#define EIP_REGNUM 16
+#undef PS_REGNUM
+#define PS_REGNUM 17 /* (ps) Contains processor status */
+#define EFLAGS_REGNUM 17
+
+/*
+ * Following macro translates i386 opcode register numbers to Symmetry
+ * register numbers. This is used by i386_frame_find_saved_regs.
+ *
+ * %eax %ecx %edx %ebx %esp %ebp %esi %edi
+ * i386 0 1 2 3 4 5 6 7
+ * Symmetry 0 2 1 5 14 15 6 7
+ *
+ */
+#define I386_REGNO_TO_SYMMETRY(n) \
+((n)==0?0 :(n)==1?2 :(n)==2?1 :(n)==3?5 :(n)==4?14 :(n)==5?15 :(n))
+
+/* The magic numbers below are offsets into u_ar0 in the user struct.
+ * They live in <machine/reg.h>. Gdb calls this macro with blockend
+ * holding u.u_ar0 - KERNEL_U_ADDR. Only the registers listed are
+ * saved in the u area (along with a few others that aren't useful
+ * here. See <machine/reg.h>).
+ */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ struct user foo; /* needed for finding fpu regs */ \
+switch (regno) { \
+ case 0: \
+ addr = blockend + EAX * sizeof(int); break; \
+ case 1: \
+ addr = blockend + EDX * sizeof(int); break; \
+ case 2: \
+ addr = blockend + ECX * sizeof(int); break; \
+ case 3: /* st(0) */ \
+ addr = ((int)&foo.u_fpusave.fpu_stack[0][0] - (int)&foo); \
+ break; \
+ case 4: /* st(1) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[1][0] - (int)&foo); \
+ break; \
+ case 5: \
+ addr = blockend + EBX * sizeof(int); break; \
+ case 6: \
+ addr = blockend + ESI * sizeof(int); break; \
+ case 7: \
+ addr = blockend + EDI * sizeof(int); break; \
+ case 8: /* st(2) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[2][0] - (int)&foo); \
+ break; \
+ case 9: /* st(3) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[3][0] - (int)&foo); \
+ break; \
+ case 10: /* st(4) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[4][0] - (int)&foo); \
+ break; \
+ case 11: /* st(5) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[5][0] - (int)&foo); \
+ break; \
+ case 12: /* st(6) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[6][0] - (int)&foo); \
+ break; \
+ case 13: /* st(7) */ \
+ addr = ((int) &foo.u_fpusave.fpu_stack[7][0] - (int)&foo); \
+ break; \
+ case 14: \
+ addr = blockend + ESP * sizeof(int); break; \
+ case 15: \
+ addr = blockend + EBP * sizeof(int); break; \
+ case 16: \
+ addr = blockend + EIP * sizeof(int); break; \
+ case 17: \
+ addr = blockend + FLAGS * sizeof(int); break; \
+ case 18: /* fp1 */ \
+ case 19: /* fp2 */ \
+ case 20: /* fp3 */ \
+ case 21: /* fp4 */ \
+ case 22: /* fp5 */ \
+ case 23: /* fp6 */ \
+ case 24: /* fp7 */ \
+ case 25: /* fp8 */ \
+ case 26: /* fp9 */ \
+ case 27: /* fp10 */ \
+ case 28: /* fp11 */ \
+ case 29: /* fp12 */ \
+ case 30: /* fp13 */ \
+ case 31: /* fp14 */ \
+ case 32: /* fp15 */ \
+ case 33: /* fp16 */ \
+ case 34: /* fp17 */ \
+ case 35: /* fp18 */ \
+ case 36: /* fp19 */ \
+ case 37: /* fp20 */ \
+ case 38: /* fp21 */ \
+ case 39: /* fp22 */ \
+ case 40: /* fp23 */ \
+ case 41: /* fp24 */ \
+ case 42: /* fp25 */ \
+ case 43: /* fp26 */ \
+ case 44: /* fp27 */ \
+ case 45: /* fp28 */ \
+ case 46: /* fp29 */ \
+ case 47: /* fp30 */ \
+ case 48: /* fp31 */ \
+ addr = ((int) &foo.u_fpasave.fpa_regs[(regno)-18] - (int)&foo); \
+ } \
+}
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. 10 i*86 registers, 8 i387
+ registers, and 31 Weitek 1167 registers */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES ((10 * 4) + (8 * 10) + (31 * 4))
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+(((N) < 3) ? ((N) * 4) : \
+((N) < 5) ? ((((N) - 2) * 10) + 2) : \
+((N) < 8) ? ((((N) - 5) * 4) + 32) : \
+((N) < 14) ? ((((N) - 8) * 10) + 44) : \
+ ((((N) - 14) * 4) + 104))
+
+/* Number of bytes of storage in the actual machine representation
+ * for register N. All registers are 4 bytes, except 387 st(0) - st(7),
+ * which are 80 bits each.
+ */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+(((N) < 3) ? 4 : \
+((N) < 5) ? 10 : \
+((N) < 8) ? 4 : \
+((N) < 14) ? 10 : \
+ 4)
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#undef REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) \
+(((N) < 3) ? 0 : \
+((N) < 5) ? 1 : \
+((N) < 8) ? 0 : \
+((N) < 14) ? 1 : \
+ 0)
+
+#include "floatformat.h"
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ floatformat_to_double (&floatformat_i387_ext, (FROM), &val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ floatformat_from_double (&floatformat_i387_ext, &val, (TO)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+((N < 3) ? builtin_type_int : \
+(N < 5) ? builtin_type_double : \
+(N < 8) ? builtin_type_int : \
+(N < 14) ? builtin_type_double : \
+ builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+ Native cc passes the address in eax, gcc (up to version 2.5.8)
+ passes it on the stack. gcc should be fixed in future versions to
+ adopt native cc conventions. */
+
+#undef STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) write_register(0, (ADDR))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ symmetry_extract_return_value(TYPE, REGBUF, VALBUF)
+
+/* The following redefines make backtracing through sigtramp work.
+ They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+ from the sigcontext structure which is pushed by the kernel on the
+ user stack, along with a pointer to it. */
+
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigcode", name))
+
+/* Offset to saved PC in sigcontext, from <signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 16
+
+#endif /* ifndef TM_SYMMETRY_H */
+
diff --git a/gdb/config/i386/xm-cygwin.h b/gdb/config/i386/xm-cygwin.h
new file mode 100644
index 0000000..f0b8227
--- /dev/null
+++ b/gdb/config/i386/xm-cygwin.h
@@ -0,0 +1,34 @@
+/* Definitions for hosting on WIN32, for GDB.
+ Copyright 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+#include "fopen-bin.h"
+
+#define GDBINIT_FILENAME "gdb.ini"
+
+#define SLASH_P(X) ((X)=='\\' || (X) == '/')
+#define ROOTED_P(X) ((SLASH_P((X)[0]))|| ((X)[1] ==':'))
+#define SLASH_CHAR '/'
+#define SLASH_STRING "/"
+
+/* Define this if source files use \r\n rather than just \n. */
+#define CRLF_SOURCE_FILES
+
+#define HAVE_SIGSETMASK 0
diff --git a/gdb/config/i386/xm-go32.h b/gdb/config/i386/xm-go32.h
new file mode 100644
index 0000000..0797833
--- /dev/null
+++ b/gdb/config/i386/xm-go32.h
@@ -0,0 +1,31 @@
+/* Definitions for hosting on GO32, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#include "fopen-bin.h"
+
+/* Define this lseek(n) != nth byte of file */
+#define LSEEK_NOT_LINEAR
+
+#define CANT_FORK
+
+#undef QUIT
+#define QUIT { pollquit(); }
+
+#define GDBINIT_FILENAME "gdb.ini"
diff --git a/gdb/config/i386/xm-i386aix.h b/gdb/config/i386/xm-i386aix.h
new file mode 100644
index 0000000..652a149
--- /dev/null
+++ b/gdb/config/i386/xm-i386aix.h
@@ -0,0 +1,33 @@
+/* Macro defintions for AIX PS/2 (i386)
+ Copyright 1986, 1987, 1989, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Changed for IBM AIX ps/2 by Minh Tran Le (tranle@intellicorp.com)
+ * Revision: 23-Oct-92 17:42:49
+ */
+
+#include "i386/xm-i386v.h"
+
+#undef HAVE_TERMIO
+#define HAVE_SGTTY
+
+#include <limits.h>
+
+/* Use setpgid instead of setpgrp on AIX */
+#define NEED_POSIX_SETPGID
diff --git a/gdb/config/i386/xm-i386bsd.h b/gdb/config/i386/xm-i386bsd.h
new file mode 100644
index 0000000..e5c4c89
--- /dev/null
+++ b/gdb/config/i386/xm-i386bsd.h
@@ -0,0 +1,22 @@
+/* Host-dependent definitions for Intel 386 running BSD Unix, for GDB.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+#include <machine/limits.h> /* for INT_MIN */
diff --git a/gdb/config/i386/xm-i386gnu.h b/gdb/config/i386/xm-i386gnu.h
new file mode 100644
index 0000000..60307b2
--- /dev/null
+++ b/gdb/config/i386/xm-i386gnu.h
@@ -0,0 +1,23 @@
+/* Definitions to make GDB run on the GNU Hurd on an Intel 386
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* Do implement the attach and detach commands. */
+#define ATTACH_DETACH 1
diff --git a/gdb/config/i386/xm-i386lynx.h b/gdb/config/i386/xm-i386lynx.h
new file mode 100644
index 0000000..6078cb6
--- /dev/null
+++ b/gdb/config/i386/xm-i386lynx.h
@@ -0,0 +1,24 @@
+/* Host-dependent definitions for Intel 386 running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* Get generic LynxOS host definitions. */
+
+#include "xm-lynx.h"
diff --git a/gdb/config/i386/xm-i386m3.h b/gdb/config/i386/xm-i386m3.h
new file mode 100644
index 0000000..b667409
--- /dev/null
+++ b/gdb/config/i386/xm-i386m3.h
@@ -0,0 +1,33 @@
+/* Definitions to make GDB run on Mach 3 on an Intel 386
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* Do implement the attach and detach commands. */
+#define ATTACH_DETACH 1
+
+/* Not needeed */
+#define KERNEL_U_ADDR 0
+
+#ifndef EMULATOR_BASE
+/* For EMULATOR_BASE and EMULATOR_END.
+ * OSF 1/MK has different values in some other place.
+ */
+#include <machine/vmparam.h>
+#endif /* EMULATOR_BASE */
diff --git a/gdb/config/i386/xm-i386mach.h b/gdb/config/i386/xm-i386mach.h
new file mode 100644
index 0000000..eb47bfb
--- /dev/null
+++ b/gdb/config/i386/xm-i386mach.h
@@ -0,0 +1,30 @@
+/* Definitions to make GDB run on Mach on an Intel 386
+ Copyright (C) 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))
+
+/* <errno.h> only defines this if __STDC__!!! */
+extern int errno;
+
+extern char *strdup();
diff --git a/gdb/config/i386/xm-i386mk.h b/gdb/config/i386/xm-i386mk.h
new file mode 100644
index 0000000..661c9cb
--- /dev/null
+++ b/gdb/config/i386/xm-i386mk.h
@@ -0,0 +1,25 @@
+/* Definitions to make GDB run on Mach 3 OSF 1/MK on an Intel 386
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HAVE_TERMIO 1
+
+#define EMULATOR_BASE 0xa0000000
+#define EMULATOR_END 0xa0040000
+
+#include "i386/xm-i386m3.h"
diff --git a/gdb/config/i386/xm-i386sco.h b/gdb/config/i386/xm-i386sco.h
new file mode 100644
index 0000000..31fa7e6
--- /dev/null
+++ b/gdb/config/i386/xm-i386sco.h
@@ -0,0 +1,42 @@
+/* Macro defintions for i386, running SCO Unix System V/386 3.2.
+ Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* In 3.2v4 <sys/user.h> requires on <sys/dir.h>. */
+#include <sys/types.h>
+#include <sys/dir.h>
+
+#include "i386/xm-i386v.h"
+
+/* Apparently there is inconsistency among various System V's about what
+ the name of this field is. */
+#define U_FPSTATE(u) u.u_fps.u_fpstate
+
+/* SCO 3.2v2 and later have job control. */
+/* SCO 3.2v4 I know has termios; I'm not sure about earlier versions.
+ GDB does not currently support the termio/job control combination. */
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* SCO's assembler doesn't grok dollar signs in identifiers.
+ So we use dots instead. This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Use setpgid instead of setpgrp on SCO */
+#define NEED_POSIX_SETPGID
diff --git a/gdb/config/i386/xm-i386v.h b/gdb/config/i386/xm-i386v.h
new file mode 100644
index 0000000..480dfd6
--- /dev/null
+++ b/gdb/config/i386/xm-i386v.h
@@ -0,0 +1,45 @@
+/* Host support for i386.
+ Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+ Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* I'm running gdb 3.4 under 386/ix 2.0.2, which is a derivative of AT&T's
+Sys V/386 3.2.
+
+On some machines, gdb crashes when it's starting up while calling the
+vendor's termio tgetent() routine. It always works when run under
+itself (actually, under 3.2, it's not an infinitely recursive bug.)
+After some poking around, it appears that depending on the environment
+size, or whether you're running YP, or the phase of the moon or something,
+the stack is not always long-aligned when main() is called, and tgetent()
+takes strong offense at that. On some machines this bug never appears, but
+on those where it does, it occurs quite reliably. */
+#define ALIGN_STACK_ON_STARTUP
+
+/* define USG if you are using sys5 /usr/include's */
+#define USG
+
+#define HAVE_TERMIO
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR 0xe0000000
+
diff --git a/gdb/config/i386/xm-i386v32.h b/gdb/config/i386/xm-i386v32.h
new file mode 100644
index 0000000..daaac80
--- /dev/null
+++ b/gdb/config/i386/xm-i386v32.h
@@ -0,0 +1,24 @@
+/* Macro defintions for i386, running System V 3.2.
+ Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "i386/xm-i386v.h"
+
+/* Apparently there is inconsistency among various System V's about what
+ the name of this field is. */
+#define U_FPSTATE(u) u.u_fps.u_fpstate
diff --git a/gdb/config/i386/xm-i386v4.h b/gdb/config/i386/xm-i386v4.h
new file mode 100644
index 0000000..7f782db
--- /dev/null
+++ b/gdb/config/i386/xm-i386v4.h
@@ -0,0 +1,27 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Pick up most of what we need from the generic i386 host include file. */
+
+#include "i386/xm-i386v.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/i386/xm-linux.h b/gdb/config/i386/xm-linux.h
new file mode 100644
index 0000000..217c6d4
--- /dev/null
+++ b/gdb/config/i386/xm-linux.h
@@ -0,0 +1,36 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+#define HAVE_TERMIOS
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+#define KERNEL_U_ADDR 0x0
+
+#define NEED_POSIX_SETPGID
+
+/* Need R_OK etc, but USG isn't defined. */
+#include <unistd.h>
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/i386/xm-nbsd.h b/gdb/config/i386/xm-nbsd.h
new file mode 100644
index 0000000..b5624ac
--- /dev/null
+++ b/gdb/config/i386/xm-nbsd.h
@@ -0,0 +1,21 @@
+/* Parameters for execution on a i386 running NetBSD, for GDB.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/i386/xm-ptx.h b/gdb/config/i386/xm-ptx.h
new file mode 100644
index 0000000..99b46cc
--- /dev/null
+++ b/gdb/config/i386/xm-ptx.h
@@ -0,0 +1,41 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx, with
+ Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1992, 1993, 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+#ifdef _SEQUENT_PTX4_
+#include "xm-sysv4.h"
+#endif /* _SEQUENT_PTX4_ */
+
+/* This machine doesn't have the siginterrupt call. */
+#define NO_SIGINTERRUPT
+
+#define HAVE_WAIT_STRUCT
+
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+#define USG
+
+#define NEED_POSIX_SETPGID
+
+#define USE_O_NOCTTY
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
diff --git a/gdb/config/i386/xm-ptx4.h b/gdb/config/i386/xm-ptx4.h
new file mode 100644
index 0000000..bdbdefd
--- /dev/null
+++ b/gdb/config/i386/xm-ptx4.h
@@ -0,0 +1,25 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx, with
+ Weitek 1167 and i387 support. Copyright 1986, 1987, 1989, 1992,
+ 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+#include "xm-sysv4.h"
+
+#include "xm-ptx.h"
diff --git a/gdb/config/i386/xm-sun386.h b/gdb/config/i386/xm-sun386.h
new file mode 100644
index 0000000..51c3b58
--- /dev/null
+++ b/gdb/config/i386/xm-sun386.h
@@ -0,0 +1,20 @@
+/* Host support for Sun 386i, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
diff --git a/gdb/config/i386/xm-symmetry.h b/gdb/config/i386/xm-symmetry.h
new file mode 100644
index 0000000..52e9a9a
--- /dev/null
+++ b/gdb/config/i386/xm-symmetry.h
@@ -0,0 +1,28 @@
+/* Definitions to make GDB run on a Sequent Symmetry under
+ dynix 3.1, with Weitek 1167 and i387 support.
+ Copyright 1986, 1987, 1989, 1992, 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+/* This machine doesn't have the siginterrupt call. */
+#define NO_SIGINTERRUPT
+
+#define HAVE_WAIT_STRUCT
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
diff --git a/gdb/config/i386/xm-windows.h b/gdb/config/i386/xm-windows.h
new file mode 100644
index 0000000..e083010
--- /dev/null
+++ b/gdb/config/i386/xm-windows.h
@@ -0,0 +1,35 @@
+/* Definitions for hosting on WIN32, built with Microsoft Visual C/C++, for GDB.
+ Copyright 1996, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "i386/xm-cygwin.h"
+
+#undef PRINTF_HAS_LONG_LONG
+#undef HAVE_UNISTD_H
+#undef HAVE_TERMIO_H
+#undef HAVE_TERMIOS_H
+#undef HAVE_SGTTY_H
+#undef HAVE_SBRK
+#define CANT_FORK
+
+#define MALLOC_INCOMPATIBLE
+
+#include <malloc.h>
+
+#define SIGQUIT 3
+#define SIGTRAP 5
diff --git a/gdb/config/i960/mon960.mt b/gdb/config/i960/mon960.mt
new file mode 100644
index 0000000..6cd7345
--- /dev/null
+++ b/gdb/config/i960/mon960.mt
@@ -0,0 +1,6 @@
+# Target: Intel 960 rom monitor
+TDEPFILES= i960-tdep.o monitor.o mon960-rom.o ttyflush.o xmodem.o dsrec.o
+TM_FILE= tm-mon960.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/i960/libsim.a
+
diff --git a/gdb/config/i960/nindy960.mt b/gdb/config/i960/nindy960.mt
new file mode 100644
index 0000000..f37c1da
--- /dev/null
+++ b/gdb/config/i960/nindy960.mt
@@ -0,0 +1,3 @@
+# Target: Intel 80960, in an embedded system under the NINDY monitor
+TDEPFILES= i960-tdep.o nindy-tdep.o remote-nindy.o nindy.o Onindy.o ttyflush.o
+TM_FILE= tm-nindy960.h
diff --git a/gdb/config/i960/tm-i960.h b/gdb/config/i960/tm-i960.h
new file mode 100644
index 0000000..a6d93b0
--- /dev/null
+++ b/gdb/config/i960/tm-i960.h
@@ -0,0 +1,372 @@
+/* Parameters for target machine Intel 960, for GDB, the GNU debugger.
+ Copyright (C) 1990, 1991, 1993 Free Software Foundation, Inc.
+ Contributed by Intel Corporation.
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Definitions to target GDB to any i960. */
+
+#ifndef I80960
+#define I80960
+#endif
+
+/* Hook for the SYMBOL_CLASS of a parameter when decoding DBX symbol
+ information. In the i960, parameters can be stored as locals or as
+ args, depending on the type of the debug record.
+
+ From empirical observation, gcc960 uses N_LSYM to indicate
+ arguments passed in registers and then copied immediately
+ to the frame, and N_PSYM to indicate arguments passed in a
+ g14-relative argument block. */
+
+#define DBX_PARM_SYMBOL_CLASS(type) ((type == N_LSYM)? LOC_LOCAL_ARG: LOC_ARG)
+
+/* Byte order is configurable, but this machine runs little-endian. */
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* We have IEEE floating point, if we have any float at all. */
+
+#define IEEE_FLOAT
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance ip across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(ip) { ip = skip_prologue (ip); }
+extern CORE_ADDR skip_prologue ();
+
+/* Immediately after a function call, return the saved ip.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function
+ executes some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) (saved_pc_after_call (frame))
+extern CORE_ADDR saved_pc_after_call ();
+
+/* Stack grows upward */
+
+#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+#define NUM_REGS 40
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES { \
+ /* 0 */ "pfp", "sp", "rip", "r3", "r4", "r5", "r6", "r7", \
+ /* 8 */ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",\
+ /* 16 */ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ /* 24 */ "g8", "g9", "g10", "g11", "g12", "g13", "g14", "fp", \
+ /* 32 */ "pcw", "ac", "tc", "ip", "fp0", "fp1", "fp2", "fp3",\
+}
+
+/* Register numbers of various important registers (used to index
+ into arrays of register names and register values). */
+
+#define R0_REGNUM 0 /* First local register */
+#define SP_REGNUM 1 /* Contains address of top of stack */
+#define RIP_REGNUM 2 /* Return instruction pointer (local r2) */
+#define R15_REGNUM 15 /* Last local register */
+#define G0_REGNUM 16 /* First global register */
+#define G13_REGNUM 29 /* g13 - holds struct return address */
+#define G14_REGNUM 30 /* g14 - ptr to arg block / leafproc return address */
+#define FP_REGNUM 31 /* Contains address of executing stack frame */
+#define PCW_REGNUM 32 /* process control word */
+#define ACW_REGNUM 33 /* arithmetic control word */
+#define TCW_REGNUM 34 /* trace control word */
+#define IP_REGNUM 35 /* instruction pointer */
+#define FP0_REGNUM 36 /* First floating point register */
+
+/* Some registers have more than one name */
+
+#define PC_REGNUM IP_REGNUM /* GDB refers to ip as the Program Counter */
+#define PFP_REGNUM R0_REGNUM /* Previous frame pointer */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES ((36*4) + (4*10))
+
+/* Index within `registers' of the first byte of the space for register N. */
+
+#define REGISTER_BYTE(N) ( (N) < FP0_REGNUM ? \
+ (4*(N)) : ((10*(N)) - (6*FP0_REGNUM)) )
+
+/* The i960 has register windows, sort of. */
+
+#define HAVE_REGISTER_WINDOWS
+
+/* Is this register part of the register window system? A yes answer
+ implies that 1) The name of this register will not be the same in
+ other frames, and 2) This register is automatically "saved" upon
+ subroutine calls and thus there is no need to search more than one
+ stack frame for it.
+
+ On the i960, in fact, the name of this register in another frame is
+ "mud" -- there is no overlap between the windows. Each window is
+ simply saved into the stack (true for our purposes, after having been
+ flushed; normally they reside on-chip and are restored from on-chip
+ without ever going to memory). */
+
+#define REGISTER_IN_WINDOW_P(regnum) ((regnum) <= R15_REGNUM)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the i960, all regs are 4 bytes except for floating
+ point, which are 10. NINDY only sends us 8 byte values for these,
+ which is a pain, but VxWorks handles this correctly, so we must. */
+
+#define REGISTER_RAW_SIZE(N) ( (N) < FP0_REGNUM ? 4 : 10 )
+
+/* Number of bytes of storage in the program's representation for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) ( (N) < FP0_REGNUM ? 4 : 8 )
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Nonzero if register N requires conversion from raw format to virtual
+ format. */
+
+#define REGISTER_CONVERTIBLE(N) ((N) >= FP0_REGNUM)
+
+#include "floatformat.h"
+
+#define TARGET_LONG_DOUBLE_FORMAT &floatformat_i960_ext
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ DOUBLEST val; \
+ floatformat_to_doublest (&floatformat_i960_ext, (FROM), &val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ DOUBLEST val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ floatformat_from_doublest (&floatformat_i960_ext, &val, (TO)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) ((N) < FP0_REGNUM ? \
+ builtin_type_int : builtin_type_double)
+
+/* Macros for understanding function return values... */
+
+/* Does the specified function use the "struct returning" convention
+ or the "value returning" convention? The "value returning" convention
+ almost invariably returns the entire value in registers. The
+ "struct returning" convention often returns the entire value in
+ memory, and passes a pointer (out of or into the function) saying
+ where the value (is or should go).
+
+ Since this sometimes depends on whether it was compiled with GCC,
+ this is also an argument. This is used in call_function to build a
+ stack, and in value_being_returned to print return values.
+
+ On i960, a structure is returned in registers g0-g3, if it will fit.
+ If it's more than 16 bytes long, g13 pointed to it on entry. */
+
+extern use_struct_convention_fn i960_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) i960_use_struct_convention (gcc_p, type)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. This is only called if USE_STRUCT_CONVENTION for this
+ type is 0.
+
+ On the i960 we just take as many bytes as we need from G0 through G3. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy(VALBUF, REGBUF+REGISTER_BYTE(G0_REGNUM), TYPE_LENGTH (TYPE))
+
+/* If USE_STRUCT_CONVENTION produces a 1,
+ extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one).
+
+ Address of where to put structure was passed in in global
+ register g13 on entry. God knows what's in g13 now. The
+ (..., 0) below is to make it appear to return a value, though
+ actually all it does is call error(). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (error("Don't know where large structure is returned on i960"), 0)
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format, for "value returning" functions.
+
+ For 'return' command: not (yet) implemented for i960. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ error ("Returning values from functions is not implemented in i960 gdb")
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ error ("Returning values from functions is not implemented in i960 gdb")
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+
+/* We cache information about saved registers in the frame structure,
+ to save us from having to re-scan function prologues every time
+ a register in a non-current frame is accessed. */
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs *fsr; \
+ CORE_ADDR arg_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+ so that FRAME_FIND_SAVED_REGS () will know to allocate and
+ initialize a frame_saved_regs struct the first time it is called.
+ Set the arg_pointer to -1, which is not valid; 0 and other values
+ indicate real, cached values. */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ ((fi)->fsr = 0, (fi)->arg_pointer = -1)
+
+/* On the i960, we get the chain pointer by reading the PFP saved
+ on the stack and clearing the status bits. */
+
+#define FRAME_CHAIN(thisframe) \
+ (read_memory_integer (FRAME_FP(thisframe), 4) & ~0xf)
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+ and has no caller.
+
+ On the i960, each various target system type must define FRAME_CHAIN_VALID,
+ since it differs between NINDY and VxWorks, the two currently supported
+ targets types. We leave it undefined here. */
+
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ { (FRAMELESS) = (leafproc_return ((FI)->pc) != 0); }
+
+/* Note that in the i960 architecture the return pointer is saved in the
+ *caller's* stack frame.
+
+ Make sure to zero low-order bits because of bug in 960CA A-step part
+ (instruction addresses should always be word-aligned anyway). */
+
+#define FRAME_SAVED_PC(frame) \
+ ((read_memory_integer(FRAME_CHAIN(frame)+8,4)) & ~3)
+
+/* On the i960, FRAME_ARGS_ADDRESS should return the value of
+ g14 as passed into the frame, if known. We need a function for this.
+ We cache this value in the frame info if we've already looked it up. */
+
+#define FRAME_ARGS_ADDRESS(fi) \
+ (((fi)->arg_pointer != -1)? (fi)->arg_pointer: frame_args_address (fi, 0))
+extern CORE_ADDR frame_args_address (); /* i960-tdep.c */
+
+/* This is the same except it should return 0 when
+ it does not really know where the args are, rather than guessing.
+ This value is not cached since it is only used infrequently. */
+
+#define FRAME_ARGS_ADDRESS_CORRECT(fi) (frame_args_address (fi, 1))
+
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Set NUMARGS to the number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) (numargs = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Produce the positions of the saved registers in a stack frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info_addr, sr) \
+ frame_find_saved_regs (frame_info_addr, &sr)
+extern void frame_find_saved_regs(); /* See i960-tdep.c */
+
+/* Things needed for making calls to functions in the inferior process */
+
+/* Push an empty stack frame, to record the current ip, etc.
+
+ Not (yet?) implemented for i960. */
+
+#define PUSH_DUMMY_FRAME \
+error("Function calls into the inferior process are not supported on the i960")
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+ pop_frame ()
+
+
+/* This sequence of words is the instructions
+
+ callx 0x00000000
+ fmark
+ */
+
+/* #define CALL_DUMMY { 0x86003000, 0x00000000, 0x66003e00 } */
+
+/* #define CALL_DUMMY_START_OFFSET 0 *//* Start execution at beginning of dummy */
+
+/* Indicate that we don't support calling inferior child functions. */
+
+#undef CALL_DUMMY
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at 'dummyname'.
+
+ Ignore arg count on i960. */
+
+/* #define FIX_CALL_DUMMY(dummyname, fun, nargs) *(((int *)dummyname)+1) = fun */
+
+#undef FIX_CALL_DUMMY
+
+
+/* Interface definitions for kernel debugger KDB */
+/* (Not relevant to i960.) */
diff --git a/gdb/config/i960/tm-mon960.h b/gdb/config/i960/tm-mon960.h
new file mode 100644
index 0000000..e441e05
--- /dev/null
+++ b/gdb/config/i960/tm-mon960.h
@@ -0,0 +1,70 @@
+/* Parameters for Intel 960 running MON960 monitor, for GDB, the GNU debugger.
+ Copyright (C) 1990-1991 Free Software Foundation, Inc.
+ Contributed by Intel Corporation and Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*****************************************************************************
+ * Definitions to target GDB to an i960 debugged over a serial line.
+ ******************************************************************************/
+
+#include "i960/tm-i960.h"
+
+/* forward declarations */
+#ifdef __STDC__
+struct frame_info;
+#endif
+
+/* redefined from tm-i960.h */
+/* Number of machine registers */
+#undef NUM_REGS
+#define NUM_REGS 40
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { \
+ /* 0 */ "pfp", "sp", "rip", "r3", "r4", "r5", "r6", "r7", \
+ /* 8 */ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",\
+ /* 16 */ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ /* 24 */ "g8", "g9", "g10", "g11", "g12", "g13", "g14", "fp", \
+ /* 32 */ "pc", "ac", "tc", "ip", "fp0", "fp1", "fp2", "fp3",\
+}
+
+/* Override the standard gdb prompt when compiled for this target. */
+
+#define DEFAULT_PROMPT "(gdb960) "
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+ and has no caller.
+
+ On the i960, each various target system type defines FRAME_CHAIN_VALID,
+ since it differs between Nindy, Mon960 and VxWorks, the currently supported
+ target types. */
+
+extern int mon960_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) mon960_frame_chain_valid (chain, thisframe)
+
+/* Sequence of bytes for breakpoint instruction */
+
+#define BREAKPOINT {0x00, 0x3e, 0x00, 0x66}
+
+/* Amount ip must be decremented by after a breakpoint.
+ * This is often the number of bytes in BREAKPOINT but not always.
+ */
+
+#define DECR_PC_AFTER_BREAK 4
diff --git a/gdb/config/i960/tm-nindy960.h b/gdb/config/i960/tm-nindy960.h
new file mode 100644
index 0000000..d0c46c0
--- /dev/null
+++ b/gdb/config/i960/tm-nindy960.h
@@ -0,0 +1,106 @@
+/* Parameters for Intel 960 running NINDY monitor, for GDB, the GNU debugger.
+ Copyright (C) 1990-1991 Free Software Foundation, Inc.
+ Contributed by Intel Corporation and Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*****************************************************************************
+ * Definitions to target GDB to an i960 debugged over a serial line.
+ ******************************************************************************/
+
+#include "i960/tm-i960.h"
+
+/* forward declarations */
+#ifdef __STDC__
+struct frame_info;
+#endif
+
+/* Override the standard gdb prompt when compiled for this target. */
+
+#define DEFAULT_PROMPT "(gdb960) "
+
+/* Additional command line options accepted by nindy gdb's, for handling
+ the remote-nindy.c interface. These should really be target-specific
+ rather than architecture-specific. */
+
+extern int nindy_old_protocol; /* nonzero if old NINDY serial protocol */
+extern int nindy_initial_brk; /* Send a BREAK to reset board first */
+extern char *nindy_ttyname; /* Name of serial port to talk to nindy */
+
+#define ADDITIONAL_OPTIONS \
+ {"O", no_argument, &nindy_old_protocol, 1}, \
+ {"brk", no_argument, &nindy_initial_brk, 1}, \
+ {"ser", required_argument, 0, 1004}, /* 1004 is magic cookie for ADDL_CASES */
+
+#define ADDITIONAL_OPTION_CASES \
+ case 1004: /* -ser option: remote nindy auto-start */ \
+ nindy_ttyname = optarg; \
+ break;
+
+#define ADDITIONAL_OPTION_HELP \
+ "\
+ -O Use old protocol to talk to a Nindy target\n\
+ -brk Send a break to a Nindy target to reset it.\n\
+ -ser SERIAL Open remote Nindy session to SERIAL port.\n\
+"
+
+/* If specified on the command line, open tty for talking to nindy,
+ and download the executable file if one was specified. */
+
+#define ADDITIONAL_OPTION_HANDLER \
+ if (!SET_TOP_LEVEL () && nindy_ttyname) { \
+ nindy_open (nindy_ttyname, !batch); \
+ if (!SET_TOP_LEVEL () && execarg) { \
+ target_load (execarg, !batch); \
+ } \
+ }
+
+/* If configured for i960 target, we take control before main loop
+ and demand that we configure for a nindy target. */
+
+#define BEFORE_MAIN_LOOP_HOOK \
+ nindy_before_main_loop();
+
+extern void
+nindy_before_main_loop(); /* In remote-nindy.c */
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+ and has no caller.
+
+ On the i960, each various target system type defines FRAME_CHAIN_VALID,
+ since it differs between NINDY and VxWorks, the two currently supported
+ targets types. */
+
+extern int nindy_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) nindy_frame_chain_valid (chain, thisframe)
+
+extern int
+nindy_frame_chain_valid(); /* See nindy-tdep.c */
+
+/* Sequence of bytes for breakpoint instruction */
+
+#define BREAKPOINT {0x00, 0x3e, 0x00, 0x66}
+
+/* Amount ip must be decremented by after a breakpoint.
+ * This is often the number of bytes in BREAKPOINT but not always.
+ */
+
+#define DECR_PC_AFTER_BREAK 0
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#undef REGISTER_CONVERT_TO_RAW
+#undef REGISTER_CONVERTIBLE
diff --git a/gdb/config/i960/tm-vx960.h b/gdb/config/i960/tm-vx960.h
new file mode 100644
index 0000000..17e2811
--- /dev/null
+++ b/gdb/config/i960/tm-vx960.h
@@ -0,0 +1,53 @@
+/* Parameters for VxWorks Intel 960's, for GDB, the GNU debugger.
+ Copyright (C) 1986-1991 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "i960/tm-i960.h"
+
+/* Under VxWorks the IP isn't filled in. Skip it, go with RIP, which has
+ the real value. */
+#undef PC_REGNUM
+#define PC_REGNUM RIP_REGNUM
+
+#define GDBINIT_FILENAME ".vxgdbinit"
+
+#define DEFAULT_PROMPT "(vxgdb) "
+
+/* We have more complex, useful breakpoints on the target.
+ Amount ip must be decremented by after a breakpoint. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* Breakpoint patching is handled at the target end in VxWorks. */
+/* #define BREAKPOINT {0x00, 0x3e, 0x00, 0x66} */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (16 + 16 + 3)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+ /* @@ Can't use this -- the rdb library for the 960 target
+ doesn't support setting or retrieving FP regs. KR */
+
+/* #define VX_SIZE_FPREGS (REGISTER_RAW_SIZE (FP0_REGNUM) * 4) */
diff --git a/gdb/config/i960/vxworks960.mt b/gdb/config/i960/vxworks960.mt
new file mode 100644
index 0000000..ad32934
--- /dev/null
+++ b/gdb/config/i960/vxworks960.mt
@@ -0,0 +1,6 @@
+# Target: VxWorks running on an Intel 960
+TDEPFILES= i960-tdep.o remote-vx.o remote-vx960.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vx960.h
+
+# Define this for the vx-share routines, which don't see param.h.
+MT_CFLAGS= -DI80960
diff --git a/gdb/config/m32r/m32r.mt b/gdb/config/m32r/m32r.mt
new file mode 100644
index 0000000..8b95705
--- /dev/null
+++ b/gdb/config/m32r/m32r.mt
@@ -0,0 +1,7 @@
+# Target: Mitsubishi m32r processor
+TDEPFILES= m32r-tdep.o monitor.o m32r-rom.o dsrec.o
+TM_FILE= tm-m32r.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/m32r/libsim.a
+GDBSERVER_DEPFILES= low-sim.o
+GDBSERVER_LIBS = ../../sim/m32r/libsim.a ../../bfd/libbfd.a ../../libiberty/libiberty.a ../../opcodes/libopcodes.a
diff --git a/gdb/config/m32r/tm-m32r.h b/gdb/config/m32r/tm-m32r.h
new file mode 100644
index 0000000..8273b4e
--- /dev/null
+++ b/gdb/config/m32r/tm-m32r.h
@@ -0,0 +1,234 @@
+/* Parameters for execution on a Mitsubishi m32r processor.
+ Copyright 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Used by mswin. */
+#define TARGET_M32R 1
+
+/* mvs_check TARGET_BYTE_ORDER BIG_ENDIAN */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* mvs_check REGISTER_NAMES */
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
+ "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", \
+ /* "cond", "sm", "bsm", "ie", "bie", "bcarry", */ \
+}
+/* mvs_check NUM_REGS */
+#define NUM_REGS 24
+
+/* mvs_check REGISTER_SIZE */
+#define REGISTER_SIZE 4
+/* mvs_check MAX_REGISTER_RAW_SIZE */
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* mvs_check *_REGNUM */
+#define R0_REGNUM 0
+#define STRUCT_RETURN_REGNUM 0
+#define ARG0_REGNUM 0
+#define ARGLAST_REGNUM 3
+#define V0_REGNUM 0
+#define V1_REGNUM 1
+#define FP_REGNUM 13
+#define RP_REGNUM 14
+#define SP_REGNUM 15
+#define PSW_REGNUM 16
+#define CBR_REGNUM 17
+#define SPI_REGNUM 18
+#define SPU_REGNUM 19
+#define BPC_REGNUM 20
+#define PC_REGNUM 21
+#define ACCL_REGNUM 22
+#define ACCH_REGNUM 23
+
+/* mvs_check REGISTER_BYTES */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* mvs_check REGISTER_VIRTUAL_TYPE */
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+/* mvs_check REGISTER_BYTE */
+#define REGISTER_BYTE(REG) ((REG) * 4)
+/* mvs_check REGISTER_VIRTUAL_SIZE */
+#define REGISTER_VIRTUAL_SIZE(REG) 4
+/* mvs_check REGISTER_RAW_SIZE */
+#define REGISTER_RAW_SIZE(REG) 4
+
+/* mvs_check MAX_REGISTER_VIRTUAL_SIZE */
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* mvs_check BREAKPOINT */
+#define BREAKPOINT {0x10, 0xf1}
+
+/* mvs_no_check FUNCTION_START_OFFSET */
+#define FUNCTION_START_OFFSET 0
+
+/* mvs_check DECR_PC_AFTER_BREAK */
+#define DECR_PC_AFTER_BREAK 0
+
+/* mvs_check INNER_THAN */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* mvs_check SAVED_PC_AFTER_CALL */
+#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+/* Define other aspects of the stack frame.
+ We keep the offsets of all saved registers, 'cause we need 'em a lot!
+ We also keep the current size of the stack frame, and whether
+ the frame pointer is valid (for frameless functions, and when we're
+ still in the prologue of a function with a frame) */
+
+/* mvs_check EXTRA_FRAME_INFO */
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs fsr; \
+ int framesize; \
+ int using_frame_pointer;
+
+
+extern void m32r_init_extra_frame_info PARAMS ((struct frame_info *fi));
+/* mvs_check INIT_EXTRA_FRAME_INFO */
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) m32r_init_extra_frame_info (fi)
+/* mvs_no_check INIT_FRAME_PC */
+#define INIT_FRAME_PC /* Not necessary */
+
+extern void
+m32r_frame_find_saved_regs PARAMS ((struct frame_info *fi,
+ struct frame_saved_regs *regaddr));
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+/* mvs_check FRAME_FIND_SAVED_REGS */
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ m32r_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+extern CORE_ADDR m32r_frame_chain PARAMS ((struct frame_info *fi));
+/* mvs_check FRAME_CHAIN */
+#define FRAME_CHAIN(fi) m32r_frame_chain (fi)
+
+#define FRAME_CHAIN_VALID(fp, frame) generic_frame_chain_valid (fp, frame)
+
+extern CORE_ADDR m32r_find_callers_reg PARAMS ((struct frame_info *fi,
+ int regnum));
+extern CORE_ADDR m32r_frame_saved_pc PARAMS((struct frame_info *));
+/* mvs_check FRAME_SAVED_PC */
+#define FRAME_SAVED_PC(fi) m32r_frame_saved_pc (fi)
+
+/* mvs_check EXTRACT_RETURN_VALUE */
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+ memcpy ((VALBUF), \
+ (char *)(REGBUF) + REGISTER_BYTE (V0_REGNUM) + \
+ ((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \
+ TYPE_LENGTH (TYPE))
+
+/* mvs_check STORE_RETURN_VALUE */
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+ write_register_bytes(REGISTER_BYTE (V0_REGNUM) + \
+ ((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\
+ (VALBUF), TYPE_LENGTH (TYPE));
+
+extern CORE_ADDR m32r_skip_prologue PARAMS ((CORE_ADDR pc));
+/* mvs_check SKIP_PROLOGUE */
+#define SKIP_PROLOGUE(pc) pc = m32r_skip_prologue (pc)
+
+/* mvs_no_check FRAME_ARGS_SKIP */
+#define FRAME_ARGS_SKIP 0
+
+/* mvs_no_check FRAME_ARGS_ADDRESS */
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+/* mvs_no_check FRAME_LOCALS_ADDRESS */
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+/* mvs_no_check FRAME_NUM_ARGS */
+#define FRAME_NUM_ARGS(val, fi) ((val) = -1)
+
+#define COERCE_FLOAT_TO_DOUBLE 1
+
+#define TARGET_WRITE_SP m32r_write_sp
+
+
+
+
+
+
+/* struct passing and returning stuff */
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
+ write_register (0, STRUCT_ADDR)
+
+extern use_struct_convention_fn m32r_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) m32r_use_struct_convention (GCC_P, TYPE)
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+ REGISTER_RAW_SIZE (V0_REGNUM))
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 8)
+
+
+/* generic dummy frame stuff */
+
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+
+
+/* target-specific dummy_frame stuff */
+
+extern struct frame_info *m32r_pop_frame PARAMS ((struct frame_info *frame));
+/* mvs_check POP_FRAME */
+#define POP_FRAME m32r_pop_frame (get_current_frame ())
+
+/* mvs_no_check STACK_ALIGN */
+/* #define STACK_ALIGN(x) ((x + 3) & ~3) */
+
+extern CORE_ADDR m32r_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+extern CORE_ADDR m32r_push_arguments PARAMS ((int nargs,
+ struct value **args,
+ CORE_ADDR sp,
+ unsigned char struct_return,
+ CORE_ADDR struct_addr));
+
+
+
+/* mvs_no_check PUSH_ARGUMENTS */
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = m32r_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define PUSH_RETURN_ADDRESS(PC, SP) m32r_push_return_address (PC, SP)
+
+/* override the standard get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_LENGTH (0)
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
diff --git a/gdb/config/m68k/3b1.mh b/gdb/config/m68k/3b1.mh
new file mode 100644
index 0000000..2516cce
--- /dev/null
+++ b/gdb/config/m68k/3b1.mh
@@ -0,0 +1,12 @@
+# Host: AT&T 3b1/Unix pc
+# I don't think cc has been tried. -traditional for <sys/ioctl.h>
+# (not sure whether necessary).
+CC= gcc -traditional
+# GCC runs out of virtual memory.
+# A separate CC for pinsn routines is no longer supported, though.
+# FIXME -- someone unlucky enough to have a 3B1, let bug-gcc@prep.ai.mit.edu
+# know what works and what fails on the 3B1.
+#PINSN_CC= cc
+
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+XM_FILE= xm-3b1.h
diff --git a/gdb/config/m68k/3b1.mt b/gdb/config/m68k/3b1.mt
new file mode 100644
index 0000000..4c5d9d4
--- /dev/null
+++ b/gdb/config/m68k/3b1.mt
@@ -0,0 +1,3 @@
+# Target: AT&T 3b1/Unix pc
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-3b1.h
diff --git a/gdb/config/m68k/altos.mh b/gdb/config/m68k/altos.mh
new file mode 100644
index 0000000..1073751
--- /dev/null
+++ b/gdb/config/m68k/altos.mh
@@ -0,0 +1,5 @@
+# Host: Altos 3068 (m68k, System V release 2)
+
+XM_FILE= xm-altos.h
+XDEPFILES= infptrace.o inftarg.o fork-child.o altos-xdep.o
+
diff --git a/gdb/config/m68k/altos.mt b/gdb/config/m68k/altos.mt
new file mode 100644
index 0000000..521e958
--- /dev/null
+++ b/gdb/config/m68k/altos.mt
@@ -0,0 +1,3 @@
+# Target: Altos 3068 (m68k, System V release 2)
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-altos.h
diff --git a/gdb/config/m68k/apollo68b.mh b/gdb/config/m68k/apollo68b.mh
new file mode 100644
index 0000000..6f55497
--- /dev/null
+++ b/gdb/config/m68k/apollo68b.mh
@@ -0,0 +1,6 @@
+# Host: Apollo m68k, BSD mode.
+
+XM_FILE= xm-apollo68b.h
+XDEPFILES=
+NAT_FILE= nm-apollo68b.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o a68v-nat.o
diff --git a/gdb/config/m68k/apollo68b.mt b/gdb/config/m68k/apollo68b.mt
new file mode 100644
index 0000000..2383d3b
--- /dev/null
+++ b/gdb/config/m68k/apollo68b.mt
@@ -0,0 +1,3 @@
+# Target: Apollo m68k in BSD mode
+TDEPFILES= m68k-tdep.o dstread.o
+TM_FILE= tm-apollo68b.h
diff --git a/gdb/config/m68k/apollo68v.mh b/gdb/config/m68k/apollo68v.mh
new file mode 100644
index 0000000..9204f11
--- /dev/null
+++ b/gdb/config/m68k/apollo68v.mh
@@ -0,0 +1,11 @@
+# Host: Apollo, System V mode (?)
+
+XM_FILE= xm-apollo68v.h
+XM_CLIBS= -lPW
+XDEPFILES=
+
+NAT_FILE= nm-apollo68v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o a68v-nat.o
+
+RANLIB=echo >/dev/null
+CC= cc -A ansi -A runtype,any -A systype,any -U__STDC__ -DNO_SYS_FILE
diff --git a/gdb/config/m68k/cisco.mt b/gdb/config/m68k/cisco.mt
new file mode 100644
index 0000000..bc2e921
--- /dev/null
+++ b/gdb/config/m68k/cisco.mt
@@ -0,0 +1,3 @@
+# Target: Cisco Router with 68K processor
+TDEPFILES= m68k-tdep.o corelow.o core-aout.o
+TM_FILE= tm-cisco.h
diff --git a/gdb/config/m68k/delta68.mh b/gdb/config/m68k/delta68.mh
new file mode 100644
index 0000000..5492af0
--- /dev/null
+++ b/gdb/config/m68k/delta68.mh
@@ -0,0 +1,5 @@
+# Host: Motorola Delta Series sysV68 R3V7.1
+
+XM_FILE= xm-delta68.h
+NAT_FILE= nm-delta68.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o delta68-nat.o
diff --git a/gdb/config/m68k/delta68.mt b/gdb/config/m68k/delta68.mt
new file mode 100644
index 0000000..2761329
--- /dev/null
+++ b/gdb/config/m68k/delta68.mt
@@ -0,0 +1,3 @@
+# Motorola Delta Series sysV68 R3V7.1
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-delta68.h
diff --git a/gdb/config/m68k/dpx2.mh b/gdb/config/m68k/dpx2.mh
new file mode 100644
index 0000000..4f22ed53
--- /dev/null
+++ b/gdb/config/m68k/dpx2.mh
@@ -0,0 +1,7 @@
+# Host: Bull DPX2 (68k, System V release 3)
+
+XM_FILE= xm-dpx2.h
+XDEPFILES=
+
+NAT_FILE= nm-dpx2.h
+NATDEPFILES= infptrace.o corelow.o core-aout.o inftarg.o dpx2-nat.o fork-child.o
diff --git a/gdb/config/m68k/dpx2.mt b/gdb/config/m68k/dpx2.mt
new file mode 100644
index 0000000..5bbbbe6
--- /dev/null
+++ b/gdb/config/m68k/dpx2.mt
@@ -0,0 +1,3 @@
+# Target: Bull DPX2 (68k, System V release 3)
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-dpx2.h
diff --git a/gdb/config/m68k/es1800.mt b/gdb/config/m68k/es1800.mt
new file mode 100644
index 0000000..d809c61
--- /dev/null
+++ b/gdb/config/m68k/es1800.mt
@@ -0,0 +1,9 @@
+# Target: Ericsson ES-1800 emulator (remote) for m68k.
+
+# remote-es.o should perhaps be part of the standard monitor.mt
+# configuration, if it is desirable to reduce the number of different
+# configurations. However, before that happens remote-es.c has to be
+# fixed to compile on a DOS host.
+
+TDEPFILES= m68k-tdep.o remote-es.o
+TM_FILE= tm-es1800.h
diff --git a/gdb/config/m68k/hp300bsd.mh b/gdb/config/m68k/hp300bsd.mh
new file mode 100644
index 0000000..3ca0362
--- /dev/null
+++ b/gdb/config/m68k/hp300bsd.mh
@@ -0,0 +1,7 @@
+# Host: Hewlett-Packard 9000 series 300, running BSD
+
+XM_FILE= xm-hp300bsd.h
+XDEPFILES=
+
+NAT_FILE= nm-hp300bsd.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/m68k/hp300bsd.mt b/gdb/config/m68k/hp300bsd.mt
new file mode 100644
index 0000000..cbcc5ed
--- /dev/null
+++ b/gdb/config/m68k/hp300bsd.mt
@@ -0,0 +1,3 @@
+# Target: Hewlett-Packard 9000 series 300, running BSD
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-hp300bsd.h
diff --git a/gdb/config/m68k/hp300hpux.mh b/gdb/config/m68k/hp300hpux.mh
new file mode 100644
index 0000000..8ceb187
--- /dev/null
+++ b/gdb/config/m68k/hp300hpux.mh
@@ -0,0 +1,8 @@
+# Host: Hewlett-Packard 9000 series 300, running HPUX
+# The following is true because gcc uses a different .o file format
+# than the native HPUX compiler
+
+XM_FILE= xm-hp300hpux.h
+
+NAT_FILE= nm-hp300hpux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o hp300ux-nat.o corelow.o core-aout.o
diff --git a/gdb/config/m68k/hp300hpux.mt b/gdb/config/m68k/hp300hpux.mt
new file mode 100644
index 0000000..0fa801d
--- /dev/null
+++ b/gdb/config/m68k/hp300hpux.mt
@@ -0,0 +1,8 @@
+# Target: Hewlett-Packard 9000 series 300, running HPUX
+
+#msg Note that GDB can only read symbols from programs that were
+#msg compiled with GCC using GAS.
+#msg
+
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-hp300hpux.h
diff --git a/gdb/config/m68k/isi.mh b/gdb/config/m68k/isi.mh
new file mode 100644
index 0000000..c406b4c
--- /dev/null
+++ b/gdb/config/m68k/isi.mh
@@ -0,0 +1,5 @@
+# Host: ISI Optimum V (3.05) under 4.3bsd.
+# corelow.o commented out because core dumps are broken on this machine,
+# as of GDB 4.8, according to lam@tfs.com
+XDEPFILES= infptrace.o inftarg.o fork-child.o core-aout.o isi-xdep.o
+XM_FILE= xm-isi.h
diff --git a/gdb/config/m68k/isi.mt b/gdb/config/m68k/isi.mt
new file mode 100644
index 0000000..7c4cdee
--- /dev/null
+++ b/gdb/config/m68k/isi.mt
@@ -0,0 +1,3 @@
+# Target: ISI Optimum V (3.05) under 4.3bsd.
+TDEPFILES=
+TM_FILE= tm-isi.h
diff --git a/gdb/config/m68k/linux.mh b/gdb/config/m68k/linux.mh
new file mode 100644
index 0000000..c3850b1
--- /dev/null
+++ b/gdb/config/m68k/linux.mh
@@ -0,0 +1,9 @@
+# Host: Motorola m68k running Linux
+
+XM_FILE= xm-linux.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o solib.o inftarg.o fork-child.o corelow.o core-aout.o core-regset.o m68klinux-nat.o
+
+GDBSERVER_DEPFILES= low-linux.o
diff --git a/gdb/config/m68k/linux.mt b/gdb/config/m68k/linux.mt
new file mode 100644
index 0000000..0c0a149
--- /dev/null
+++ b/gdb/config/m68k/linux.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k with a.out and ELF
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-linux.h
diff --git a/gdb/config/m68k/m68klynx.mh b/gdb/config/m68k/m68klynx.mh
new file mode 100644
index 0000000..48fdf29
--- /dev/null
+++ b/gdb/config/m68k/m68klynx.mh
@@ -0,0 +1,11 @@
+# Host: Motorola 680x0 running LynxOS
+
+XM_FILE= xm-m68klynx.h
+XM_CLIBS= -lbsd
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-m68klynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
+
+GDBSERVER_LIBS= -lbsd
+GDBSERVER_DEPFILES= low-lynx.o
diff --git a/gdb/config/m68k/m68klynx.mt b/gdb/config/m68k/m68klynx.mt
new file mode 100644
index 0000000..4aeac96
--- /dev/null
+++ b/gdb/config/m68k/m68klynx.mt
@@ -0,0 +1,4 @@
+# Target: Motorola 680x0 running LynxOS
+TDEPFILES= coff-solib.o m68k-tdep.o
+# m68kly-tdep.o
+TM_FILE= tm-m68klynx.h
diff --git a/gdb/config/m68k/m68kv4.mh b/gdb/config/m68k/m68kv4.mh
new file mode 100644
index 0000000..f2db3d9
--- /dev/null
+++ b/gdb/config/m68k/m68kv4.mh
@@ -0,0 +1,7 @@
+# Host: Motorola 680x0 running SVR4 (Commodore Amiga amix or Atari TT ASV)
+
+XM_FILE= xm-m68kv4.h
+XDEPFILES=
+
+NAT_FILE= nm-sysv4.h
+NATDEPFILES= corelow.o core-regset.o solib.o procfs.o fork-child.o
diff --git a/gdb/config/m68k/m68kv4.mt b/gdb/config/m68k/m68kv4.mt
new file mode 100644
index 0000000..fcabb17
--- /dev/null
+++ b/gdb/config/m68k/m68kv4.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 680x0 running SVR4 (Commodore Amiga amix or Atari TT ASV)
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-m68kv4.h
diff --git a/gdb/config/m68k/monitor.mt b/gdb/config/m68k/monitor.mt
new file mode 100644
index 0000000..46b1c55
--- /dev/null
+++ b/gdb/config/m68k/monitor.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k embedded (EST emulator, rom68k and bug monitors)
+TDEPFILES= m68k-tdep.o monitor.o remote-est.o cpu32bug-rom.o rom68k-rom.o abug-rom.o dbug-rom.o dsrec.o
+TM_FILE= tm-monitor.h
diff --git a/gdb/config/m68k/nbsd.mh b/gdb/config/m68k/nbsd.mh
new file mode 100644
index 0000000..a9e3942
--- /dev/null
+++ b/gdb/config/m68k/nbsd.mh
@@ -0,0 +1,5 @@
+# Host: Motorola m68k running NetBSD
+XDEPFILES= ser-tcp.o
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o m68knbsd-nat.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/m68k/nbsd.mt b/gdb/config/m68k/nbsd.mt
new file mode 100644
index 0000000..1ad2882
--- /dev/null
+++ b/gdb/config/m68k/nbsd.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k running NetBSD
+TDEPFILES= m68k-tdep.o solib.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/m68k/news.mh b/gdb/config/m68k/news.mh
new file mode 100644
index 0000000..e94af18
--- /dev/null
+++ b/gdb/config/m68k/news.mh
@@ -0,0 +1,5 @@
+# Host: Sony news series 700/800/900 (68020) running NewsOS version 3.
+XDEPFILES= news-xdep.o
+XM_FILE= xm-news.h
+NAT_FILE= nm-news.h
+NATDEPFILES= inftarg.o fork-child.o corelow.o core-aout.o infptrace.o
diff --git a/gdb/config/m68k/news.mt b/gdb/config/m68k/news.mt
new file mode 100644
index 0000000..42f2417
--- /dev/null
+++ b/gdb/config/m68k/news.mt
@@ -0,0 +1,3 @@
+# Target: Sony news series 700/800/900 (68020) running NewsOS version 3.
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-news.h
diff --git a/gdb/config/m68k/news1000.mh b/gdb/config/m68k/news1000.mh
new file mode 100644
index 0000000..b1bf0a5
--- /dev/null
+++ b/gdb/config/m68k/news1000.mh
@@ -0,0 +1,3 @@
+# Host: Sony news series 1000 (68030) running NewsOS version 3.
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o news-xdep.o
+XM_FILE= xm-news1000.h
diff --git a/gdb/config/m68k/nm-apollo68b.h b/gdb/config/m68k/nm-apollo68b.h
new file mode 100644
index 0000000..4048a8b
--- /dev/null
+++ b/gdb/config/m68k/nm-apollo68b.h
@@ -0,0 +1,41 @@
+/* Macro defintions for an Apollo m68k in BSD mode
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Tell gdb that we can attach and detach other processes */
+#define ATTACH_DETACH
+
+#define U_REGS_OFFSET 6
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR 0
+
+#undef FLOAT_INFO /* No float info yet */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = (6 + 4 * (regno))
+
+/* Apollos don't really have a USER area,so trying to read it from the
+ * process address space will fail. It does support a read from a faked
+ * USER area using the "PEEKUSER" ptrace call.
+ */
+#define PT_READ_U 3
diff --git a/gdb/config/m68k/nm-apollo68v.h b/gdb/config/m68k/nm-apollo68v.h
new file mode 100644
index 0000000..3a56f4a
--- /dev/null
+++ b/gdb/config/m68k/nm-apollo68v.h
@@ -0,0 +1,20 @@
+/* Macro defintions for an Apollo.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/m68k/nm-delta68.h b/gdb/config/m68k/nm-delta68.h
new file mode 100644
index 0000000..cb7ffbf
--- /dev/null
+++ b/gdb/config/m68k/nm-delta68.h
@@ -0,0 +1,21 @@
+/* Macro definitions for a Motorola Delta Series sysV68 R3V7.1.
+ Copyright (C) 1993, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+#define KERNEL_U_SIZE kernel_u_size()
diff --git a/gdb/config/m68k/nm-dpx2.h b/gdb/config/m68k/nm-dpx2.h
new file mode 100644
index 0000000..50da268
--- /dev/null
+++ b/gdb/config/m68k/nm-dpx2.h
@@ -0,0 +1,29 @@
+/* Native support for a Bull DPX2.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* KERNEL_U_ADDR is determined upon startup in dpx2-xdep.c. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = dpx2_register_u_addr ((blockend),(regno));
+
+extern int
+dpx2_register_u_addr PARAMS ((int, int));
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts. */
+#define ONE_PROCESS_WRITETEXT
diff --git a/gdb/config/m68k/nm-hp300bsd.h b/gdb/config/m68k/nm-hp300bsd.h
new file mode 100644
index 0000000..7aacbb1
--- /dev/null
+++ b/gdb/config/m68k/nm-hp300bsd.h
@@ -0,0 +1,88 @@
+/* Parameters for Hewlett-Packard 9000/300 native support under bsd.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Detect whether this is 4.3 or 4.4. */
+
+#include <errno.h>
+#include <sys/param.h>
+#ifdef BSD4_4
+
+/* BSD 4.4 alpha or better */
+
+/* We can attach to processes using ptrace. */
+
+#define ATTACH_DETACH
+#define PTRACE_ATTACH 10
+#define PTRACE_DETACH 11
+
+/* The third argument of ptrace is declared as this type. */
+
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* U_REGS_OFFSET is the offset of the registers within the u area for
+ ptrace purposes. */
+#define U_REGS_OFFSET \
+ ptrace (PT_READ_U, inferior_pid, \
+ (PTRACE_ARG3_TYPE) \
+ (offsetof (struct user, u_kproc.kp_proc.p_md.md_regs)), 0) \
+ - USRSTACK
+
+/* No user structure in 4.4, registers are relative to kernel stack
+ which is fixed. */
+#define KERNEL_U_ADDR 0xFFF00000
+
+/* FIXME: Is ONE_PROCESS_WRITETEXT still true now that the kernel has
+ copy-on-write? It not, move it to the 4.3-specific section below
+ (now it is in xm-hp300bsd.h). */
+
+#else
+
+/* This is BSD 4.3 or something like it. */
+
+/* Get kernel u area address at run-time using BSD style nlist (). */
+#define KERNEL_U_ADDR_BSD
+
+#endif
+
+/* This was once broken for 4.4, but probably because we had the wrong
+ KERNEL_U_ADDR. */
+
+/* This is a piece of magic that is given a register number REGNO
+ and as BLOCKEND the address in the system of the end of the user structure
+ and stores in ADDR the address in the kernel or core dump
+ of that register. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ \
+ if (regno < PS_REGNUM) \
+ addr = (int) &((struct frame *)(blockend))->f_regs[regno]; \
+ else if (regno == PS_REGNUM) \
+ addr = (int) &((struct frame *)(blockend))->f_stackadj; \
+ else if (regno == PC_REGNUM) \
+ addr = (int) &((struct frame *)(blockend))->f_pc; \
+ else if (regno < FPC_REGNUM) \
+ addr = (int) \
+ &((struct user *)0)->u_pcb.pcb_fpregs.fpf_regs[((regno)-FP0_REGNUM)*3];\
+ else if (regno == FPC_REGNUM) \
+ addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpcr; \
+ else if (regno == FPS_REGNUM) \
+ addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpsr; \
+ else \
+ addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpiar; \
+}
diff --git a/gdb/config/m68k/nm-hp300hpux.h b/gdb/config/m68k/nm-hp300hpux.h
new file mode 100644
index 0000000..83e7b2b
--- /dev/null
+++ b/gdb/config/m68k/nm-hp300hpux.h
@@ -0,0 +1,53 @@
+/* Parameters for native support on HP 9000 model 320, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+/* fetch_inferior_registers is in nat-hp300hpux.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Get registers from a core file. The floating point stuff is just
+ guesses. */
+#define NEED_SYS_CORE_H
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ \
+ if (regno < PS_REGNUM) \
+ addr = (int) (&((struct proc_regs *)(blockend))->d0 + regno); \
+ else if (regno == PS_REGNUM) \
+ addr = (int) ((char *) (&((struct proc_regs *)(blockend))->ps) - 2); \
+ else if (regno == PC_REGNUM) \
+ addr = (int) &((struct proc_regs *)(blockend))->pc; \
+ else if (regno < FPC_REGNUM) \
+ addr = (int) (((struct proc_regs *)(blockend))->mc68881 \
+ + ((regno) - FP0_REGNUM) / 2); \
+ else \
+ addr = (int) (((struct proc_regs *)(blockend))->p_float \
+ + (regno) - FPC_REGNUM); \
+}
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+ with five arguments, so programs written for normal ptrace lose.
+
+ Idiots.
+
+ (They should have just made it varadic). */
+
+#define FIVE_ARG_PTRACE
diff --git a/gdb/config/m68k/nm-linux.h b/gdb/config/m68k/nm-linux.h
new file mode 100644
index 0000000..d7a44ec
--- /dev/null
+++ b/gdb/config/m68k/nm-linux.h
@@ -0,0 +1,47 @@
+/* Native support for linux, for GDB, the GNU debugger.
+ Copyright (C) 1996,1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+/* Tell gdb that we can attach and detach other processes */
+#define ATTACH_DETACH
+
+#define U_REGS_OFFSET 0
+
+/* We define this if link.h is available, because with ELF we use SVR4 style
+ shared libraries. */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h" /* Support for shared libraries. */
+#endif
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = m68k_linux_register_u_addr ((blockend),(regno));
+
+extern int
+m68k_linux_register_u_addr PARAMS ((int, int));
+
+#endif /* #ifndef NM_LINUX_H */
diff --git a/gdb/config/m68k/nm-m68klynx.h b/gdb/config/m68k/nm-m68klynx.h
new file mode 100644
index 0000000..62b8d24
--- /dev/null
+++ b/gdb/config/m68k/nm-m68klynx.h
@@ -0,0 +1,25 @@
+/* Native-dependent definitions for Motorola 680x0 running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_M68KLYNX_H
+#define NM_M68KLYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_M68KLYNX_H */
diff --git a/gdb/config/m68k/nm-nbsd.h b/gdb/config/m68k/nm-nbsd.h
new file mode 100644
index 0000000..ce22c4d
--- /dev/null
+++ b/gdb/config/m68k/nm-nbsd.h
@@ -0,0 +1,21 @@
+/* Native-dependent definitions for Motorola m68k running NetBSD, for GDB.
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic NetBSD native definitions. */
+#include "nm-nbsd.h"
diff --git a/gdb/config/m68k/nm-news.h b/gdb/config/m68k/nm-news.h
new file mode 100644
index 0000000..643d217
--- /dev/null
+++ b/gdb/config/m68k/nm-news.h
@@ -0,0 +1,26 @@
+/* Parameters for execution on a Sony/NEWS, for GDB, the GNU debugger.
+ Copyright 1987, 1989, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_HEWS_H
+#define NM_NEWS_H 1
+
+/* Supply missing typedef needed in inftarg.c */
+typedef int pid_t;
+
+#endif /* NM_NEWS_H */
diff --git a/gdb/config/m68k/nm-sun2.h b/gdb/config/m68k/nm-sun2.h
new file mode 100644
index 0000000..9035250
--- /dev/null
+++ b/gdb/config/m68k/nm-sun2.h
@@ -0,0 +1,33 @@
+/* Parameters for execution on a Sun2, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+/* This is a piece of magic that is given a register number REGNO
+ and as BLOCKEND the address in the system of the end of the user structure
+ and stores in ADDR the address in the kernel or core dump
+ of that register. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = blockend + regno * 4; }
diff --git a/gdb/config/m68k/nm-sun3.h b/gdb/config/m68k/nm-sun3.h
new file mode 100644
index 0000000..e4ef8f4
--- /dev/null
+++ b/gdb/config/m68k/nm-sun3.h
@@ -0,0 +1,31 @@
+/* Native-only definitions for Sun-3 for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1991, 1992, 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We have to grab the regs since we store all regs at once. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
diff --git a/gdb/config/m68k/nm-sysv4.h b/gdb/config/m68k/nm-sysv4.h
new file mode 100644
index 0000000..6773131
--- /dev/null
+++ b/gdb/config/m68k/nm-sysv4.h
@@ -0,0 +1,22 @@
+/* Native-dependent definitions for Motorola 680x0 running SVR4.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include the generic SVR4 definitions. */
+
+#include "nm-sysv4.h"
diff --git a/gdb/config/m68k/os68k.mt b/gdb/config/m68k/os68k.mt
new file mode 100644
index 0000000..391dd89
--- /dev/null
+++ b/gdb/config/m68k/os68k.mt
@@ -0,0 +1,3 @@
+# Target: VxWorks running on a 68000
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-os68k.h
diff --git a/gdb/config/m68k/st2000.mt b/gdb/config/m68k/st2000.mt
new file mode 100644
index 0000000..06dfe5c
--- /dev/null
+++ b/gdb/config/m68k/st2000.mt
@@ -0,0 +1,3 @@
+# Target: Tandem ST-2000 phone switch
+TDEPFILES= m68k-tdep.o remote-st.o
+TM_FILE= tm-st2000.h
diff --git a/gdb/config/m68k/sun2os3.mh b/gdb/config/m68k/sun2os3.mh
new file mode 100644
index 0000000..a3ef627
--- /dev/null
+++ b/gdb/config/m68k/sun2os3.mh
@@ -0,0 +1,5 @@
+# Host: Sun 2, running SunOS 3
+XDEPFILES=
+XM_FILE= xm-sun2.h
+NAT_FILE= nm-sun2.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun2os3.mt b/gdb/config/m68k/sun2os3.mt
new file mode 100644
index 0000000..12b7c7f
--- /dev/null
+++ b/gdb/config/m68k/sun2os3.mt
@@ -0,0 +1,7 @@
+# Target: Sun 2, running SunOS 3
+# The system-supplied assembler re-orders the symbols so that gdb
+# can't find "gcc_compiled.".
+#msg If you compile your program with GCC, use the GNU assembler.
+#msg
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-sun2.h
diff --git a/gdb/config/m68k/sun2os4.mh b/gdb/config/m68k/sun2os4.mh
new file mode 100644
index 0000000..617642d
--- /dev/null
+++ b/gdb/config/m68k/sun2os4.mh
@@ -0,0 +1,5 @@
+# Host: Sun 2, running SunOS 4
+XDEPFILES=
+XM_FILE= xm-sun2.h
+NAT_FILE= nm-sun2.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun2os4.mt b/gdb/config/m68k/sun2os4.mt
new file mode 100644
index 0000000..d0c56fe
--- /dev/null
+++ b/gdb/config/m68k/sun2os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 2, running SunOS 4
+TDEPFILES= solib.o m68k-tdep.o
+TM_FILE= tm-sun2os4.h
diff --git a/gdb/config/m68k/sun3os3.mh b/gdb/config/m68k/sun3os3.mh
new file mode 100644
index 0000000..1b93793
--- /dev/null
+++ b/gdb/config/m68k/sun3os3.mh
@@ -0,0 +1,5 @@
+# Host: Sun 3, running SunOS 3
+XDEPFILES=
+XM_FILE= xm-sun3.h
+NAT_FILE= nm-sun3.h
+NATDEPFILES= fork-child.o inftarg.o infptrace.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun3os3.mt b/gdb/config/m68k/sun3os3.mt
new file mode 100644
index 0000000..8f9dac8
--- /dev/null
+++ b/gdb/config/m68k/sun3os3.mt
@@ -0,0 +1,8 @@
+# Target: Sun 3, running SunOS 3
+# The system-supplied assembler re-orders the symbols so that gdb
+# can't find "gcc_compiled.".
+#msg If you compile your program with GCC, use the GNU assembler.
+#msg
+
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-sun3.h
diff --git a/gdb/config/m68k/sun3os4.mh b/gdb/config/m68k/sun3os4.mh
new file mode 100644
index 0000000..5d1bf52
--- /dev/null
+++ b/gdb/config/m68k/sun3os4.mh
@@ -0,0 +1,6 @@
+# Host: Sun 3, running SunOS 4
+XDEPFILES=
+XM_FILE= xm-sun3os4.h
+NAT_FILE= nm-sun3.h
+NATDEPFILES= fork-child.o inftarg.o infptrace.o corelow.o sun3-nat.o
+GDBSERVER_DEPFILES= low-sun3.o
diff --git a/gdb/config/m68k/sun3os4.mt b/gdb/config/m68k/sun3os4.mt
new file mode 100644
index 0000000..dbc265f
--- /dev/null
+++ b/gdb/config/m68k/sun3os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 3, running SunOS 4, as a target system
+TDEPFILES= solib.o m68k-tdep.o
+TM_FILE= tm-sun3os4.h
diff --git a/gdb/config/m68k/tm-3b1.h b/gdb/config/m68k/tm-3b1.h
new file mode 100644
index 0000000..f917760
--- /dev/null
+++ b/gdb/config/m68k/tm-3b1.h
@@ -0,0 +1,32 @@
+/* Parameters for targeting GDB to a 3b1.
+ Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The child target can't deal with floating registers. */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR 0x300000
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-altos.h b/gdb/config/m68k/tm-altos.h
new file mode 100644
index 0000000..2d77fea
--- /dev/null
+++ b/gdb/config/m68k/tm-altos.h
@@ -0,0 +1,57 @@
+/* Target definitions for GDB on an Altos 3068 (m68k running SVR2)
+ Copyright 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The child target can't deal with floating registers. */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0xe
+
+/* Address of end of stack space. */
+
+/*#define STACK_END_ADDR (0xffffff)*/
+#define STACK_END_ADDR (0x1000000)
+
+/* Amount PC must be decremented by after a breakpoint.
+ On the Altos, the kernel resets the pc to the trap instr */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* The only reason this is here is the tm-altos.h reference below. It
+ was moved back here from tm-m68k.h. FIXME? */
+
+#define SKIP_PROLOGUE(pc) \
+{ register int op = read_memory_integer (pc, 2); \
+ if (op == 0047126) \
+ pc += 4; /* Skip link #word */ \
+ else if (op == 0044016) \
+ pc += 6; /* Skip link #long */ \
+ /* Not sure why branches are here. */ \
+ /* From tm-isi.h, tm-altos.h */ \
+ else if (op == 0060000) \
+ pc += 4; /* Skip bra #word */ \
+ else if (op == 00600377) \
+ pc += 6; /* skip bra #long */ \
+ else if ((op & 0177400) == 0060000) \
+ pc += 2; /* skip bra #char */ \
+}
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-apollo68b.h b/gdb/config/m68k/tm-apollo68b.h
new file mode 100644
index 0000000..ee10410
--- /dev/null
+++ b/gdb/config/m68k/tm-apollo68b.h
@@ -0,0 +1,59 @@
+/* Parameters for execution on Apollo 68k running BSD.
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Apollos use vector 0xb for the breakpoint vector */
+
+#define BPT_VECTOR 0xb
+
+#include "m68k/tm-m68k.h"
+
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* These are the jmp_buf registers I could guess. There are 13 registers
+ * in the buffer. There are 8 data registers, 6 general address registers,
+ * the Frame Pointer, the Stack Pointer, the PC and the SR in the chip. I would
+ * guess that 12 is the SR, but we don't need that anyway. 0 and 1 have
+ * me stumped. 4 appears to be a5 for some unknown reason. If you care
+ * about this, disassemble setjmp to find out. But don't do it with gdb :)
+ */
+
+#undef JB_SP
+#undef JB_FP
+#undef JB_PC
+#undef JB_D0
+#undef JB_D1
+#undef JB_D2
+#undef JB_D3
+#undef JB_D4
+#undef JB_D5
+
+#define JB_SP 2
+#define JB_FP 3
+#define JB_PC 5
+#define JB_D0 6
+#define JB_D1 7
+#define JB_D2 8
+#define JB_D3 9
+#define JB_D4 10
+#define JB_D5 11
+
+/* How to decide if we're in a shared library function. (Probably a wrong
+ definintion inherited from the VxWorks config file). */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) (name && strcmp(name, "<end_of_program>") == 0)
diff --git a/gdb/config/m68k/tm-cisco.h b/gdb/config/m68k/tm-cisco.h
new file mode 100644
index 0000000..c3628d0
--- /dev/null
+++ b/gdb/config/m68k/tm-cisco.h
@@ -0,0 +1,55 @@
+/* Parameters for CISCO m68k.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".cisco-gdbinit" /* Init file */
+
+#define DEFAULT_PROMPT "(cisco-68k-gdb) " /* Default prompt */
+
+#include "m68k/tm-m68k.h"
+
+/* Offsets (in target ints) into jmp_buf. Defined in /csc/sys/sun/asm.S. */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_PC 0
+#define JB_D2 1
+#define JB_D3 2
+#define JB_D4 3
+#define JB_D5 4
+#define JB_D6 5
+#define JB_D7 6
+#define JB_A2 7
+#define JB_A3 8
+#define JB_A4 9
+#define JB_A5 10
+#define JB_A6 11
+#define JB_SP 12
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* BFD handles finding the registers in the core file, so they are at
+ the start of the BFD .reg section. */
+#define REGISTER_U_ADDR(addr,blockend,regno) (addr = REGISTER_BYTE (regno))
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/m68k/tm-delta68.h b/gdb/config/m68k/tm-delta68.h
new file mode 100644
index 0000000..5965bb5
--- /dev/null
+++ b/gdb/config/m68k/tm-delta68.h
@@ -0,0 +1,103 @@
+/* Target definitions for delta68.
+ Copyright 1993, 1994, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+#define GCC_COMPILED_FLAG_SYMBOL "gcc_compiled%"
+#define GCC2_COMPILED_FLAG_SYMBOL "gcc2_compiled%"
+
+/* Amount PC must be decremented by after a breakpoint.
+ On the Delta, the kernel decrements it for us. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Not sure what happens if we try to store this register, but
+ phdm@info.ucl.ac.be says we need this define. */
+
+#define CANNOT_STORE_REGISTER(regno) (regno == FPI_REGNUM)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+/* When it returns a float/double value, use fp0 in sysV68. */
+/* When it returns a pointer value, use a0 in sysV68. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE, \
+ &REGBUF[REGISTER_BYTE (FP0_REGNUM)], \
+ VALBUF); \
+ else \
+ memcpy ((VALBUF), \
+ (char *) ((REGBUF) + \
+ (TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : \
+ (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)))), \
+ TYPE_LENGTH(TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+/* When it returns a float/double value, use fp0 in sysV68. */
+/* When it returns a pointer value, use a0 in sysV68. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ { \
+ char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)]; \
+ REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf); \
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM), \
+ raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \
+ } \
+ else \
+ write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : 0), \
+ VALBUF, TYPE_LENGTH (TYPE))
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(val, fi) \
+{ register CORE_ADDR pc = FRAME_SAVED_PC (fi); \
+ register int insn = 0177777 & read_memory_integer (pc, 2); \
+ val = 0; \
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */ \
+ val = read_memory_integer (pc + 2, 2); \
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */ \
+ || (insn & 0170777) == 0050117) /* addqw */ \
+ { val = (insn >> 9) & 7; if (val == 0) val = 8; } \
+ else if (insn == 0157774) /* addal #WW, sp */ \
+ val = read_memory_integer (pc + 2, 4); \
+ val >>= 2; }
+
+/* On M68040 versions of sysV68 R3V7.1, ptrace(PT_WRITE_I) does not clear
+ the processor's instruction cache as it should. */
+#define CLEAR_INSN_CACHE() clear_insn_cache()
+
+#include "m68k/tm-m68k.h"
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#undef EXTRACT_STRUCT_VALUE_ADDRESS
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF)\
+ (*(CORE_ADDR *)((char*)(REGBUF) + 8 * 4))
diff --git a/gdb/config/m68k/tm-dpx2.h b/gdb/config/m68k/tm-dpx2.h
new file mode 100644
index 0000000..8b1bfda
--- /dev/null
+++ b/gdb/config/m68k/tm-dpx2.h
@@ -0,0 +1,33 @@
+/* Parameters for targeting to a Bull DPX2.
+ Copyright (C) 1986, 1987, 1989, 1991, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0xe
+
+/* Need to get function ends by adding this to epilogue address from .bf
+ record, not using x_fsize field. */
+#define FUNCTION_EPILOGUE_SIZE 4
+
+/* The child target can't deal with writing floating registers. */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+#include <sys/types.h>
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-es1800.h b/gdb/config/m68k/tm-es1800.h
new file mode 100644
index 0000000..ce2af1d
--- /dev/null
+++ b/gdb/config/m68k/tm-es1800.h
@@ -0,0 +1,59 @@
+/* Parameters for execution on ES-1800 emulator for 68000.
+ The code was originally written by Johan Holmberg TT/SJ Ericsson Telecom
+ AB and later modified by Johan Henriksson TT/SJ. It was adapted to GDB 4.0
+ by Jan Norden TX/DK.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+GDB is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".esgdbinit"
+
+#define DEFAULT_PROMPT "(esgdb) "
+
+#include "m68k/tm-m68k.h"
+
+/* Longjmp stuff borrowed from sun3 configuration. Don't know if correct.
+ FIXME. */
+/* Offsets (in target ints) into jmp_buf. Not defined by Sun, but at least
+ documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
diff --git a/gdb/config/m68k/tm-hp300bsd.h b/gdb/config/m68k/tm-hp300bsd.h
new file mode 100644
index 0000000..cdd75dc
--- /dev/null
+++ b/gdb/config/m68k/tm-hp300bsd.h
@@ -0,0 +1,62 @@
+/* Parameters for target machine Hewlett-Packard 9000/300, running bsd.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Configuration file for HP9000/300 series machine running BSD,
+ including Utah, Mt. Xinu or Berkeley variants. This is NOT for HP-UX.
+ Problems to hpbsd-bugs@cs.utah.edu. */
+
+/* GCC is the only compiler used on this OS. So get this right even if
+ the code which detects gcc2_compiled. is still broken. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint.
+
+ For hp300bsd the normal breakpoint vector is 0x2 (for debugging via
+ ptrace); for remote kernel debugging the breakpoint vector is 0xf. */
+
+#define BPT_VECTOR 0x2
+#define REMOTE_BPT_VECTOR 0xf
+
+#define TARGET_NBPG 4096
+
+/* For 4.4 this would be 2, but it is OK for us to detect an area a
+ bit bigger than necessary. This way the same gdb binary can target
+ either 4.3 or 4.4. */
+
+#define TARGET_UPAGES 3
+
+/* On the HP300, sigtramp is in the u area. Gak! User struct is not
+ mapped to the same virtual address in user/kernel address space
+ (hence STACK_END_ADDR as opposed to KERNEL_U_ADDR). This tests
+ for the whole u area, since we don't necessarily have hp300bsd
+ include files around. */
+
+/* For 4.4, it is actually right 20 bytes *before* STACK_END_ADDR, so
+ include that in the area we test for. */
+
+#define SIGTRAMP_START(pc) (STACK_END_ADDR - 20)
+#define SIGTRAMP_END(pc) (STACK_END_ADDR + TARGET_UPAGES * TARGET_NBPG)
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR 0xfff00000
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-hp300hpux.h b/gdb/config/m68k/tm-hp300hpux.h
new file mode 100644
index 0000000..fce0d99
--- /dev/null
+++ b/gdb/config/m68k/tm-hp300hpux.h
@@ -0,0 +1,31 @@
+/* Parameters for execution on an HP 9000 model 320, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* GCC is the only compiler used for stabs on this OS. So get this
+ right even if the code which detects gcc2_compiled. is still
+ broken. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-isi.h b/gdb/config/m68k/tm-isi.h
new file mode 100644
index 0000000..f994524
--- /dev/null
+++ b/gdb/config/m68k/tm-isi.h
@@ -0,0 +1,150 @@
+/* Definitions to target GDB on an ISI Optimum V (3.05) under 4.3bsd.
+ Copyright (C) 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This has not been tested on ISI's running BSD 4.2, but it will probably
+ work. */
+
+/* Data segment starts at etext rounded up to DATAROUND in {N,Z}MAGIC files */
+
+#define DATAROUND 0x20000
+#define N_DATADDR(hdr) (hdr.a_magic != OMAGIC ? \
+ (hdr.a_text + DATAROUND) & ~(DATAROUND-1) : hdr.a_text)
+
+/* Text segment starts at sizeof (struct exec) in {N,Z}MAGIC files */
+
+#define N_TXTADDR(hdr) (hdr.a_magic != OMAGIC ? sizeof (struct exec) : 0)
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always.
+ On the ISI, the kernel resets the pc to the trap instr */
+
+#define DECR_PC_AFTER_BREAK 0
+
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(val, fi) \
+{ register CORE_ADDR pc = FRAME_SAVED_PC (fi); \
+ register int insn = 0177777 & read_memory_integer (pc, 2); \
+ val = 0; \
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */ \
+ val = read_memory_integer (pc + 2, 2); \
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */ \
+ || (insn & 0170777) == 0050117) /* addqw */ \
+ { val = (insn >> 9) & 7; if (val == 0) val = 8; } \
+ else if (insn == 0157774) /* addal #WW, sp */ \
+ val = read_memory_integer (pc + 2, 4); \
+ val >>= 2; }
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ register int regnum; \
+ register int regmask; \
+ register CORE_ADDR next_addr; \
+ register CORE_ADDR pc; \
+ register int insn; \
+ register int offset; \
+ memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \
+ if ((frame_info)->pc >= (frame_info)->frame - CALL_DUMMY_LENGTH - FP_REGNUM*4 - 8*12 - 4 \
+ && (frame_info)->pc <= (frame_info)->frame) \
+ { next_addr = (frame_info)->frame; \
+ pc = (frame_info)->frame - CALL_DUMMY_LENGTH - FP_REGNUM * 4 - 8*12 - 4; }\
+ else \
+ { pc = get_pc_function_start ((frame_info)->pc); \
+ /* Verify we have a link a6 instruction next, \
+ or a branch followed by a link a6 instruction; \
+ if not we lose. If we win, find the address above the saved \
+ regs using the amount of storage from the link instruction. */\
+retry: \
+ insn = read_memory_integer (pc, 2); \
+ if (insn == 044016) \
+ next_addr = (frame_info)->frame - read_memory_integer (pc += 2, 4), pc+=4; \
+ else if (insn == 047126) \
+ next_addr = (frame_info)->frame - read_memory_integer (pc += 2, 2), pc+=2; \
+ else if ((insn & 0177400) == 060000) /* bra insn */ \
+ { offset = insn & 0377; \
+ pc += 2; /* advance past bra */ \
+ if (offset == 0) /* bra #word */ \
+ offset = read_memory_integer (pc, 2), pc += 2; \
+ else if (offset == 0377) /* bra #long */ \
+ offset = read_memory_integer (pc, 4), pc += 4; \
+ pc += offset; \
+ goto retry; \
+ } else goto lose; \
+ /* If have an addal #-n, sp next, adjust next_addr. */ \
+ if ((0177777 & read_memory_integer (pc, 2)) == 0157774) \
+ next_addr += read_memory_integer (pc += 2, 4), pc += 4; \
+ } \
+ /* next should be a moveml to (sp) or -(sp) or a movl r,-(sp) */ \
+ insn = read_memory_integer (pc, 2), pc += 2; \
+ regmask = read_memory_integer (pc, 2); \
+ if ((insn & 0177760) == 022700) /* movl rn, (sp) */ \
+ (frame_saved_regs).regs[(insn&7) + ((insn&010)?8:0)] = next_addr; \
+ else if ((insn & 0177760) == 024700) /* movl rn, -(sp) */ \
+ (frame_saved_regs).regs[(insn&7) + ((insn&010)?8:0)] = next_addr-=4; \
+ else if (insn == 0044327) /* moveml mask, (sp) */ \
+ { pc += 2; \
+ /* Regmask's low bit is for register 0, the first written */ \
+ next_addr -= 4; \
+ for (regnum = 0; regnum < 16; regnum++, regmask >>= 1) \
+ if (regmask & 1) \
+ (frame_saved_regs).regs[regnum] = (next_addr += 4); \
+ } else if (insn == 0044347) /* moveml mask, -(sp) */ \
+ { pc += 2; \
+ /* Regmask's low bit is for register 15, the first pushed */ \
+ for (regnum = 15; regnum >= 0; regnum--, regmask >>= 1) \
+ if (regmask & 1) \
+ (frame_saved_regs).regs[regnum] = (next_addr -= 4); } \
+ /* clrw -(sp); movw ccr,-(sp) may follow. */ \
+ if (read_memory_integer (pc, 2) == 041147 \
+ && read_memory_integer (pc+2, 2) == 042347) \
+ (frame_saved_regs).regs[PS_REGNUM] = (next_addr -= 4); \
+ lose: ; \
+ (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame + 8; \
+ (frame_saved_regs).regs[FP_REGNUM] = (frame_info)->frame; \
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 4; \
+}
+
+/* The only reason this is here is the tm-isi.h reference below. It
+ was moved back here from tm-m68k.h. FIXME? */
+
+#define SKIP_PROLOGUE(pc) \
+{ register int op = read_memory_integer (pc, 2); \
+ if (op == 0047126) \
+ pc += 4; /* Skip link #word */ \
+ else if (op == 0044016) \
+ pc += 6; /* Skip link #long */ \
+ /* Not sure why branches are here. */ \
+ /* From tm-isi.h, tm-altos.h */ \
+ else if (op == 0060000) \
+ pc += 4; /* Skip bra #word */ \
+ else if (op == 00600377) \
+ pc += 6; /* skip bra #long */ \
+ else if ((op & 0177400) == 0060000) \
+ pc += 2; /* skip bra #char */ \
+}
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-linux.h b/gdb/config/m68k/tm-linux.h
new file mode 100644
index 0000000..6c11998
--- /dev/null
+++ b/gdb/config/m68k/tm-linux.h
@@ -0,0 +1,109 @@
+/* Definitions to target GDB to Linux on m680x0
+ Copyright (C) 1996,1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Number of traps that happen between exec'ing the shell to run an
+ inferior, and when we finally get to the inferior code. This is 2
+ on most implementations. */
+
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* The following definitions are appropriate when using the ELF
+ format, where floating point values are returned in fp0, pointer
+ values in a0 and other values in d0. */
+
+/* Extract from an array REGBUF containing the (raw) register state a
+ function return value of type TYPE, and copy that, in virtual
+ format, into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+{ \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ { \
+ REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE, \
+ ((char *) (REGBUF) \
+ + REGISTER_BYTE (FP0_REGNUM)), \
+ VALBUF); \
+ } \
+ else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR) \
+ memcpy (VALBUF, (char *) (REGBUF) + REGISTER_BYTE (A0_REGNUM), \
+ TYPE_LENGTH (TYPE)); \
+ else \
+ memcpy (VALBUF, \
+ ((char *) (REGBUF) \
+ + (TYPE_LENGTH (TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH (TYPE))), \
+ TYPE_LENGTH (TYPE)); \
+}
+
+/* Write into appropriate registers a function return value of type
+ TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+{ \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ { \
+ char raw_buffer[REGISTER_RAW_SIZE (FP0_REGNUM)]; \
+ REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buffer); \
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM), \
+ raw_buffer, TYPE_LENGTH (TYPE)); \
+ } \
+ else \
+ { \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_PTR) \
+ write_register_bytes (REGISTER_BYTE (A0_REGNUM), VALBUF, \
+ TYPE_LENGTH (TYPE)); \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE)); \
+ } \
+}
+
+#include "tm-sysv4.h"
+#include "m68k/tm-m68k.h"
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#undef EXTRACT_STRUCT_VALUE_ADDRESS
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (*(CORE_ADDR *)((char *) (REGBUF) + REGISTER_BYTE (A0_REGNUM)))
+
+/* Offsets (in target ints) into jmp_buf. */
+
+#define JB_ELEMENT_SIZE 4
+#define JB_PC 7
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+/* Offset to saved PC in sigcontext, from <asm/sigcontext.h>. */
+#define SIGCONTEXT_PC_OFFSET 26
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(FRAME) \
+ (((FRAME)->signal_handler_caller \
+ ? sigtramp_saved_pc (FRAME) \
+ : read_memory_integer ((FRAME)->frame + 4, 4)))
+
+extern CORE_ADDR sigtramp_saved_pc PARAMS ((struct frame_info *));
+
+#define IN_SIGTRAMP(pc,name) in_sigtramp (pc)
+extern int in_sigtramp PARAMS ((CORE_ADDR pc));
diff --git a/gdb/config/m68k/tm-m68k.h b/gdb/config/m68k/tm-m68k.h
new file mode 100644
index 0000000..098500c
--- /dev/null
+++ b/gdb/config/m68k/tm-m68k.h
@@ -0,0 +1,393 @@
+/* Parameters for execution on a 68000 series machine.
+ Copyright 1986, 1987, 1989, 1990, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Generic 68000 stuff, to be included by other tm-*.h files. */
+
+#define IEEE_FLOAT 1
+
+/* Define the bit, byte, and word ordering of the machine. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#if !defined(SKIP_PROLOGUE)
+#define SKIP_PROLOGUE(ip) {(ip) = m68k_skip_prologue(ip);}
+extern CORE_ADDR m68k_skip_prologue PARAMS ((CORE_ADDR ip));
+#endif
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+#endif
+
+extern CORE_ADDR m68k_saved_pc_after_call PARAMS ((struct frame_info *));
+extern void m68k_find_saved_regs PARAMS ((struct frame_info *, struct frame_saved_regs *));
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ m68k_saved_pc_after_call(frame)
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be kept short aligned when doing function calls. */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 1) & ~1)
+
+/* Sequence of bytes for breakpoint instruction.
+ This is a TRAP instruction. The last 4 bits (0xf below) is the
+ vector. Systems which don't use 0xf should define BPT_VECTOR
+ themselves before including this file. */
+
+#if !defined (BPT_VECTOR)
+#define BPT_VECTOR 0xf
+#endif
+
+#if !defined (BREAKPOINT)
+#define BREAKPOINT {0x4e, (0x40 | BPT_VECTOR)}
+#endif
+
+/* We default to vector 1 for the "remote" target, but allow targets
+ to override. */
+#if !defined (REMOTE_BPT_VECTOR)
+#define REMOTE_BPT_VECTOR 1
+#endif
+
+#if !defined (REMOTE_BREAKPOINT)
+#define REMOTE_BREAKPOINT {0x4e, (0x40 | REMOTE_BPT_VECTOR)}
+#endif
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+
+#if !defined (DECR_PC_AFTER_BREAK)
+#define DECR_PC_AFTER_BREAK 2
+#endif
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+#define REGISTER_BYTES_FP (16*4 + 8 + 8*12 + 3*4)
+#define REGISTER_BYTES_NOFP (16*4 + 8)
+
+#ifndef NUM_REGS
+#define NUM_REGS 29
+#endif
+
+#define NUM_FREGS (NUM_REGS-24)
+
+#ifndef REGISTER_BYTES_OK
+#define REGISTER_BYTES_OK(b) \
+ ((b) == REGISTER_BYTES_FP \
+ || (b) == REGISTER_BYTES_NOFP)
+#endif
+
+#ifndef REGISTER_BYTES
+#define REGISTER_BYTES (16*4 + 8 + 8*12 + 3*4)
+#endif
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) \
+ ((N) >= FPC_REGNUM ? (((N) - FPC_REGNUM) * 4) + 168 \
+ : (N) >= FP0_REGNUM ? (((N) - FP0_REGNUM) * 12) + 72 \
+ : (N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the 68000, all regs are 4 bytes
+ except the floating point regs which are 12 bytes. */
+/* Note that the unsigned cast here forces the result of the
+ subtraction to very high positive values if N < FP0_REGNUM */
+
+#define REGISTER_RAW_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 8 ? 12 : 4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the 68000, all regs are 4 bytes
+ except the floating point regs which are 8-byte doubles. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 8 ? 8 : 4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 12
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#define REGISTER_CONVERTIBLE(N) (((unsigned)(N) - FP0_REGNUM) < 8)
+
+#include "floatformat.h"
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+do \
+ { \
+ DOUBLEST dbl_tmp_val; \
+ floatformat_to_doublest (&floatformat_m68881_ext, (FROM), &dbl_tmp_val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), dbl_tmp_val); \
+ } while (0)
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+do \
+ { \
+ DOUBLEST dbl_tmp_val; \
+ dbl_tmp_val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ floatformat_from_doublest (&floatformat_m68881_ext, &dbl_tmp_val, (TO)); \
+ } while (0)
+
+/* Return the GDB type object for the "standard" data type of data
+ in register N. This should be int for D0-D7, double for FP0-FP7,
+ and void pointer for all others (A0-A7, PC, SR, FPCONTROL etc).
+ Note, for registers which contain addresses return pointer to void,
+ not pointer to char, because we don't want to attempt to print
+ the string after printing the address. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((unsigned) (N) >= FPC_REGNUM ? lookup_pointer_type (builtin_type_void) : \
+ (unsigned) (N) >= FP0_REGNUM ? builtin_type_double : \
+ (unsigned) (N) >= A0_REGNUM ? lookup_pointer_type (builtin_type_void) : \
+ builtin_type_int)
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+#define REGISTER_NAMES \
+ {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
+ "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", \
+ "ps", "pc", \
+ "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
+ "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags" }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define D0_REGNUM 0
+#define A0_REGNUM 8
+#define A1_REGNUM 9
+#define FP_REGNUM 14 /* Contains address of executing stack frame */
+#define SP_REGNUM 15 /* Contains address of top of stack */
+#define PS_REGNUM 16 /* Contains processor status */
+#define PC_REGNUM 17 /* Contains program counter */
+#define FP0_REGNUM 18 /* Floating point register 0 */
+#define FPC_REGNUM 26 /* 68881 control register */
+#define FPS_REGNUM 27 /* 68881 status register */
+#define FPI_REGNUM 28 /* 68881 iaddr register */
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (A1_REGNUM, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. This is assuming that floating point values are returned
+ as doubles in d0/d1. */
+
+#if !defined (EXTRACT_RETURN_VALUE)
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy ((VALBUF), \
+ (char *)(REGBUF) + \
+ (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)), \
+ TYPE_LENGTH(TYPE))
+#endif
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. Assumes floats are passed
+ in d0/d1. */
+
+#if !defined (STORE_RETURN_VALUE)
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+#endif
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+ chain-pointer.
+ In the case of the 68000, the frame's nominal address
+ is the address of a 4-byte word containing the calling frame's address. */
+
+/* If we are chaining from sigtramp, then manufacture a sigtramp frame
+ (which isn't really on the stack. I'm not sure this is right for anything
+ but BSD4.3 on an hp300. */
+#define FRAME_CHAIN(thisframe) \
+ (thisframe->signal_handler_caller \
+ ? thisframe->frame \
+ : (!inside_entry_file ((thisframe)->pc) \
+ ? read_memory_integer ((thisframe)->frame, 4) \
+ : 0))
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ do { \
+ if ((FI)->signal_handler_caller) \
+ (FRAMELESS) = 0; \
+ else \
+ (FRAMELESS) = frameless_look_for_prologue(FI); \
+ } while (0)
+
+/* This was determined by experimentation on hp300 BSD 4.3. Perhaps
+ it corresponds to some offset in /usr/include/sys/user.h or
+ something like that. Using some system include file would
+ have the advantage of probably being more robust in the face
+ of OS upgrades, but the disadvantage of being wrong for
+ cross-debugging. */
+
+#define SIG_PC_FP_OFFSET 530
+
+#define FRAME_SAVED_PC(FRAME) \
+ (((FRAME)->signal_handler_caller \
+ ? ((FRAME)->next \
+ ? read_memory_integer ((FRAME)->next->frame + SIG_PC_FP_OFFSET, 4) \
+ : read_memory_integer (read_register (SP_REGNUM) \
+ + SIG_PC_FP_OFFSET - 8, 4) \
+ ) \
+ : read_memory_integer ((FRAME)->frame + 4, 4)) \
+ )
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+#if !defined (FRAME_NUM_ARGS)
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+#endif
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#if !defined (FRAME_FIND_SAVED_REGS)
+#define FRAME_FIND_SAVED_REGS(fi,fsr) m68k_find_saved_regs ((fi), &(fsr))
+#endif /* no FIND_FRAME_SAVED_REGS. */
+
+
+/* Things needed for making the inferior call functions. */
+
+/* The CALL_DUMMY macro is the sequence of instructions, as disassembled
+ by gdb itself:
+
+ These instructions exist only so that m68k_find_saved_regs can parse
+ them as a "prologue"; they are never executed.
+
+ fmovemx fp0-fp7,sp@- 0xf227 0xe0ff
+ moveml d0-a5,sp@- 0x48e7 0xfffc
+ clrw sp@- 0x4267
+ movew ccr,sp@- 0x42e7
+
+ The arguments are pushed at this point by GDB; no code is needed in
+ the dummy for this. The CALL_DUMMY_START_OFFSET gives the position
+ of the following jsr instruction. That is where we start
+ executing.
+
+ jsr @#0x32323232 0x4eb9 0x3232 0x3232
+ addal #0x69696969,sp 0xdffc 0x6969 0x6969
+ trap #<your BPT_VECTOR number here> 0x4e4?
+ nop 0x4e71
+
+ Note this is CALL_DUMMY_LENGTH bytes (28 for the above example).
+
+ The dummy frame always saves the floating-point registers, whether they
+ actually exist on this target or not. */
+
+/* FIXME: Wrong to hardwire this as BPT_VECTOR when sometimes it
+ should be REMOTE_BPT_VECTOR. Best way to fix it would be to define
+ CALL_DUMMY_BREAKPOINT_OFFSET. */
+
+#define CALL_DUMMY {0xf227e0ff, 0x48e7fffc, 0x426742e7, 0x4eb93232, 0x3232dffc, 0x69696969, (0x4e404e71 | (BPT_VECTOR << 16))}
+#define CALL_DUMMY_LENGTH 28 /* Size of CALL_DUMMY */
+#define CALL_DUMMY_START_OFFSET 12 /* Offset to jsr instruction*/
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 12)
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME.
+ We use the BFD routines to store a big-endian value of known size. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ bfd_putb32 (fun, (unsigned char *) dummyname + CALL_DUMMY_START_OFFSET + 2); \
+ bfd_putb32 (nargs*4, (unsigned char *) dummyname + CALL_DUMMY_START_OFFSET + 8); }
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME { m68k_push_dummy_frame (); }
+
+extern void m68k_push_dummy_frame PARAMS ((void));
+
+extern void m68k_pop_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME { m68k_pop_frame (); }
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+#define TARGET_M68K
diff --git a/gdb/config/m68k/tm-m68klynx.h b/gdb/config/m68k/tm-m68klynx.h
new file mode 100644
index 0000000..fbe5707
--- /dev/null
+++ b/gdb/config/m68k/tm-m68klynx.h
@@ -0,0 +1,38 @@
+/* Macro definitions for Motorola 680x0 running under LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_M68KLYNX_H
+#define TM_M68KLYNX_H
+
+#include "tm-lynx.h"
+
+/* If PC-2 contains this instruction, then we know what we are in a system
+ call stub, and the return PC is is at SP+4, instead of SP. */
+
+#define SYSCALL_TRAP 0x4e4a /* trap #10 */
+#define SYSCALL_TRAP_OFFSET 2 /* PC is after trap instruction */
+
+/* Use the generic 68k definitions. */
+
+#include "m68k/tm-m68k.h"
+
+/* Disable dumbshit alternate breakpoint mechanism needed by 68k stub. */
+#undef REMOTE_BREAKPOINT
+
+#endif /* TM_M68KLYNX_H */
diff --git a/gdb/config/m68k/tm-m68kv4.h b/gdb/config/m68k/tm-m68kv4.h
new file mode 100644
index 0000000..6730607
--- /dev/null
+++ b/gdb/config/m68k/tm-m68kv4.h
@@ -0,0 +1,70 @@
+/* Target definitions for GDB on a Motorola 680x0 running SVR4.
+ (Commodore Amiga with amix or Atari TT with ASV)
+ Copyright (C) 1991, 1995 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygint)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+/* How much to decrement the PC after a trap. Depends on kernel. */
+
+#define DECR_PC_AFTER_BREAK 0 /* No decrement required */
+
+/* Use the alternate method of determining valid frame chains. */
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+#include "tm-sysv4.h"
+#include "m68k/tm-m68k.h"
+
+/* Offsets (in target ints) into jmp_buf. Not defined in any system header
+ file, so we have to step through setjmp/longjmp with a debugger and figure
+ them out. As a double check, note that <setjmp> defines _JBLEN as 13,
+ which matches the number of elements we see saved by setjmp(). */
+
+#define JB_ELEMENT_SIZE sizeof(int) /* jmp_buf[_JBLEN] is array of ints */
+
+#define JB_D2 0
+#define JB_D3 1
+#define JB_D4 2
+#define JB_D5 3
+#define JB_D6 4
+#define JB_D7 5
+#define JB_A1 6
+#define JB_A2 7
+#define JB_A3 8
+#define JB_A4 9
+#define JB_A5 10
+#define JB_A6 11
+#define JB_A7 12
+
+#define JB_PC JB_A1 /* Setjmp()'s return PC saved in A1 */
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* Convert a DWARF register number to a gdb REGNUM. */
+#define DWARF_REG_TO_REGNUM(num) ((num) < 16 ? (num) : (num)+FP0_REGNUM-16)
diff --git a/gdb/config/m68k/tm-mac.h b/gdb/config/m68k/tm-mac.h
new file mode 100644
index 0000000..90b4fab
--- /dev/null
+++ b/gdb/config/m68k/tm-mac.h
@@ -0,0 +1,20 @@
+/* Target-dependent definitions for Mac running MacOS.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-monitor.h b/gdb/config/m68k/tm-monitor.h
new file mode 100644
index 0000000..7a48d9c
--- /dev/null
+++ b/gdb/config/m68k/tm-monitor.h
@@ -0,0 +1,44 @@
+/* Target machine definitions for a generic m68k monitor/emulator.
+ Copyright (C) 1986, 1987, 1989, 1993, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The definitions here are appropriate for several embedded m68k-based
+ targets, including IDP (rom68k), BCC (cpu32bug), and EST's emulator. */
+
+/* GCC is probably the only compiler used on this configuration. So
+ get this right even if the code which detects gcc2_compiled. is
+ still broken. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* The target system handles breakpoints. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* No float registers. */
+
+/*#define NUM_REGS 18*/
+
+#include "m68k/tm-m68k.h"
+
+/* Need to do this for ELF targets, where we can't figure out the boundaries of
+ the entry file. This method stops the backtrace when we reach main. */
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+/* FIXME, should do GET_LONGJMP_TARGET for newlib. */
diff --git a/gdb/config/m68k/tm-nbsd.h b/gdb/config/m68k/tm-nbsd.h
new file mode 100644
index 0000000..cc86cc8
--- /dev/null
+++ b/gdb/config/m68k/tm-nbsd.h
@@ -0,0 +1,41 @@
+/* Macro definitions for i386 running under NetBSD.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include <sys/param.h>
+#include <machine/vmparam.h>
+
+/* Define BPT_VECTOR if it is different than the default.
+ This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x2
+
+/* Address of end of stack space. */
+#define STACK_END_ADDR USRSTACK
+
+/* For NetBSD, sigtramp is 32 bytes before STACK_END_ADDR. */
+#define SIGTRAMP_START(pc) (STACK_END_ADDR - 32)
+#define SIGTRAMP_END(pc) (STACK_END_ADDR)
+
+#include "m68k/tm-m68k.h"
+#include "tm-nbsd.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/m68k/tm-news.h b/gdb/config/m68k/tm-news.h
new file mode 100644
index 0000000..9fca446
--- /dev/null
+++ b/gdb/config/m68k/tm-news.h
@@ -0,0 +1,75 @@
+/* Parameters for execution on a Sony/NEWS, for GDB, the GNU debugger.
+ Copyright 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* See following cpu type determination macro to get the machine type.
+
+Here is an m-news.h file for gdb. It supports the 68881 registers.
+ by hikichi@srava.sra.junet
+
+* Ptrace for handling floating register has a bug(before NEWS OS version 2.2),
+* After NEWS OS version 3.2, some of ptrace's bug is fixed.
+ But we cannot change the floating register(see adb(1) in OS 3.2) yet. */
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+/* when it return the floating value, use the FP0 in NEWS. */
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ { if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ { \
+ REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE, \
+ &REGBUF[REGISTER_BYTE (FP0_REGNUM)], \
+ VALBUF); \
+ } \
+ else \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE)); }
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+/* when it return the floating value, use the FP0 in NEWS. */
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ { if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ { \
+ char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)]; \
+ REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf); \
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM), \
+ raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \
+ } \
+ else \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE)); }
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(val, fi) \
+{ register CORE_ADDR pc = FRAME_SAVED_PC (fi); \
+ register int insn = 0177777 & read_memory_integer (pc, 2); \
+ val = 0; \
+ if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */ \
+ val = read_memory_integer (pc + 2, 2); \
+ else if ((insn & 0170777) == 0050217 /* addql #N, sp */ \
+ || (insn & 0170777) == 0050117) /* addqw */ \
+ { val = (insn >> 9) & 7; if (val == 0) val = 8; } \
+ else if (insn == 0157774) /* addal #WW, sp */ \
+ val = read_memory_integer (pc + 2, 4); \
+ val >>= 2; }
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-os68k.h b/gdb/config/m68k/tm-os68k.h
new file mode 100644
index 0000000..a69573f
--- /dev/null
+++ b/gdb/config/m68k/tm-os68k.h
@@ -0,0 +1,46 @@
+/* Parameters for execution on VxWorks m68k's, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".os68gdbinit"
+
+#define DEFAULT_PROMPT "(os68k) "
+
+#include "m68k/tm-m68k.h"
+
+/* We have more complex, useful breakpoints on the target. */
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+/* Takes the current frame-struct pointer and returns the chain-pointer
+ to get to the calling frame.
+
+ If our current frame pointer is zero, we're at the top; else read out
+ the saved FP from memory pointed to by the current FP. */
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) ((thisframe)->frame? read_memory_integer ((thisframe)->frame, 4): 0)
+
+/* If the chain pointer is zero (either because the saved value fetched
+ by FRAME_CHAIN was zero, or because the current FP was zero so FRAME_CHAIN
+ never fetched anything), we are at the top of the stack. */
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#undef FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
diff --git a/gdb/config/m68k/tm-st2000.h b/gdb/config/m68k/tm-st2000.h
new file mode 100644
index 0000000..8ddf0e9
--- /dev/null
+++ b/gdb/config/m68k/tm-st2000.h
@@ -0,0 +1,20 @@
+/* Parameters for a Tandem ST2000 phone switch.
+ Copyright (C) 1986, 1987, 1989, 199 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-sun2.h b/gdb/config/m68k/tm-sun2.h
new file mode 100644
index 0000000..9970f1e
--- /dev/null
+++ b/gdb/config/m68k/tm-sun2.h
@@ -0,0 +1,23 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The child target can't deal with floating registers. */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-sun2os4.h b/gdb/config/m68k/tm-sun2os4.h
new file mode 100644
index 0000000..76c7f99
--- /dev/null
+++ b/gdb/config/m68k/tm-sun2os4.h
@@ -0,0 +1,20 @@
+/* Copyright (C) 1990, Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m68k/tm-sun2.h"
+#include "tm-sunos.h"
diff --git a/gdb/config/m68k/tm-sun3.h b/gdb/config/m68k/tm-sun3.h
new file mode 100644
index 0000000..be45db4
--- /dev/null
+++ b/gdb/config/m68k/tm-sun3.h
@@ -0,0 +1,107 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_SUN3_H
+#define TM_SUN3_H
+
+/* Sun3 status includes fpflags, which shows whether the FPU has been used
+ by the process, and whether the FPU was done with an instruction or
+ was interrupted in the middle of a long instruction. See
+ <machine/reg.h>. */
+/* a&d, pc,sr, fp, fpstat, fpflags */
+
+#define REGISTER_BYTES (16*4 + 8 + 8*12 + 3*4 + 4)
+
+#define NUM_REGS 31
+
+#define REGISTER_BYTES_OK(b) \
+ ((b) == REGISTER_BYTES \
+ || (b) == REGISTER_BYTES_FP \
+ || (b) == REGISTER_BYTES_NOFP)
+
+/* If PC contains this instruction, then we know what we are in a system
+ call stub, and the return PC is is at SP+4, instead of SP. */
+
+#define SYSCALL_TRAP 0x4e40 /* trap #0 */
+#define SYSCALL_TRAP_OFFSET 0 /* PC points at trap instruction */
+
+#include "m68k/tm-m68k.h"
+
+/* Disable alternate breakpoint mechanism needed by 68k stub. */
+#undef REMOTE_BREAKPOINT
+
+/* Offsets (in target ints) into jmp_buf. Not defined by Sun, but at least
+ documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* If sun3 pcc says that a parameter is a short, it's a short. */
+#define BELIEVE_PCC_PROMOTION_TYPE
+
+/* Can't define BELIEVE_PCC_PROMOTION for SunOS /bin/cc of SunOS 4.1.1.
+ Apparently Sun fixed this for the sparc but not the sun3. */
+
+/* The code which tries to deal with this bug is never harmful on a sun3. */
+#define SUN_FIXED_LBRAC_BUG (0)
+
+/* On the sun3 the kernel pushes a sigcontext on the user stack and then
+ `calls' _sigtramp in user code. _sigtramp saves the floating point status
+ on the stack and calls the signal handler function. The stack does not
+ contain enough information to allow a normal backtrace, but sigcontext
+ contains the saved user pc/sp. FRAME_CHAIN and friends in tm-m68k.h and
+ m68k_find_saved_regs deal with this situation by manufacturing a fake frame
+ for _sigtramp.
+ SIG_PC_FP_OFFSET is the offset from the signal handler frame to the
+ saved pc in sigcontext.
+ SIG_SP_FP_OFFSET is the offset from the signal handler frame to the end
+ of sigcontext which is identical to the saved sp at SIG_PC_FP_OFFSET - 4.
+
+ Please note that it is impossible to correctly backtrace from a breakpoint
+ in _sigtramp as _sigtramp modifies the stack pointer a few times. */
+
+#undef SIG_PC_FP_OFFSET
+#define SIG_PC_FP_OFFSET 324
+#define SIG_SP_FP_OFFSET 332
+
+#endif /* TM_SUN3_H */
diff --git a/gdb/config/m68k/tm-sun3os4.h b/gdb/config/m68k/tm-sun3os4.h
new file mode 100644
index 0000000..927587b
--- /dev/null
+++ b/gdb/config/m68k/tm-sun3os4.h
@@ -0,0 +1,21 @@
+/* Target machine parameters for Sun-3 under SunOS 4.x, for GDB.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m68k/tm-sun3.h"
+#include "tm-sunos.h"
diff --git a/gdb/config/m68k/tm-vx68.h b/gdb/config/m68k/tm-vx68.h
new file mode 100644
index 0000000..e601bda
--- /dev/null
+++ b/gdb/config/m68k/tm-vx68.h
@@ -0,0 +1,91 @@
+/* Target machine description for VxWorks m68k's, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".vxgdbinit"
+
+#define DEFAULT_PROMPT "(vxgdb) "
+
+/* GCC is probably the only compiler used on this configuration. So
+ get this right even if the code which detects gcc2_compiled. is
+ still broken. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* We have more complex, useful breakpoints on the target. */
+#define DECR_PC_AFTER_BREAK 0
+
+#include "m68k/tm-m68k.h"
+
+/* Takes the current frame-struct pointer and returns the chain-pointer
+ to get to the calling frame.
+
+ If our current frame pointer is zero, we're at the top; else read out
+ the saved FP from memory pointed to by the current FP. */
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) ((thisframe)->frame? read_memory_integer ((thisframe)->frame, 4): 0)
+
+/* If the chain pointer is zero (either because the saved value fetched
+ by FRAME_CHAIN was zero, or because the current FP was zero so FRAME_CHAIN
+ never fetched anything), we are at the top of the stack. */
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#undef FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* FIXME, Longjmp information stolen from Sun-3 config. Dunno if right. */
+/* Offsets (in target ints) into jmp_buf. Not defined by Sun, but at least
+ documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land. Slurp the args out of the stack.
+ We expect the first arg to be a pointer to the jmp_buf structure from which
+ we extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (18)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+#define VX_SIZE_FPREGS (8 * REGISTER_RAW_SIZE (FP0_REGNUM) \
+ + (3 * REGISTER_SIZE))
diff --git a/gdb/config/m68k/vxworks68.mt b/gdb/config/m68k/vxworks68.mt
new file mode 100644
index 0000000..8c97744
--- /dev/null
+++ b/gdb/config/m68k/vxworks68.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k running VxWorks
+TDEPFILES= m68k-tdep.o remote-vx.o remote-vx68.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vx68.h
diff --git a/gdb/config/m68k/xm-3b1.h b/gdb/config/m68k/xm-3b1.h
new file mode 100644
index 0000000..d1cc7f1
--- /dev/null
+++ b/gdb/config/m68k/xm-3b1.h
@@ -0,0 +1,85 @@
+/* Parameters for execution on a 3b1.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#define HAVE_TERMIO
+#define USG
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR 0x70000
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = blockend + regno * 4; }
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+
+#endif
diff --git a/gdb/config/m68k/xm-altos.h b/gdb/config/m68k/xm-altos.h
new file mode 100644
index 0000000..ca93bd1
--- /dev/null
+++ b/gdb/config/m68k/xm-altos.h
@@ -0,0 +1,202 @@
+/* Definitions to make GDB run on an Altos 3068 (m68k running SVR2)
+ Copyright (C) 1987,1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* The altos support would make a good base for a port to other USGR2 systems
+ (like the 3b1 and the Convergent miniframe). */
+
+/* This is only needed in one file, but it's cleaner to put it here than
+ putting in more #ifdef's. */
+#include <sys/page.h>
+#include <sys/net.h>
+
+#define USG
+
+#define HAVE_TERMIO
+
+#define CBREAK XTABS /* It takes all kinds... */
+
+#ifndef R_OK
+#define R_OK 4
+#define W_OK 2
+#define X_OK 1
+#define F_OK 0
+#endif
+
+/* Get sys/wait.h ie. from a Sun and edit it a little (mc68000 to m68k) */
+/* Why bother? */
+#if 0
+#define HAVE_WAIT_STRUCT
+#endif
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR 0x1fbf000
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ if (regno <= SP_REGNUM) \
+ addr = blockend + regno * 4; \
+ else if (regno == PS_REGNUM) \
+ addr = blockend + regno * 4 + 4; \
+ else if (regno == PC_REGNUM) \
+ addr = blockend + regno * 4 + 2; \
+}
+
+#define REGISTER_ADDR(u_ar0, regno) \
+ (((regno) < PS_REGNUM) \
+ ? (&((struct exception_stack *) (u_ar0))->e_regs[(regno + R0)]) \
+ : (((regno) == PS_REGNUM) \
+ ? ((int *) (&((struct exception_stack *) (u_ar0))->e_PS)) \
+ : (&((struct exception_stack *) (u_ar0))->e_PC)))
+
+#define FP_REGISTER_ADDR(u, regno) \
+ (((char *) \
+ (((regno) < FPC_REGNUM) \
+ ? (&u.u_pcb.pcb_mc68881[FMC68881_R0 + (((regno) - FP0_REGNUM) * 3)]) \
+ : (&u.u_pcb.pcb_mc68881[FMC68881_C + ((regno) - FPC_REGNUM)]))) \
+ - ((char *) (& u)))
+
+
+#ifndef __GNUC__
+#undef USE_GAS
+#define ALTOS_AS
+#else
+#define USE_GAS
+#endif
+
+/* Motorola assembly format */
+#if !defined(USE_GAS) && !defined(ALTOS)
+#define MOTOROLA
+#endif
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#ifdef MOTOROLA
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("move.l $ end, sp"); \
+ asm ("clr.l fp"); }
+#else
+#ifdef ALTOS_AS
+#define INIT_STACK(beg, end) \
+{ asm ("global end"); \
+ asm ("mov.l &end,%sp"); \
+ asm ("clr.l %fp"); }
+#else
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel $ end, sp"); \
+ asm ("clrl fp"); }
+#endif
+#endif
+
+/* Push the frame pointer register on the stack. */
+#ifdef MOTOROLA
+#define PUSH_FRAME_PTR \
+ asm ("move.l fp, -(sp)");
+#else
+#ifdef ALTOS_AS
+#define PUSH_FRAME_PTR \
+ asm ("mov.l %fp, -(%sp)");
+#else
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+#endif
+#endif
+
+/* Copy the top-of-stack to the frame pointer register. */
+#ifdef MOTOROLA
+#define POP_FRAME_PTR \
+ asm ("move.l (sp), fp");
+#else
+#ifdef ALTOS_AS
+#define POP_FRAME_PTR \
+ asm ("mov.l (%sp), %fp");
+#else
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+#endif
+#endif
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#ifdef MOTOROLA
+#define PUSH_REGISTERS \
+{ asm ("clr.w -(sp)"); \
+ asm ("pea (10,sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+#else
+#ifdef ALTOS_AS
+#define PUSH_REGISTERS \
+{ asm ("clr.w -(%sp)"); \
+ asm ("pea (10,%sp)"); \
+ asm ("movm.l &0xfffe,-(%sp)"); }
+#else
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+#endif
+#endif
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#ifdef MOTOROLA
+#define POP_REGISTERS \
+{ asm ("subi.l $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+#else
+#ifdef ALTOS_AS
+#define POP_REGISTERS \
+{ asm ("sub.l &8,28(%sp)"); \
+ asm ("movem (%sp),&0xffff"); \
+ asm ("rte"); }
+#else
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+#endif
+#endif
diff --git a/gdb/config/m68k/xm-apollo68b.h b/gdb/config/m68k/xm-apollo68b.h
new file mode 100644
index 0000000..f0defda
--- /dev/null
+++ b/gdb/config/m68k/xm-apollo68b.h
@@ -0,0 +1,24 @@
+/* Macro definitions for an Apollo m68k in BSD mode
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#define ALIGN_STACK_ON_STARTUP
+
+extern char *strdup();
diff --git a/gdb/config/m68k/xm-apollo68v.h b/gdb/config/m68k/xm-apollo68v.h
new file mode 100644
index 0000000..c87ff47
--- /dev/null
+++ b/gdb/config/m68k/xm-apollo68v.h
@@ -0,0 +1,44 @@
+/* Macro defintions for an Apollo.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu)
+ * July 1988
+ */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* I'm running gdb 3.4 under 386/ix 2.0.2, which is a derivative of AT&T's
+Sys V/386 3.2.
+
+On some machines, gdb crashes when it's starting up while calling the
+vendor's termio tgetent() routine. It always works when run under
+itself (actually, under 3.2, it's not an infinitely recursive bug.)
+After some poking around, it appears that depending on the environment
+size, or whether you're running YP, or the phase of the moon or something,
+the stack is not always long-aligned when main() is called, and tgetent()
+takes strong offense at that. On some machines this bug never appears, but
+on those where it does, it occurs quite reliably. */
+#define ALIGN_STACK_ON_STARTUP
+
+/* define USG if you are using sys5 /usr/include's */
+#define USG
+
+#define HAVE_TERMIO
+
diff --git a/gdb/config/m68k/xm-delta68.h b/gdb/config/m68k/xm-delta68.h
new file mode 100644
index 0000000..6ce705c
--- /dev/null
+++ b/gdb/config/m68k/xm-delta68.h
@@ -0,0 +1,36 @@
+/* Macro definitions for a Delta.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* I'm running gdb 4.9 under sysV68 R3V7.1.
+
+ On some machines, gdb crashes when it's starting up while calling the
+ vendor's termio tgetent() routine. It always works when run under
+ itself (actually, under 3.2, it's not an infinitely recursive bug.)
+ After some poking around, it appears that depending on the environment
+ size, or whether you're running YP, or the phase of the moon or something,
+ the stack is not always long-aligned when main() is called, and tgetent()
+ takes strong offense at that. On some machines this bug never appears, but
+ on those where it does, it occurs quite reliably. */
+#define ALIGN_STACK_ON_STARTUP
+
+#define USG
+
+#define HAVE_TERMIO
diff --git a/gdb/config/m68k/xm-dpx2.h b/gdb/config/m68k/xm-dpx2.h
new file mode 100644
index 0000000..e5532e7
--- /dev/null
+++ b/gdb/config/m68k/xm-dpx2.h
@@ -0,0 +1,26 @@
+/* Parameters for execution on a Bull DPX2.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#define HAVE_TERMIOS
+#define USG
+
+/* Avoid redefinition errors */
+#include <limits.h>
diff --git a/gdb/config/m68k/xm-hp300bsd.h b/gdb/config/m68k/xm-hp300bsd.h
new file mode 100644
index 0000000..5e67792
--- /dev/null
+++ b/gdb/config/m68k/xm-hp300bsd.h
@@ -0,0 +1,85 @@
+/* Parameters for hosting on a Hewlett-Packard 9000/300, running bsd.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Configuration file for HP9000/300 series machine running
+ * University of Utah's 4.3bsd (or 4.4BSD) port. This is NOT for HP-UX.
+ * Problems to hpbsd-bugs@cs.utah.edu
+ */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#include <sys/param.h> /* For INT_MIN */
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts. */
+#define ONE_PROCESS_WRITETEXT
+
+extern char *strdup PARAMS ((const char *));
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel #end, sp"); \
+ asm ("movel #0,a6"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel a6,sp@-");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl sp@,a6");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea sp@(10)"); \
+ asm ("movem #0xfffe,sp@-"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil #8,sp@(28)"); \
+ asm ("movem sp@,#0xffff"); \
+ asm ("rte"); }
diff --git a/gdb/config/m68k/xm-hp300hpux.h b/gdb/config/m68k/xm-hp300hpux.h
new file mode 100644
index 0000000..b6d75d6
--- /dev/null
+++ b/gdb/config/m68k/xm-hp300hpux.h
@@ -0,0 +1,150 @@
+/* Parameters for HP 9000 model 320 hosting, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Define this to indicate problems with traps after continuing. */
+#define HP_OS_BUG
+
+/* Set flag to indicate whether HP's assembler is in use. */
+#ifdef __GNUC__
+#ifdef __HPUX_ASM__
+#define HPUX_ASM
+#endif
+#else /* not GNU C. */
+#define HPUX_ASM
+#endif /* not GNU C. */
+
+/* Define this for versions of hp-ux older than 6.0 */
+/* #define HPUX_VERSION_5 */
+
+/* define USG if you are using sys5 /usr/include's */
+#undef USG /* In case it was defined in the Makefile for cplus-dem.c */
+#define USG
+
+#define HAVE_TERMIOS
+
+#define REGISTER_ADDR(u_ar0, regno) \
+ (unsigned int) \
+ (((regno) < PS_REGNUM) \
+ ? (&((struct exception_stack *) (u_ar0))->e_regs[(regno + R0)]) \
+ : (((regno) == PS_REGNUM) \
+ ? ((int *) (&((struct exception_stack *) (u_ar0))->e_PS)) \
+ : (&((struct exception_stack *) (u_ar0))->e_PC)))
+
+#define FP_REGISTER_ADDR(u, regno) \
+ (((char *) \
+ (((regno) < FPC_REGNUM) \
+ ? (&u.u_pcb.pcb_mc68881[FMC68881_R0 + (((regno) - FP0_REGNUM) * 3)]) \
+ : (&u.u_pcb.pcb_mc68881[FMC68881_C + ((regno) - FPC_REGNUM)]))) \
+ - ((char *) (& u)))
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+#ifndef HPUX_ASM
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+
+#else /* HPUX_ASM */
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm ("global end"); \
+ asm ("mov.l &end,%sp"); \
+ asm ("clr.l %a6"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("mov.l %fp,-(%sp)");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("mov.l (%sp),%fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clr.w -(%sp)"); \
+ asm ("pea 10(%sp)"); \
+ asm ("movm.l &0xfffe,-(%sp)"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subi.l &8,28(%sp)"); \
+ asm ("mov.m (%sp),&0xffff"); \
+ asm ("rte"); }
+
+#endif /* HPUX_ASM */
diff --git a/gdb/config/m68k/xm-isi.h b/gdb/config/m68k/xm-isi.h
new file mode 100644
index 0000000..4e75333
--- /dev/null
+++ b/gdb/config/m68k/xm-isi.h
@@ -0,0 +1,92 @@
+/* Definitions to make GDB run on an ISI Optimum V (3.05) under 4.3bsd.
+ Copyright 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* This has not been tested on ISI's running BSD 4.2, but it will probably
+ work. */
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+/*#define KERNEL_U_ADDR 0x10800000*/
+#define KERNEL_U_ADDR 0
+
+/* expects blockend to be u.u_ar0 */
+extern int rloc[]; /* Defined in isi-dep.c */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ blockend &= UPAGES*NBPG - 1; \
+ if (regno < 18) addr = (int)blockend + rloc[regno]*4; \
+ else if (regno < 26) addr = (int) &((struct user *)0)->u_68881_regs \
+ + (regno - 18) * 12; \
+ else if (regno < 29) addr = (int) &((struct user *)0)->u_68881_regs \
+ + 8 * 12 + (regno - 26) * 4; \
+}
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movl $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
diff --git a/gdb/config/m68k/xm-linux.h b/gdb/config/m68k/xm-linux.h
new file mode 100644
index 0000000..7266cff
--- /dev/null
+++ b/gdb/config/m68k/xm-linux.h
@@ -0,0 +1,40 @@
+/* Native support for linux, for GDB, the GNU debugger.
+ Copyright (C) 1996,1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+/* Pick up most of what we need from the generic m68k host include file. */
+
+#include "m68k/xm-m68k.h"
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+#define KERNEL_U_ADDR 0x0
+
+#define HAVE_TERMIOS
+#define NEED_POSIX_SETPGID
+
+/* Linux has sigsetjmp and siglongjmp */
+#define HAVE_SIGSETJMP
+
+/* Need R_OK etc, but USG isn't defined. */
+#include <unistd.h>
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/m68k/xm-m68k.h b/gdb/config/m68k/xm-m68k.h
new file mode 100644
index 0000000..5479408
--- /dev/null
+++ b/gdb/config/m68k/xm-m68k.h
@@ -0,0 +1,22 @@
+/* Macro definitions for running gdb on host machines with m68k cpu's.
+ Copyright (C) 1991, Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygint)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
diff --git a/gdb/config/m68k/xm-m68klynx.h b/gdb/config/m68k/xm-m68klynx.h
new file mode 100644
index 0000000..ded6844
--- /dev/null
+++ b/gdb/config/m68k/xm-m68klynx.h
@@ -0,0 +1,24 @@
+/* Host-dependent definitions for Motorola 680x0 running LynxOS, for GDB.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Get generic LynxOS host definitions. */
+
+#include "xm-lynx.h"
diff --git a/gdb/config/m68k/xm-m68kv4.h b/gdb/config/m68k/xm-m68kv4.h
new file mode 100644
index 0000000..2149c8f
--- /dev/null
+++ b/gdb/config/m68k/xm-m68kv4.h
@@ -0,0 +1,28 @@
+/* Host definitions for GDB on a Motorola 680x0 running SVR4.
+ (Commodore Amiga with amix or Atari TT with ASV)
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Pick up most of what we need from the generic m68k host include file. */
+
+#include "m68k/xm-m68k.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/m68k/xm-mpw.h b/gdb/config/m68k/xm-mpw.h
new file mode 100644
index 0000000..f0585b3
--- /dev/null
+++ b/gdb/config/m68k/xm-mpw.h
@@ -0,0 +1,24 @@
+/* Macro definitions for running GDB on Apple 68k-based Macintoshes.
+ Copyright (C) 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Use angle brackets so that the common xm-mpw.h is found. */
+
+#include <xm-mpw.h>
diff --git a/gdb/config/m68k/xm-nbsd.h b/gdb/config/m68k/xm-nbsd.h
new file mode 100644
index 0000000..aa28e19
--- /dev/null
+++ b/gdb/config/m68k/xm-nbsd.h
@@ -0,0 +1,21 @@
+/* Parameters for execution on a Motorola m68k running NetBSD, for GDB.
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/m68k/xm-news.h b/gdb/config/m68k/xm-news.h
new file mode 100644
index 0000000..081337b
--- /dev/null
+++ b/gdb/config/m68k/xm-news.h
@@ -0,0 +1,137 @@
+/* Parameters for execution on a Sony/NEWS, for GDB, the GNU debugger.
+ Copyright 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#include <sys/param.h> /* For INT_MIN */
+
+#define HAVE_WAIT_STRUCT
+
+/* We can't use "isatty" or "fileno" on this machine. This isn't good,
+ but it will have to do. */
+#define ISATTY(FP) ((FP) == stdin || (FP) == stdout)
+
+/* THis is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR UADDR
+
+/* The offsets in this macro are from /usr/include/machine/reg.h */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ static char offsets[] = { \
+ /*d0-d7:*/1,2,3,4,5,6,7,8, \
+ /*a0-a6:*/9,10,11,12,13,14,15, /*sp:*/-4, /*ps:*/0, /*pc:*/-1, \
+ /*fp0-fp7:*/19,22,25,28,31,34,37,40, /*fpc:*/16,17,18 }; \
+ addr = blockend + 4 * offsets[regno]; \
+}
+
+/* NewsOS 3.3 does not define errno in <errno.h>. */
+extern int errno;
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Use GNU assembler instead of standard assembler */
+#define USE_GAS
+
+/* Motorola assembly format */
+#ifndef USE_GAS
+#define MOTOROLA
+#endif
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#ifdef MOTOROLA
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("move.l $ end, sp"); \
+ asm ("clr.l fp"); }
+#else
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel $ end, sp"); \
+ asm ("clrl fp"); }
+#endif
+
+/* Push the frame pointer register on the stack. */
+#ifdef MOTOROLA
+#define PUSH_FRAME_PTR \
+ asm ("move.l fp, -(sp)");
+#else
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+#endif
+
+/* Copy the top-of-stack to the frame pointer register. */
+#ifdef MOTOROLA
+#define POP_FRAME_PTR \
+ asm ("move.l (sp), fp");
+#else
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+#endif
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#ifdef MOTOROLA
+#define PUSH_REGISTERS \
+{ asm ("clr.w -(sp)"); \
+ asm ("pea (10,sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+#else
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+#endif
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#ifdef MOTOROLA
+#define POP_REGISTERS \
+{ asm ("subi.l $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+#else
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
+#endif
diff --git a/gdb/config/m68k/xm-news1000.h b/gdb/config/m68k/xm-news1000.h
new file mode 100644
index 0000000..b70234c
--- /dev/null
+++ b/gdb/config/m68k/xm-news1000.h
@@ -0,0 +1,26 @@
+/* Parameters for a Sony/NEWS series 1000 with News-OS version 3,
+ for GDB, the GNU debugger.
+ Copyright (C) 1990 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is required by Sony include files like <sys/user.h> so we
+ get the right offset into the u area. Relying on the compiler
+ to define this only works for cc, not gcc. */
+#undef mc68030
+#define mc68030
+#include "m68k/xm-news.h"
diff --git a/gdb/config/m68k/xm-sun2.h b/gdb/config/m68k/xm-sun2.h
new file mode 100644
index 0000000..457451c
--- /dev/null
+++ b/gdb/config/m68k/xm-sun2.h
@@ -0,0 +1,78 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR 0x2800
+
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea 10(sp)"); \
+ asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil $8,28(sp)"); \
+ asm ("movem (sp),$ 0xffff"); \
+ asm ("rte"); }
diff --git a/gdb/config/m68k/xm-sun3.h b/gdb/config/m68k/xm-sun3.h
new file mode 100644
index 0000000..3de7446
--- /dev/null
+++ b/gdb/config/m68k/xm-sun3.h
@@ -0,0 +1,73 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+ Copyright (C) 1986, 1987, 1989, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+ 0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movel #end, sp"); \
+ asm ("movel #0,a6"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("movel a6,sp@-");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl sp@,a6");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("clrw -(sp)"); \
+ asm ("pea sp@(10)"); \
+ asm ("movem #0xfffe,sp@-"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("subil #8,sp@(28)"); \
+ asm ("movem sp@,#0xffff"); \
+ asm ("rte"); }
diff --git a/gdb/config/m68k/xm-sun3os4.h b/gdb/config/m68k/xm-sun3os4.h
new file mode 100644
index 0000000..faf3b7d
--- /dev/null
+++ b/gdb/config/m68k/xm-sun3os4.h
@@ -0,0 +1,21 @@
+/* Macro definitions for a sun 3 running os 4.
+ Copyright (C) 1989, Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m68k/xm-sun3.h"
+#define FPU
diff --git a/gdb/config/m88k/cxux.mh b/gdb/config/m88k/cxux.mh
new file mode 100644
index 0000000..cb02225
--- /dev/null
+++ b/gdb/config/m88k/cxux.mh
@@ -0,0 +1,7 @@
+# Host: Motorola 88k running CX/UX
+
+XM_FILE= xm-cxux.h
+XDEPFILES=
+
+NAT_FILE= nm-cxux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o cxux-nat.o corelow.o core-aout.o
diff --git a/gdb/config/m88k/cxux.mt b/gdb/config/m88k/cxux.mt
new file mode 100644
index 0000000..295de84
--- /dev/null
+++ b/gdb/config/m88k/cxux.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k running Harris CX/UX
+TDEPFILES= m88k-tdep.o remote-bug.o
+TM_FILE= tm-cxux.h
diff --git a/gdb/config/m88k/delta88.mh b/gdb/config/m88k/delta88.mh
new file mode 100644
index 0000000..824967a
--- /dev/null
+++ b/gdb/config/m88k/delta88.mh
@@ -0,0 +1,7 @@
+# Host: Motorola 88k running SVR3
+
+XM_FILE= xm-delta88.h
+XDEPFILES=
+
+NAT_FILE= nm-m88k.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o m88k-nat.o corelow.o core-aout.o
diff --git a/gdb/config/m88k/delta88.mt b/gdb/config/m88k/delta88.mt
new file mode 100644
index 0000000..c8e669b
--- /dev/null
+++ b/gdb/config/m88k/delta88.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k running SVR3
+TDEPFILES= m88k-tdep.o
+TM_FILE= tm-delta88.h
diff --git a/gdb/config/m88k/delta88v4.mh b/gdb/config/m88k/delta88v4.mh
new file mode 100644
index 0000000..82be883
--- /dev/null
+++ b/gdb/config/m88k/delta88v4.mh
@@ -0,0 +1,7 @@
+# Host: Motorola 88k running SVR4
+
+XM_FILE= xm-delta88v4.h
+XDEPFILES=
+
+NAT_FILE= nm-delta88v4.h
+NATDEPFILES= fork-child.o m88k-nat.o corelow.o core-regset.o procfs.o solib.o
diff --git a/gdb/config/m88k/delta88v4.mt b/gdb/config/m88k/delta88v4.mt
new file mode 100644
index 0000000..7797d4b
--- /dev/null
+++ b/gdb/config/m88k/delta88v4.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k running SVR4
+TDEPFILES= m88k-tdep.o
+TM_FILE= tm-delta88v4.h
diff --git a/gdb/config/m88k/m88k.mh b/gdb/config/m88k/m88k.mh
new file mode 100644
index 0000000..6933265
--- /dev/null
+++ b/gdb/config/m88k/m88k.mh
@@ -0,0 +1,5 @@
+# Host: Motorola 88000 running DGUX
+XDEPFILES=
+XM_FILE= xm-dgux.h
+NAT_FILE= nm-m88k.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o m88k-nat.o
diff --git a/gdb/config/m88k/m88k.mt b/gdb/config/m88k/m88k.mt
new file mode 100644
index 0000000..ca3fab4
--- /dev/null
+++ b/gdb/config/m88k/m88k.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k Binary Compatibility Standard
+TDEPFILES= m88k-tdep.o remote-bug.o
+TM_FILE= tm-m88k.h
diff --git a/gdb/config/m88k/nm-cxux.h b/gdb/config/m88k/nm-cxux.h
new file mode 100644
index 0000000..fec9536
--- /dev/null
+++ b/gdb/config/m88k/nm-cxux.h
@@ -0,0 +1,32 @@
+/* Native definitions for Motorola 88K running Harris CX/UX
+ Copyright 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Override the standard fetch/store definitions. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = m88k_register_u_addr ((blockend),(regno));
+
+#define ATTACH_DETACH
+
+#define PTRACE_ATTACH 128
+#define PTRACE_DETACH 129
+
+
diff --git a/gdb/config/m88k/nm-delta88v4.h b/gdb/config/m88k/nm-delta88v4.h
new file mode 100644
index 0000000..9c1a30e
--- /dev/null
+++ b/gdb/config/m88k/nm-delta88v4.h
@@ -0,0 +1,21 @@
+/* Native machine description for Motorola Delta 88 box, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/nm-m88k.h"
+#include "nm-sysv4.h"
diff --git a/gdb/config/m88k/nm-m88k.h b/gdb/config/m88k/nm-m88k.h
new file mode 100644
index 0000000..95eca0a
--- /dev/null
+++ b/gdb/config/m88k/nm-m88k.h
@@ -0,0 +1,24 @@
+/* Native support macros for m88k, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1992
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = m88k_register_u_addr ((blockend),(regno));
diff --git a/gdb/config/m88k/tm-cxux.h b/gdb/config/m88k/tm-cxux.h
new file mode 100644
index 0000000..e59c6da
--- /dev/null
+++ b/gdb/config/m88k/tm-cxux.h
@@ -0,0 +1,59 @@
+/* Target definitions for m88k running Harris CX/UX.
+ Copyright 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HARRIS_TARGET 1
+
+#define CXUX_TARGET 1
+
+/* Type of X registers, as supplied by the OS */
+
+typedef struct {
+ long w1, w2, w3, w4;
+} X_REGISTER_RAW_TYPE;
+
+#define X_REGISTER_VIRTUAL_TYPE double
+
+#include "m88k/tm-m88k.h"
+
+#define ADD_SHARED_SYMBOL_FILES(args,have_tty) add_shared_symbol_files ()
+
+#define CONVERT_REGISTER_ADDRESS
+
+/* Always allocate space for both, but recognize that the m88100 has no
+ FP_REGS. */
+
+#undef ARCH_NUM_REGS
+#define ARCH_NUM_REGS (target_is_m88110 ? (GP_REGS + FP_REGS) : (GP_REGS))
+
+/* Don't need this grotesquerie. */
+
+#undef SHIFT_INST_REGS
+
+/* Extended registers are treated as 16 bytes by Harris' OS's.
+ We treat them as 16 bytes here for consistency's sake. */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 16)
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+ ((N) >= XFP_REGNUM \
+ ? (((GP_REGS) * REGISTER_RAW_SIZE(0)) + \
+ (((N) - XFP_REGNUM) * REGISTER_RAW_SIZE(XFP_REGNUM))) \
+ : ((N) * REGISTER_RAW_SIZE(0)))
diff --git a/gdb/config/m88k/tm-delta88.h b/gdb/config/m88k/tm-delta88.h
new file mode 100644
index 0000000..c0a9c4a
--- /dev/null
+++ b/gdb/config/m88k/tm-delta88.h
@@ -0,0 +1,26 @@
+/* Target machine description for Motorola Delta 88 box, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/tm-m88k.h"
+
+#define DELTA88
+
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigcode", (name)))
+#define SIGTRAMP_FRAME_FIXUP(frame) (frame) += 0x20
+#define SIGTRAMP_SP_FIXUP(sp) (sp) = read_memory_integer((sp), 4)
diff --git a/gdb/config/m88k/tm-delta88v4.h b/gdb/config/m88k/tm-delta88v4.h
new file mode 100644
index 0000000..112a4a6
--- /dev/null
+++ b/gdb/config/m88k/tm-delta88v4.h
@@ -0,0 +1,30 @@
+/* Target machine description for Motorola Delta 88 box, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define DELTA88
+
+#include "m88k/tm-m88k.h"
+#include "tm-sysv4.h"
+
+/* If we don't define this, backtraces go on forever. */
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+#define IN_SIGTRAMP(pc, name) ((name) && (STREQ ("signalhandler", (name)) \
+ || STREQ("sigacthandler", (name))))
+#define SIGTRAMP_SP_FIXUP(sp) (sp) = read_memory_integer((sp)+0xcd8, 4)
diff --git a/gdb/config/m88k/tm-m88k.h b/gdb/config/m88k/tm-m88k.h
new file mode 100644
index 0000000..390cdef
--- /dev/null
+++ b/gdb/config/m88k/tm-m88k.h
@@ -0,0 +1,620 @@
+/* Target machine description for generic Motorola 88000, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* g++ support is not yet included. */
+
+/* Define the bit, byte, and word ordering of the machine. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* We cache information about saved registers in the frame structure,
+ to save us from having to re-scan function prologues every time
+ a register in a non-current frame is accessed. */
+
+#define EXTRA_FRAME_INFO \
+ struct frame_saved_regs *fsr; \
+ CORE_ADDR locals_pointer; \
+ CORE_ADDR args_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+ so that FRAME_FIND_SAVED_REGS () will know to allocate and
+ initialize a frame_saved_regs struct the first time it is called.
+ Set the arg_pointer to -1, which is not valid; 0 and other values
+ indicate real, cached values. */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ init_extra_frame_info (fromleaf, fi)
+extern void init_extra_frame_info ();
+
+#define IEEE_FLOAT
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(frompc) \
+ { (frompc) = skip_prologue (frompc); }
+extern CORE_ADDR skip_prologue ();
+
+/* The m88k kernel aligns all instructions on 4-byte boundaries. The
+ kernel also uses the least significant two bits for its own hocus
+ pocus. When gdb receives an address from the kernel, it needs to
+ preserve those right-most two bits, but gdb also needs to be careful
+ to realize that those two bits are not really a part of the address
+ of an instruction. Shrug. */
+
+extern CORE_ADDR m88k_addr_bits_remove PARAMS ((CORE_ADDR));
+#define ADDR_BITS_REMOVE(addr) m88k_addr_bits_remove (addr)
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ (ADDR_BITS_REMOVE (read_register (SRP_REGNUM)))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+/* instruction 0xF000D1FF is 'tb0 0,r0,511'
+ If Bit bit 0 of r0 is clear (always true),
+ initiate exception processing (trap).
+ */
+#define BREAKPOINT {0xF0, 0x00, 0xD1, 0xFF}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define GP_REGS (38)
+#define FP_REGS (32)
+#define NUM_REGS (GP_REGS + FP_REGS)
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {\
+ "r0",\
+ "r1",\
+ "r2",\
+ "r3",\
+ "r4",\
+ "r5",\
+ "r6",\
+ "r7",\
+ "r8",\
+ "r9",\
+ "r10",\
+ "r11",\
+ "r12",\
+ "r13",\
+ "r14",\
+ "r15",\
+ "r16",\
+ "r17",\
+ "r18",\
+ "r19",\
+ "r20",\
+ "r21",\
+ "r22",\
+ "r23",\
+ "r24",\
+ "r25",\
+ "r26",\
+ "r27",\
+ "r28",\
+ "r29",\
+ "r30",\
+ "r31",\
+ "psr",\
+ "fpsr",\
+ "fpcr",\
+ "sxip",\
+ "snip",\
+ "sfip",\
+ "x0",\
+ "x1",\
+ "x2",\
+ "x3",\
+ "x4",\
+ "x5",\
+ "x6",\
+ "x7",\
+ "x8",\
+ "x9",\
+ "x10",\
+ "x11",\
+ "x12",\
+ "x13",\
+ "x14",\
+ "x15",\
+ "x16",\
+ "x17",\
+ "x18",\
+ "x19",\
+ "x20",\
+ "x21",\
+ "x22",\
+ "x23",\
+ "x24",\
+ "x25",\
+ "x26",\
+ "x27",\
+ "x28",\
+ "x29",\
+ "x30",\
+ "x31",\
+ "vbr",\
+ "dmt0",\
+ "dmd0",\
+ "dma0",\
+ "dmt1",\
+ "dmd1",\
+ "dma1",\
+ "dmt2",\
+ "dmd2",\
+ "dma2",\
+ "sr0",\
+ "sr1",\
+ "sr2",\
+ "sr3",\
+ "fpecr",\
+ "fphs1",\
+ "fpls1",\
+ "fphs2",\
+ "fpls2",\
+ "fppt",\
+ "fprh",\
+ "fprl",\
+ "fpit",\
+ "fpsr",\
+ "fpcr",\
+ }
+
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define R0_REGNUM 0 /* Contains the constant zero */
+#define SRP_REGNUM 1 /* Contains subroutine return pointer */
+#define RV_REGNUM 2 /* Contains simple return values */
+#define SRA_REGNUM 12 /* Contains address of struct return values */
+#define SP_REGNUM 31 /* Contains address of top of stack */
+
+/* Instruction pointer notes...
+
+ On the m88100:
+
+ * cr04 = sxip. On exception, contains the excepting pc (probably).
+ On rte, is ignored.
+
+ * cr05 = snip. On exception, contains the NPC (next pc). On rte,
+ pc is loaded from here.
+
+ * cr06 = sfip. On exception, contains the NNPC (next next pc). On
+ rte, the NPC is loaded from here.
+
+ * lower two bits of each are flag bits. Bit 1 is V means address
+ is valid. If address is not valid, bit 0 is ignored. Otherwise,
+ bit 0 is E and asks for an exception to be taken if this
+ instruction is executed.
+
+ On the m88110:
+
+ * cr04 = exip. On exception, contains the address of the excepting
+ pc (always). On rte, pc is loaded from here. Bit 0, aka the D
+ bit, is a flag saying that the offending instruction was in a
+ branch delay slot. If set, then cr05 contains the NPC.
+
+ * cr05 = enip. On exception, if the instruction pointed to by cr04
+ was in a delay slot as indicated by the bit 0 of cr04, aka the D
+ bit, the cr05 contains the NPC. Otherwise ignored.
+
+ * cr06 is invalid */
+
+/* Note that the Harris Unix kernels emulate the m88100's behavior on
+ the m88110. */
+
+#define SXIP_REGNUM 35 /* On m88100, Contains Shadow Execute
+ Instruction Pointer. */
+#define SNIP_REGNUM 36 /* On m88100, Contains Shadow Next
+ Instruction Pointer. */
+#define SFIP_REGNUM 37 /* On m88100, Contains Shadow Fetched
+ Intruction pointer. */
+
+#define EXIP_REGNUM 35 /* On m88110, Contains Exception
+ Executing Instruction Pointer. */
+#define ENIP_REGNUM 36 /* On m88110, Contains the Exception
+ Next Instruction Pointer. */
+
+#define PC_REGNUM SXIP_REGNUM /* Program Counter */
+#define NPC_REGNUM SNIP_REGNUM /* Next Program Counter */
+#define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
+
+#define PSR_REGNUM 32 /* Processor Status Register */
+#define FPSR_REGNUM 33 /* Floating Point Status Register */
+#define FPCR_REGNUM 34 /* Floating Point Control Register */
+#define XFP_REGNUM 38 /* First Extended Float Register */
+#define X0_REGNUM XFP_REGNUM /* Which also contains the constant zero */
+
+/* This is rather a confusing lie. Our m88k port using a stack pointer value
+ for the frame address. Hence, the frame address and the frame pointer are
+ only indirectly related. The value of this macro is the register number
+ fetched by the machine "independent" portions of gdb when they want to know
+ about a frame address. Thus, we lie here and claim that FP_REGNUM is
+ SP_REGNUM. */
+#define FP_REGNUM SP_REGNUM /* Reg fetched to locate frame when pgm stops */
+#define ACTUAL_FP_REGNUM 30
+
+/* PSR status bit definitions. */
+
+#define PSR_MODE 0x80000000
+#define PSR_BYTE_ORDER 0x40000000
+#define PSR_SERIAL_MODE 0x20000000
+#define PSR_CARRY 0x10000000
+#define PSR_SFU_DISABLE 0x000003f0
+#define PSR_SFU1_DISABLE 0x00000008
+#define PSR_MXM 0x00000004
+#define PSR_IND 0x00000002
+#define PSR_SFRZ 0x00000001
+
+
+
+/* The following two comments come from the days prior to the m88110
+ port. The m88110 handles the instruction pointers differently. I
+ do not know what any m88110 kernels do as the m88110 port I'm
+ working with is for an embedded system. rich@cygnus.com
+ 13-sept-93. */
+
+/* BCS requires that the SXIP_REGNUM (or PC_REGNUM) contain the
+ address of the next instr to be executed when a breakpoint occurs.
+ Because the kernel gets the next instr (SNIP_REGNUM), the instr in
+ SNIP needs to be put back into SFIP, and the instr in SXIP should
+ be shifted to SNIP */
+
+/* Are you sitting down? It turns out that the 88K BCS (binary
+ compatibility standard) folks originally felt that the debugger
+ should be responsible for backing up the IPs, not the kernel (as is
+ usually done). Well, they have reversed their decision, and in
+ future releases our kernel will be handling the backing up of the
+ IPs. So, eventually, we won't need to do the SHIFT_INST_REGS
+ stuff. But, for now, since there are 88K systems out there that do
+ need the debugger to do the IP shifting, and since there will be
+ systems where the kernel does the shifting, the code is a little
+ more complex than perhaps it needs to be (we still go inside
+ SHIFT_INST_REGS, and if the shifting hasn't occurred then gdb goes
+ ahead and shifts). */
+
+extern int target_is_m88110;
+#define SHIFT_INST_REGS() \
+if (!target_is_m88110) \
+{ \
+ CORE_ADDR pc = read_register (PC_REGNUM); \
+ CORE_ADDR npc = read_register (NPC_REGNUM); \
+ if (pc != npc) \
+ { \
+ write_register (NNPC_REGNUM, npc); \
+ write_register (NPC_REGNUM, pc); \
+ } \
+}
+
+ /* Storing the following registers is a no-op. */
+#define CANNOT_STORE_REGISTER(regno) (((regno) == R0_REGNUM) \
+ || ((regno) == X0_REGNUM))
+
+ /* Number of bytes of storage in the actual machine representation
+ for register N. On the m88k, the general purpose registers are 4
+ bytes and the 88110 extended registers are 10 bytes. */
+
+#define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 10)
+
+ /* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#define REGISTER_BYTES ((GP_REGS * REGISTER_RAW_SIZE(0)) \
+ + (FP_REGS * REGISTER_RAW_SIZE(XFP_REGNUM)))
+
+ /* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) (((N) * REGISTER_RAW_SIZE(0)) \
+ + ((N) >= XFP_REGNUM \
+ ? (((N) - XFP_REGNUM) \
+ * REGISTER_RAW_SIZE(XFP_REGNUM)) \
+ : 0))
+
+ /* Number of bytes of storage in the program's representation for
+ register N. On the m88k, all registers are 4 bytes excepting the
+ m88110 extended registers which are 8 byte doubles. */
+
+#define REGISTER_VIRTUAL_SIZE(N) ((N) < XFP_REGNUM ? 4 : 8)
+
+ /* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
+
+ /* Largest value REGISTER_VIRTUAL_SIZE can have.
+ Are FPS1, FPS2, FPR "virtual" regisers? */
+
+#define MAX_REGISTER_VIRTUAL_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
+
+ /* Nonzero if register N requires conversion
+ from raw format to virtual format. */
+
+#define REGISTER_CONVERTIBLE(N) ((N) >= XFP_REGNUM)
+
+#include "floatformat.h"
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ double val; \
+ floatformat_to_double (&floatformat_m88110_ext, (FROM), &val); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ floatformat_from_double (&floatformat_m88110_ext, &val, (TO)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+((N) >= XFP_REGNUM \
+ ? builtin_type_double \
+ : ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM \
+ ? lookup_pointer_type (builtin_type_void) : builtin_type_int))
+
+/* The 88k call/return conventions call for "small" values to be returned
+ into consecutive registers starting from r2. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy ((VALBUF), &(((char *)REGBUF)[REGISTER_BYTE(RV_REGNUM)]), TYPE_LENGTH (TYPE))
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (2*REGISTER_RAW_SIZE(0), (VALBUF), TYPE_LENGTH (TYPE))
+
+/* In COFF, if PCC says a parameter is a short or a char, do not
+ change it to int (it seems the convention is to change it). */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller. */
+
+extern CORE_ADDR frame_chain ();
+extern int frame_chain_valid ();
+extern int frameless_function_invocation ();
+
+#define FRAME_CHAIN(thisframe) \
+ frame_chain (thisframe)
+
+#define FRAMELESS_FUNCTION_INVOCATION(frame, fromleaf) \
+ fromleaf = frameless_function_invocation (frame)
+
+/* Define other aspects of the stack frame. */
+
+#define FRAME_SAVED_PC(FRAME) \
+ frame_saved_pc (FRAME)
+extern CORE_ADDR frame_saved_pc ();
+
+#define FRAME_ARGS_ADDRESS(fi) \
+ frame_args_address (fi)
+extern CORE_ADDR frame_args_address ();
+
+#define FRAME_LOCALS_ADDRESS(fi) \
+ frame_locals_address (fi)
+extern CORE_ADDR frame_locals_address ();
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) ((numargs) = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+/* On the 88k, parameter registers get stored into the so called "homing"
+ area. This *always* happens when you compiled with GCC and use -g.
+ Also, (with GCC and -g) the saving of the parameter register values
+ always happens right within the function prologue code, so these register
+ values can generally be relied upon to be already copied into their
+ respective homing slots by the time you will normally try to look at
+ them (we hope).
+
+ Note that homing area stack slots are always at *positive* offsets from
+ the frame pointer. Thus, the homing area stack slots for the parameter
+ registers (passed values) for a given function are actually part of the
+ frame area of the caller. This is unusual, but it should not present
+ any special problems for GDB.
+
+ Note also that on the 88k, we are only interested in finding the
+ registers that might have been saved in memory. This is a subset of
+ the whole set of registers because the standard calling sequence allows
+ the called routine to clobber many registers.
+
+ We could manage to locate values for all of the so called "preserved"
+ registers (some of which may get saved within any particular frame) but
+ that would require decoding all of the tdesc information. That would be
+ nice information for GDB to have, but it is not strictly manditory if we
+ can live without the ability to look at values within (or backup to)
+ previous frames.
+*/
+
+struct frame_saved_regs;
+struct frame_info;
+
+void frame_find_saved_regs PARAMS((struct frame_info *fi,
+ struct frame_saved_regs *fsr));
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ frame_find_saved_regs (frame_info, &frame_saved_regs)
+
+
+#define POP_FRAME pop_frame ()
+extern void pop_frame ();
+
+/* Call function stuff contributed by Kevin Buettner of Motorola. */
+
+#define CALL_DUMMY_LOCATION AFTER_TEXT_END
+
+extern void m88k_push_dummy_frame();
+#define PUSH_DUMMY_FRAME m88k_push_dummy_frame()
+
+#define CALL_DUMMY { \
+0x67ff00c0, /* 0: subu #sp,#sp,0xc0 */ \
+0x243f0004, /* 4: st #r1,#sp,0x4 */ \
+0x245f0008, /* 8: st #r2,#sp,0x8 */ \
+0x247f000c, /* c: st #r3,#sp,0xc */ \
+0x249f0010, /* 10: st #r4,#sp,0x10 */ \
+0x24bf0014, /* 14: st #r5,#sp,0x14 */ \
+0x24df0018, /* 18: st #r6,#sp,0x18 */ \
+0x24ff001c, /* 1c: st #r7,#sp,0x1c */ \
+0x251f0020, /* 20: st #r8,#sp,0x20 */ \
+0x253f0024, /* 24: st #r9,#sp,0x24 */ \
+0x255f0028, /* 28: st #r10,#sp,0x28 */ \
+0x257f002c, /* 2c: st #r11,#sp,0x2c */ \
+0x259f0030, /* 30: st #r12,#sp,0x30 */ \
+0x25bf0034, /* 34: st #r13,#sp,0x34 */ \
+0x25df0038, /* 38: st #r14,#sp,0x38 */ \
+0x25ff003c, /* 3c: st #r15,#sp,0x3c */ \
+0x261f0040, /* 40: st #r16,#sp,0x40 */ \
+0x263f0044, /* 44: st #r17,#sp,0x44 */ \
+0x265f0048, /* 48: st #r18,#sp,0x48 */ \
+0x267f004c, /* 4c: st #r19,#sp,0x4c */ \
+0x269f0050, /* 50: st #r20,#sp,0x50 */ \
+0x26bf0054, /* 54: st #r21,#sp,0x54 */ \
+0x26df0058, /* 58: st #r22,#sp,0x58 */ \
+0x26ff005c, /* 5c: st #r23,#sp,0x5c */ \
+0x271f0060, /* 60: st #r24,#sp,0x60 */ \
+0x273f0064, /* 64: st #r25,#sp,0x64 */ \
+0x275f0068, /* 68: st #r26,#sp,0x68 */ \
+0x277f006c, /* 6c: st #r27,#sp,0x6c */ \
+0x279f0070, /* 70: st #r28,#sp,0x70 */ \
+0x27bf0074, /* 74: st #r29,#sp,0x74 */ \
+0x27df0078, /* 78: st #r30,#sp,0x78 */ \
+0x63df0000, /* 7c: addu #r30,#sp,0x0 */ \
+0x145f0000, /* 80: ld #r2,#sp,0x0 */ \
+0x147f0004, /* 84: ld #r3,#sp,0x4 */ \
+0x149f0008, /* 88: ld #r4,#sp,0x8 */ \
+0x14bf000c, /* 8c: ld #r5,#sp,0xc */ \
+0x14df0010, /* 90: ld #r6,#sp,0x10 */ \
+0x14ff0014, /* 94: ld #r7,#sp,0x14 */ \
+0x151f0018, /* 98: ld #r8,#sp,0x18 */ \
+0x153f001c, /* 9c: ld #r9,#sp,0x1c */ \
+0x5c200000, /* a0: or.u #r1,#r0,0x0 */ \
+0x58210000, /* a4: or #r1,#r1,0x0 */ \
+0xf400c801, /* a8: jsr #r1 */ \
+0xf000d1ff /* ac: tb0 0x0,#r0,0x1ff */ \
+}
+
+#define CALL_DUMMY_START_OFFSET 0x80
+#define CALL_DUMMY_LENGTH 0xb0
+
+/* FIXME: byteswapping. */
+#define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ *(unsigned long *)((char *) (dummy) + 0xa0) |= \
+ (((unsigned long) (fun)) >> 16); \
+ *(unsigned long *)((char *) (dummy) + 0xa4) |= \
+ (((unsigned long) (fun)) & 0xffff); \
+ pc = text_end; \
+}
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls. */
+
+#define STACK_ALIGN(addr) (((addr) + 7) & -8)
+
+#define STORE_STRUCT_RETURN(addr, sp) \
+ write_register (SRA_REGNUM, (addr))
+
+#define NEED_TEXT_START_END 1
+
+/* According to the MC88100 RISC Microprocessor User's Manual, section
+ 6.4.3.1.2:
+
+ ... can be made to return to a particular instruction by placing a
+ valid instruction address in the SNIP and the next sequential
+ instruction address in the SFIP (with V bits set and E bits clear).
+ The rte resumes execution at the instruction pointed to by the
+ SNIP, then the SFIP.
+
+ The E bit is the least significant bit (bit 0). The V (valid) bit is
+ bit 1. This is why we logical or 2 into the values we are writing
+ below. It turns out that SXIP plays no role when returning from an
+ exception so nothing special has to be done with it. We could even
+ (presumably) give it a totally bogus value.
+
+ -- Kevin Buettner
+*/
+
+#define TARGET_WRITE_PC(val, pid) { \
+ write_register_pid(SXIP_REGNUM, (long) val, pid); \
+ write_register_pid(SNIP_REGNUM, (long) val | 2, pid); \
+ write_register_pid(SFIP_REGNUM, ((long) val | 2) + 4, pid); \
+}
diff --git a/gdb/config/m88k/xm-cxux.h b/gdb/config/m88k/xm-cxux.h
new file mode 100644
index 0000000..582c613
--- /dev/null
+++ b/gdb/config/m88k/xm-cxux.h
@@ -0,0 +1,66 @@
+/* Host-machine dependent parameters for Motorola 88000, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/xm-m88k.h"
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#if !defined (USG)
+#define USG 1
+#endif
+
+#include <sys/param.h>
+
+#define x_foff _x_x._x_offset
+#define x_fname _x_name
+#define USER ptrace_user
+/*
+#define _BSD_WAIT_FLAVOR
+*/
+
+#define HAVE_TERMIO
+
+#ifndef USIZE
+#define USIZE 2048
+#ifndef UPAGES
+#define UPAGES USIZE
+#endif
+#endif
+#define NBPG NBPC
+
+/* Get rid of any system-imposed stack limit if possible. */
+
+#define SET_STACK_LIMIT_HUGE
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+/* Since registers r0 through r31 are stored directly in the struct ptrace_user,
+ (for m88k BCS)
+ the ptrace_user offsets are sufficient and KERNEL_U_ADDRESS can be 0 */
+
+#define KERNEL_U_ADDR 0
+
+/* The CX/UX C compiler doesn't permit complex expressions as array bounds. */
+#define STRICT_ANSI_BOUNDS
+
+#define CORE_REGISTER_ADDR(regno, reg_ptr) \
+ m88k_harris_core_register_addr(regno, reg_ptr)
+
diff --git a/gdb/config/m88k/xm-delta88.h b/gdb/config/m88k/xm-delta88.h
new file mode 100644
index 0000000..2166947
--- /dev/null
+++ b/gdb/config/m88k/xm-delta88.h
@@ -0,0 +1,45 @@
+/* Host machine description for Motorola Delta 88 system, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1992
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/xm-m88k.h"
+
+#if !defined (USG)
+#define USG 1
+#endif
+
+#include <sys/param.h>
+#include <sys/time.h>
+
+#define HAVE_TERMIO
+
+/*#define USIZE 2048*/
+/*#define NBPG NBPC*/
+/* Might be defined in <sys/param.h>. I suspect this define was a relic
+ from before when BFD did core files. */
+/* #define UPAGES USIZE */
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+/* Since registers r0 through r31 are stored directly in the struct ptrace_user,
+ (for m88k BCS)
+ the ptrace_user offsets are sufficient and KERNEL_U_ADDRESS can be 0 */
+
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/m88k/xm-delta88v4.h b/gdb/config/m88k/xm-delta88v4.h
new file mode 100644
index 0000000..55c9e2d
--- /dev/null
+++ b/gdb/config/m88k/xm-delta88v4.h
@@ -0,0 +1,22 @@
+/* Host machine description for Motorola Delta 88 box, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/xm-m88k.h"
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/m88k/xm-dgux.h b/gdb/config/m88k/xm-dgux.h
new file mode 100644
index 0000000..b3608e7
--- /dev/null
+++ b/gdb/config/m88k/xm-dgux.h
@@ -0,0 +1,58 @@
+/* Host-machine dependent parameters for Motorola 88000, for GDB.
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "m88k/xm-m88k.h"
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#if !defined (USG)
+#define USG 1
+#endif
+
+#include <sys/param.h>
+
+#ifdef __GNUC__
+#define memcpy __builtin_memcpy
+/* gcc doesn't have this, at least not gcc 1.92. */
+/* #define memset __builtin_memset */
+#define strcmp __builtin_strcmp
+#endif
+
+#define x_foff _x_x._x_offset
+#define x_fname _x_name
+#define USER ptrace_user
+#define _BSD_WAIT_FLAVOR
+
+#define HAVE_TERMIO
+
+#ifndef USIZE
+#define USIZE 2048
+#endif
+#define NBPG NBPC
+#define UPAGES USIZE
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+/* Since registers r0 through r31 are stored directly in the struct ptrace_user,
+ (for m88k BCS)
+ the ptrace_user offsets are sufficient and KERNEL_U_ADDRESS can be 0 */
+
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/m88k/xm-m88k.h b/gdb/config/m88k/xm-m88k.h
new file mode 100644
index 0000000..35620a0
--- /dev/null
+++ b/gdb/config/m88k/xm-m88k.h
@@ -0,0 +1,20 @@
+/* Host-machine dependent parameters for Motorola 88000, for GDB.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
diff --git a/gdb/config/mips/bigmips.mt b/gdb/config/mips/bigmips.mt
new file mode 100644
index 0000000..38f03f2
--- /dev/null
+++ b/gdb/config/mips/bigmips.mt
@@ -0,0 +1,3 @@
+# Target: Big-endian MIPS machine such as Sony News
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-bigmips.h
diff --git a/gdb/config/mips/bigmips64.mt b/gdb/config/mips/bigmips64.mt
new file mode 100644
index 0000000..fcb7b21
--- /dev/null
+++ b/gdb/config/mips/bigmips64.mt
@@ -0,0 +1,3 @@
+# Target: Big-endian MIPS machine such as Sony News
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-bigmips64.h
diff --git a/gdb/config/mips/decstation.mh b/gdb/config/mips/decstation.mh
new file mode 100644
index 0000000..da417b2
--- /dev/null
+++ b/gdb/config/mips/decstation.mh
@@ -0,0 +1,5 @@
+# Host: Little-endian MIPS machine such as DECstation.
+XDEPFILES=
+XM_FILE= xm-mips.h
+NAT_FILE= nm-mips.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o mips-nat.o fork-child.o
diff --git a/gdb/config/mips/decstation.mt b/gdb/config/mips/decstation.mt
new file mode 100644
index 0000000..1984722
--- /dev/null
+++ b/gdb/config/mips/decstation.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian MIPS machine such as DECstation.
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mips.h
diff --git a/gdb/config/mips/embed.mt b/gdb/config/mips/embed.mt
new file mode 100644
index 0000000..42ab4aa
--- /dev/null
+++ b/gdb/config/mips/embed.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embed.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embed64.mt b/gdb/config/mips/embed64.mt
new file mode 100644
index 0000000..ed60fd2
--- /dev/null
+++ b/gdb/config/mips/embed64.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embed64.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embedl.mt b/gdb/config/mips/embedl.mt
new file mode 100644
index 0000000..0ed8b8d
--- /dev/null
+++ b/gdb/config/mips/embedl.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embedl.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embedl64.mt b/gdb/config/mips/embedl64.mt
new file mode 100644
index 0000000..28c41be
--- /dev/null
+++ b/gdb/config/mips/embedl64.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embedl64.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/irix3.mh b/gdb/config/mips/irix3.mh
new file mode 100644
index 0000000..311d697
--- /dev/null
+++ b/gdb/config/mips/irix3.mh
@@ -0,0 +1,6 @@
+# Host: SGI Iris running irix 3.x
+XDEPFILES=
+XM_FILE= xm-irix3.h
+NAT_FILE= nm-irix3.h
+NATDEPFILES= fork-child.o corelow.o infptrace.o inftarg.o mips-nat.o
+XM_CLIBS=-lbsd
diff --git a/gdb/config/mips/irix3.mt b/gdb/config/mips/irix3.mt
new file mode 100644
index 0000000..b3fa4dd
--- /dev/null
+++ b/gdb/config/mips/irix3.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 3
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix3.h
diff --git a/gdb/config/mips/irix4.mh b/gdb/config/mips/irix4.mh
new file mode 100644
index 0000000..68511e6
--- /dev/null
+++ b/gdb/config/mips/irix4.mh
@@ -0,0 +1,8 @@
+# Host: SGI Iris running irix 4.x
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-irix4.h
+NAT_FILE= nm-irix4.h
+NATDEPFILES= fork-child.o procfs.o irix4-nat.o corelow.o
+XM_CLIBS=-lbsd -lsun
+# use cc in K&R mode, bump up some static compiler tables.
+CC = cc -cckr -Wf,-XNg1500 -Wf,-XNk1000 -Wf,-XNh1100
diff --git a/gdb/config/mips/irix5.mh b/gdb/config/mips/irix5.mh
new file mode 100644
index 0000000..0e27686
--- /dev/null
+++ b/gdb/config/mips/irix5.mh
@@ -0,0 +1,6 @@
+# Host: SGI Iris running irix 5.x
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-irix5.h
+NAT_FILE= nm-irix5.h
+NATDEPFILES= fork-child.o procfs.o irix5-nat.o corelow.o
+XM_CLIBS=-lbsd -lsun
diff --git a/gdb/config/mips/irix5.mt b/gdb/config/mips/irix5.mt
new file mode 100644
index 0000000..5b17bcd
--- /dev/null
+++ b/gdb/config/mips/irix5.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 5
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix5.h
diff --git a/gdb/config/mips/littlemips.mh b/gdb/config/mips/littlemips.mh
new file mode 100644
index 0000000..103919d
--- /dev/null
+++ b/gdb/config/mips/littlemips.mh
@@ -0,0 +1,3 @@
+# Host: Little-endian MIPS machine such as DECstation.
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+XM_FILE= xm-mips.h
diff --git a/gdb/config/mips/littlemips.mt b/gdb/config/mips/littlemips.mt
new file mode 100644
index 0000000..1984722
--- /dev/null
+++ b/gdb/config/mips/littlemips.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian MIPS machine such as DECstation.
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mips.h
diff --git a/gdb/config/mips/mipsm3.mh b/gdb/config/mips/mipsm3.mh
new file mode 100644
index 0000000..e049d68
--- /dev/null
+++ b/gdb/config/mips/mipsm3.mh
@@ -0,0 +1,7 @@
+# Host: Little endian MIPS machine such as pmax
+# running Mach 3.0 operating system
+
+XDEPFILES= core-aout.o
+NATDEPFILES= mipsm3-nat.o m3-nat.o
+XM_FILE= xm-mipsm3.h
+NAT_FILE= ../nm-m3.h
diff --git a/gdb/config/mips/mipsm3.mt b/gdb/config/mips/mipsm3.mt
new file mode 100644
index 0000000..66856d1
--- /dev/null
+++ b/gdb/config/mips/mipsm3.mt
@@ -0,0 +1,4 @@
+# Target: Little-endian MIPS machine such as pmax
+# running Mach 3.0 operating system
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mipsm3.h
diff --git a/gdb/config/mips/mipsv4.mh b/gdb/config/mips/mipsv4.mh
new file mode 100644
index 0000000..87cb7e4
--- /dev/null
+++ b/gdb/config/mips/mipsv4.mh
@@ -0,0 +1,4 @@
+# Host: Mips running SVR4
+XM_FILE= xm-mipsv4.h
+NAT_FILE= ../nm-sysv4.h
+NATDEPFILES= fork-child.o procfs.o mipsv4-nat.o corelow.o core-regset.o solib.o
diff --git a/gdb/config/mips/mipsv4.mt b/gdb/config/mips/mipsv4.mt
new file mode 100644
index 0000000..6d3b47d
--- /dev/null
+++ b/gdb/config/mips/mipsv4.mt
@@ -0,0 +1,3 @@
+# Target: MIPS running SVR4
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mipsv4.h
diff --git a/gdb/config/mips/news-mips.mh b/gdb/config/mips/news-mips.mh
new file mode 100644
index 0000000..620fbaa
--- /dev/null
+++ b/gdb/config/mips/news-mips.mh
@@ -0,0 +1,4 @@
+# Host: Big-endian MIPS machine such as Sony News
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o mips-nat.o
+XM_FILE= xm-news-mips.h
+NAT_FILE= nm-news-mips.h
diff --git a/gdb/config/mips/nm-irix3.h b/gdb/config/mips/nm-irix3.h
new file mode 100644
index 0000000..3f4b064
--- /dev/null
+++ b/gdb/config/mips/nm-irix3.h
@@ -0,0 +1,37 @@
+/* Definitions for SGI irix3 native support.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Don't need special routines for Irix v3 -- we can use infptrace.c */
+#undef FETCH_INFERIOR_REGISTERS
+
+#define U_REGS_OFFSET 0
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
+
+/* Is this really true or is this just a leftover from a DECstation
+ config file? */
+
+#define ONE_PROCESS_WRITETEXT
diff --git a/gdb/config/mips/nm-irix4.h b/gdb/config/mips/nm-irix4.h
new file mode 100644
index 0000000..017695c
--- /dev/null
+++ b/gdb/config/mips/nm-irix4.h
@@ -0,0 +1,61 @@
+/* Definitions for native support of irix4.
+
+Copyright (C) 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Let's use /debug instead of all this dangerous mucking about
+ * with ptrace(), which seems *extremely* fragile, anyway.
+ */
+#define USE_PROC_FS
+#define CTL_PROC_NAME_FMT "/debug/%d"
+#define AS_PROC_NAME_FMT "/debug/%d"
+#define MAP_PROC_NAME_FMT "/debug/%d"
+#define STATUS_PROC_NAME_FMT "/debug/%d"
+
+/* Don't need special routines for the SGI -- we can use infptrace.c */
+#undef FETCH_INFERIOR_REGISTERS
+
+#define U_REGS_OFFSET 0
+
+/* Is this really true or is this just a leftover from a DECstation
+ config file? */
+
+#define ONE_PROCESS_WRITETEXT
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* Temporary new watchpoint stuff */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ ((type) == bp_hardware_watchpoint)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+ instruction which caused the watchpoint. It will be necessary for
+ GDB to step over the watchpoint. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ procfs_stopped_by_watchpoint(inferior_pid)
+extern int procfs_stopped_by_watchpoint PARAMS ((int));
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion. */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(addr, len, type) procfs_set_watchpoint (inferior_pid, addr, len, 2)
+#define target_remove_watchpoint(addr, len, type) procfs_set_watchpoint (inferior_pid, addr, 0, 0)
+extern int procfs_set_watchpoint PARAMS ((int, CORE_ADDR, int, int));
diff --git a/gdb/config/mips/nm-irix5.h b/gdb/config/mips/nm-irix5.h
new file mode 100644
index 0000000..90d454b
--- /dev/null
+++ b/gdb/config/mips/nm-irix5.h
@@ -0,0 +1,44 @@
+/* Definitions for native support of irix5.
+
+Copyright (C) 1993, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-sysv4.h"
+#undef IN_SOLIB_DYNSYM_RESOLVE_CODE
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* Temporary new watchpoint stuff */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ ((type) == bp_hardware_watchpoint)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+ instruction which caused the watchpoint. It will be necessary for
+ GDB to step over the watchpoint. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ procfs_stopped_by_watchpoint(inferior_pid)
+extern int procfs_stopped_by_watchpoint PARAMS ((int));
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion. */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(addr, len, type) procfs_set_watchpoint (inferior_pid, addr, len, 2)
+#define target_remove_watchpoint(addr, len, type) procfs_set_watchpoint (inferior_pid, addr, 0, 0)
+extern int procfs_set_watchpoint PARAMS ((int, CORE_ADDR, int, int));
diff --git a/gdb/config/mips/nm-mips.h b/gdb/config/mips/nm-mips.h
new file mode 100644
index 0000000..6418b86
--- /dev/null
+++ b/gdb/config/mips/nm-mips.h
@@ -0,0 +1,32 @@
+/* Native definitions for GDB on DECstations, Sony News. and MIPS Riscos systems
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+ Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target PARAMS ((CORE_ADDR *));
diff --git a/gdb/config/mips/nm-news-mips.h b/gdb/config/mips/nm-news-mips.h
new file mode 100644
index 0000000..1ab63ba
--- /dev/null
+++ b/gdb/config/mips/nm-news-mips.h
@@ -0,0 +1,42 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+ Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_NEWS_MIPS_H
+#define NM_NEWS_MIPS_H 1
+
+/* Needed for RISC NEWS core files. */
+#include <machine/machparam.h>
+#include <sys/types.h>
+#define KERNEL_U_ADDR UADDR
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ if (regno < 38) addr = (NBPG*UPAGES) + (regno - 38)*sizeof(int);\
+ else addr = 0; /* ..somewhere in the pcb */
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts. */
+#define ONE_PROCESS_WRITETEXT
+
+#include "mips/nm-mips.h"
+
+/* Apparently not in <sys/types.h> */
+typedef int pid_t;
+
+#endif /* NM_NEWS_MIPS_H */
diff --git a/gdb/config/mips/nm-riscos.h b/gdb/config/mips/nm-riscos.h
new file mode 100644
index 0000000..2d54345
--- /dev/null
+++ b/gdb/config/mips/nm-riscos.h
@@ -0,0 +1,59 @@
+/* This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* MIPS running RISC/os 4.52C. */
+
+#define PCB_OFFSET(FIELD) ((int)&((struct user*)0)->u_pcb.FIELD)
+
+/* RISC/os 5.0 defines this in machparam.h. */
+#include <bsd43/machine/machparam.h>
+#define NBPG BSD43_NBPG
+#define UPAGES BSD43_UPAGES
+
+/* Where is this used? I don't see any uses in mips-nat.c, and I don't think
+ the uses in infptrace.c are used if FETCH_INFERIOR_REGISTERS is defined.
+ Does the compiler react badly to "extern CORE_ADDR kernel_u_addr" (even
+ if never referenced)? */
+#define KERNEL_U_ADDR BSD43_UADDR
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ if (regno < FP0_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*((regno)+EF_AT-1); \
+ else if (regno < PC_REGNUM) \
+ addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
+ else if (regno == PS_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_SR; \
+ else if (regno == BADVADDR_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_BADVADDR; \
+ else if (regno == LO_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_MDLO; \
+ else if (regno == HI_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_MDHI; \
+ else if (regno == CAUSE_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_CAUSE; \
+ else if (regno == PC_REGNUM) \
+ addr = UPAGES*NBPG-EF_SIZE+4*EF_EPC; \
+ else if (regno < FCRCS_REGNUM) \
+ addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
+ else if (regno == FCRCS_REGNUM) \
+ addr = PCB_OFFSET(pcb_fpc_csr); \
+ else if (regno == FCRIR_REGNUM) \
+ addr = PCB_OFFSET(pcb_fpc_eir); \
+ else \
+ addr = 0;
+
+#include "mips/nm-mips.h"
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/mips/riscos.mh b/gdb/config/mips/riscos.mh
new file mode 100644
index 0000000..6a3192f
--- /dev/null
+++ b/gdb/config/mips/riscos.mh
@@ -0,0 +1,16 @@
+# Host: MIPS running RISC/os
+
+XM_FILE= xm-riscos.h
+
+NAT_FILE= nm-riscos.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o mips-nat.o
+
+MH_CFLAGS=-Wf,-XNh10000
+
+# ptrace(2) apparently has problems in the BSD environment. No workaround is
+# known except to select the sysv environment. Could we use /proc instead?
+# These "sysv environments" and "bsd environments" often end up being a pain.
+#
+# This is not part of CFLAGS because perhaps not all C compilers have this
+# option.
+CC= cc -systype sysv
diff --git a/gdb/config/mips/tm-bigmips.h b/gdb/config/mips/tm-bigmips.h
new file mode 100644
index 0000000..271ceb0
--- /dev/null
+++ b/gdb/config/mips/tm-bigmips.h
@@ -0,0 +1,21 @@
+/* Copyright (C) 1990 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
+
+#include "mips/tm-mips.h"
diff --git a/gdb/config/mips/tm-bigmips64.h b/gdb/config/mips/tm-bigmips64.h
new file mode 100644
index 0000000..8b255a5
--- /dev/null
+++ b/gdb/config/mips/tm-bigmips64.h
@@ -0,0 +1,23 @@
+/* Target machine parameters for MIPS r4000
+ Copyright 1994 Free Software Foundation, Inc.
+ Contributed by Ian Lance Taylor (ian@cygnus.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-embed.h b/gdb/config/mips/tm-embed.h
new file mode 100644
index 0000000..7bf1759
--- /dev/null
+++ b/gdb/config/mips/tm-embed.h
@@ -0,0 +1,49 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+
+#include "mips/tm-bigmips.h"
+
+#undef DEFAULT_MIPS_TYPE
+#define DEFAULT_MIPS_TYPE "r3051"
+
+/* Watchpoint support */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* Use these macros for watchpoint insertion/deletion. */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+
+#define target_insert_watchpoint(addr, len, type) \
+ remote_mips_set_watchpoint (addr, len, type)
+int remote_mips_set_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
+
+#define target_remove_watchpoint(addr, len, type) \
+ remote_mips_remove_watchpoint (addr, len, type)
+int remote_mips_remove_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
+
+/* We need to remove watchpoints when stepping, else we hit them again! */
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(w) remote_mips_stopped_by_watchpoint ()
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ remote_mips_can_use_hardware_watchpoint(cnt)
+int remote_mips_can_use_hardware_watchpoint PARAMS ((int cnt));
diff --git a/gdb/config/mips/tm-embed64.h b/gdb/config/mips/tm-embed64.h
new file mode 100644
index 0000000..df90f58
--- /dev/null
+++ b/gdb/config/mips/tm-embed64.h
@@ -0,0 +1,21 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-embedl.h b/gdb/config/mips/tm-embedl.h
new file mode 100644
index 0000000..23abcd9
--- /dev/null
+++ b/gdb/config/mips/tm-embedl.h
@@ -0,0 +1,21 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+
+#include "mips/tm-mips.h"
diff --git a/gdb/config/mips/tm-embedl64.h b/gdb/config/mips/tm-embedl64.h
new file mode 100644
index 0000000..c7dca19
--- /dev/null
+++ b/gdb/config/mips/tm-embedl64.h
@@ -0,0 +1,21 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-irix3.h b/gdb/config/mips/tm-irix3.h
new file mode 100644
index 0000000..7e8e53e
--- /dev/null
+++ b/gdb/config/mips/tm-irix3.h
@@ -0,0 +1,81 @@
+/* Target machine description for SGI Iris under Irix, for GDB.
+ Copyright 1990, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "mips/tm-bigmips.h"
+
+/* SGI's assembler doesn't grok dollar signs in identifiers.
+ So we use dots instead. This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Redefine register numbers for SGI. */
+
+#undef NUM_REGS
+#undef REGISTER_NAMES
+#undef FP0_REGNUM
+#undef PC_REGNUM
+#undef PS_REGNUM
+#undef HI_REGNUM
+#undef LO_REGNUM
+#undef CAUSE_REGNUM
+#undef BADVADDR_REGNUM
+#undef FCRCS_REGNUM
+#undef FCRIR_REGNUM
+
+/* Number of machine registers */
+
+#define NUM_REGS 71
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES \
+ { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
+ "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
+ "pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
+ }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
+#define PC_REGNUM 64 /* Contains program counter */
+#define CAUSE_REGNUM 65 /* describes last exception */
+#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
+#define HI_REGNUM 67 /* Multiple/divide temp */
+#define LO_REGNUM 68 /* ... */
+#define FCRCS_REGNUM 69 /* FP control/status */
+#define FCRIR_REGNUM 70 /* FP implementation/revision */
+
+/* Offsets for register values in _sigtramp frame.
+ sigcontext is immediately above the _sigtramp frame on Irix. */
+#define SIGFRAME_BASE 0x0
+#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
+#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
+#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 3 * 4 + 32 * 4 + 4)
diff --git a/gdb/config/mips/tm-irix5.h b/gdb/config/mips/tm-irix5.h
new file mode 100644
index 0000000..ad98e88
--- /dev/null
+++ b/gdb/config/mips/tm-irix5.h
@@ -0,0 +1,75 @@
+/* Target machine description for SGI Iris under Irix 5, for GDB.
+ Copyright 1990, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "mips/tm-irix3.h"
+
+#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
+/*
+ * Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
+ */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+ (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
+ ((N) < FP0_REGNUM + 32) ? \
+ FP0_REGNUM * MIPS_REGSIZE + \
+ ((N) - FP0_REGNUM) * sizeof(double) : \
+ 32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+ : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+ : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+ : builtin_type_int)
+
+#undef MIPS_LAST_ARG_REGNUM
+#define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
+
+#undef MIPS_NUM_ARG_REGS
+#define MIPS_NUM_ARG_REGS 8
+
+#endif /* N32 */
+
+/* When calling functions on Irix 5 (or any MIPS SVR4 ABI compliant
+ platform) $25 must hold the function address. Dest_Reg is a macro
+ used in CALL_DUMMY in tm-mips.h. */
+#undef Dest_Reg
+#define Dest_Reg 25
+
+/* The signal handler trampoline is called _sigtramp. */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
+ get to the saved PC (the register mask and status register are both
+ 32 bits) and then another 4 to get to the lower 32 bits. We skip
+ the same 4 bytes, plus the 8 bytes for the PC to get to the
+ registers, and add another 4 to get to the lower 32 bits. We skip
+ 8 bytes per register. */
+#undef SIGFRAME_PC_OFF
+#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
+#undef SIGFRAME_REGSAVE_OFF
+#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
+#undef SIGFRAME_FPREGSAVE_OFF
+#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
+#define SIGFRAME_REG_SIZE 8
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
new file mode 100644
index 0000000..6a7091a
--- /dev/null
+++ b/gdb/config/mips/tm-mips.h
@@ -0,0 +1,560 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
+ Free Software Foundation, Inc.
+ Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin (af@cs.cmu.edu) at CMU..
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_MIPS_H
+#define TM_MIPS_H 1
+
+#ifdef __STDC__
+struct frame_info;
+struct symbol;
+struct type;
+struct value;
+#endif
+
+#include <bfd.h>
+#include "coff/sym.h" /* Needed for PDR below. */
+#include "coff/symconst.h"
+
+#if !defined (TARGET_BYTE_ORDER_DEFAULT)
+#define TARGET_BYTE_ORDER_DEFAULT LITTLE_ENDIAN
+#endif
+
+#if !defined (GDB_TARGET_IS_MIPS64)
+#define GDB_TARGET_IS_MIPS64 0
+#endif
+
+#if !defined (MIPS_EABI)
+#define MIPS_EABI 0
+#endif
+
+#if !defined (TARGET_MONITOR_PROMPT)
+#define TARGET_MONITOR_PROMPT "<IDT>"
+#endif
+
+/* PC should be masked to remove possible MIPS16 flag */
+#if !defined (GDB_TARGET_MASK_DISAS_PC)
+#define GDB_TARGET_MASK_DISAS_PC(addr) UNMAKE_MIPS16_ADDR(addr)
+#endif
+#if !defined (GDB_TARGET_UNMASK_DISAS_PC)
+#define GDB_TARGET_UNMASK_DISAS_PC(addr) MAKE_MIPS16_ADDR(addr)
+#endif
+
+/* Floating point is IEEE compliant */
+#define IEEE_FLOAT
+
+/* The name of the usual type of MIPS processor that is in the target
+ system. */
+
+#define DEFAULT_MIPS_TYPE "generic"
+
+/* Remove useless bits from an instruction address. */
+
+#define ADDR_BITS_REMOVE(addr) mips_addr_bits_remove(addr)
+CORE_ADDR mips_addr_bits_remove PARAMS ((CORE_ADDR addr));
+
+/* Remove useless bits from the stack pointer. */
+
+#define TARGET_READ_SP() ADDR_BITS_REMOVE (read_register (SP_REGNUM))
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) pc = mips_skip_prologue (pc, 0)
+extern CORE_ADDR mips_skip_prologue PARAMS ((CORE_ADDR addr, int lenient));
+
+/* Return non-zero if PC points to an instruction which will cause a step
+ to execute both the instruction at PC and an instruction at PC+4. */
+extern int mips_step_skips_delay PARAMS ((CORE_ADDR));
+#define STEP_SKIPS_DELAY_P (1)
+#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) read_register(RA_REGNUM)
+
+/* Are we currently handling a signal */
+
+extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
+#define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name)
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define BIG_ENDIAN 4321
+
+/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
+ 16- or 32-bit breakpoint should be used. It returns a pointer
+ to a string of bytes that encode a breakpoint instruction, stores
+ the length of the string to *lenptr, and adjusts the pc (if necessary) to
+ point to the actual memory location where the breakpoint should be
+ inserted. */
+
+extern breakpoint_from_pc_fn mips_breakpoint_from_pc;
+#define BREAKPOINT_FROM_PC(pcptr, lenptr) mips_breakpoint_from_pc(pcptr, lenptr)
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* The size of a register. This is predefined in tm-mips64.h. We
+ can't use REGISTER_SIZE because that is used for various other
+ things. */
+
+#ifndef MIPS_REGSIZE
+#define MIPS_REGSIZE 4
+#endif
+
+/* The sizes of floating point registers. */
+
+#define MIPS_FPU_SINGLE_REGSIZE 4
+#define MIPS_FPU_DOUBLE_REGSIZE 8
+
+/* Number of machine registers */
+
+#ifndef NUM_REGS
+#define NUM_REGS 90
+#endif
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#ifndef REGISTER_NAMES
+#define REGISTER_NAMES \
+ { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
+ "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
+ "sr", "lo", "hi", "bad", "cause","pc", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
+ "fsr", "fir", "fp", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ }
+#endif
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define ZERO_REGNUM 0 /* read-only register, always 0 */
+#define V0_REGNUM 2 /* Function integer return value */
+#define A0_REGNUM 4 /* Loc of first arg during a subr call */
+#if MIPS_EABI
+# define MIPS_LAST_ARG_REGNUM 11 /* EABI uses R4 through R11 for args */
+# define MIPS_NUM_ARG_REGS 8
+#else
+# define MIPS_LAST_ARG_REGNUM 7 /* old ABI uses R4 through R7 for args */
+# define MIPS_NUM_ARG_REGS 4
+#endif
+#define T9_REGNUM 25 /* Contains address of callee in PIC */
+#define SP_REGNUM 29 /* Contains address of top of stack */
+#define RA_REGNUM 31 /* Contains return address value */
+#define PS_REGNUM 32 /* Contains processor status */
+#define HI_REGNUM 34 /* Multiple/divide temp */
+#define LO_REGNUM 33 /* ... */
+#define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */
+#define CAUSE_REGNUM 36 /* describes last exception */
+#define PC_REGNUM 37 /* Contains program counter */
+#define FP0_REGNUM 38 /* Floating point register 0 (single float) */
+#define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */
+#if MIPS_EABI /* EABI uses F12 through F19 for args */
+# define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+19)
+# define MIPS_NUM_FP_ARG_REGS 8
+#else /* old ABI uses F12 through F15 for args */
+# define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+15)
+# define MIPS_NUM_FP_ARG_REGS 4
+#endif
+#define FCRCS_REGNUM 70 /* FP control/status */
+#define FCRIR_REGNUM 71 /* FP implementation/revision */
+#define FP_REGNUM 72 /* Pseudo register that contains true address of executing stack frame */
+#define UNUSED_REGNUM 73 /* Never used, FIXME */
+#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
+#define PRID_REGNUM 89 /* Processor ID */
+#define LAST_EMBED_REGNUM 89 /* Last one */
+
+/* Define DO_REGISTERS_INFO() to do machine-specific formatting
+ of register dumps. */
+
+#define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
+extern void mips_do_registers_info PARAMS ((int, int));
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) REGISTER_VIRTUAL_SIZE(N)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type of data in
+ register N. */
+
+#ifndef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
+ : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+ : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+ : builtin_type_int)
+#endif
+
+/* All mips targets store doubles in a register pair with the least
+ significant register in the lower numbered register.
+ If the target is big endian, double register values need conversion
+ between memory and register formats. */
+
+#define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
+ do {if (TARGET_BYTE_ORDER == BIG_ENDIAN \
+ && REGISTER_RAW_SIZE (n) == 4 \
+ && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
+ && TYPE_CODE(type) == TYPE_CODE_FLT \
+ && TYPE_LENGTH(type) == 8) { \
+ char __temp[4]; \
+ memcpy (__temp, ((char *)(buffer))+4, 4); \
+ memcpy (((char *)(buffer))+4, (buffer), 4); \
+ memcpy (((char *)(buffer)), __temp, 4); }} while (0)
+
+#define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
+ do {if (TARGET_BYTE_ORDER == BIG_ENDIAN \
+ && REGISTER_RAW_SIZE (n) == 4 \
+ && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
+ && TYPE_CODE(type) == TYPE_CODE_FLT \
+ && TYPE_LENGTH(type) == 8) { \
+ char __temp[4]; \
+ memcpy (__temp, ((char *)(buffer))+4, 4); \
+ memcpy (((char *)(buffer))+4, (buffer), 4); \
+ memcpy (((char *)(buffer)), __temp, 4); }} while (0)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. Handled by mips_push_arguments. */
+
+#define STORE_STRUCT_RETURN(addr, sp) /**/
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. XXX floats */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ mips_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void
+mips_extract_return_value PARAMS ((struct type *, char [], char *));
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ mips_store_return_value(TYPE, VALBUF)
+extern void mips_store_return_value PARAMS ((struct type *, char *));
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+/* The address is passed in a0 upon entry to the function, but when
+ the function exits, the compiler has copied the value to v0. This
+ convention is specified by the System V ABI, so I think we can rely
+ on it. */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+ REGISTER_RAW_SIZE (V0_REGNUM)))
+
+extern use_struct_convention_fn mips_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) mips_use_struct_convention (gcc_p, type)
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+#define FRAME_CHAIN(thisframe) (CORE_ADDR) mips_frame_chain (thisframe)
+extern CORE_ADDR mips_frame_chain PARAMS ((struct frame_info *));
+
+/* Define other aspects of the stack frame. */
+
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+/* We handle this differently for mips, and maybe we should not */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;}
+
+/* Saved Pc. */
+
+#define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME))
+extern CORE_ADDR mips_frame_saved_pc PARAMS ((struct frame_info *));
+
+#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
+
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi))
+extern int mips_frame_num_args PARAMS ((struct frame_info *));
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_INIT_SAVED_REGS(frame_info) \
+ do { \
+ if ((frame_info)->saved_regs == NULL) \
+ mips_find_saved_regs (frame_info); \
+ (frame_info)->saved_regs[SP_REGNUM] = (frame_info)->frame; \
+ } while (0)
+extern void mips_find_saved_regs PARAMS ((struct frame_info *));
+
+
+/* Things needed for making the inferior call functions. */
+
+/* Stack must be aligned on 32-bit boundaries when synthesizing
+ function calls. We don't need STACK_ALIGN, PUSH_ARGUMENTS will
+ handle it. */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = mips_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+mips_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME mips_push_dummy_frame()
+extern void mips_push_dummy_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME mips_pop_frame()
+extern void mips_pop_frame PARAMS ((void));
+
+#define CALL_DUMMY { 0 }
+
+#define CALL_DUMMY_START_OFFSET (0)
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+/* On Irix, $t9 ($25) contains the address of the callee (used for PIC).
+ It doesn't hurt to do this on other systems; $t9 will be ignored. */
+#define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \
+ write_register(T9_REGNUM, fun)
+
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+
+#define CALL_DUMMY_ADDRESS() (mips_call_dummy_address ())
+extern CORE_ADDR mips_call_dummy_address PARAMS ((void));
+
+/* There's a mess in stack frame creation. See comments in blockframe.c
+ near reference to INIT_FRAME_PC_FIRST. */
+
+#define INIT_FRAME_PC(fromleaf, prev) /* nada */
+
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+ mips_init_frame_pc_first(fromleaf, prev)
+extern void mips_init_frame_pc_first PARAMS ((int, struct frame_info *));
+
+/* Special symbol found in blocks associated with routines. We can hang
+ mips_extra_func_info_t's off of this. */
+
+#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
+extern void ecoff_relocate_efi PARAMS ((struct symbol *, CORE_ADDR));
+
+/* Specific information about a procedure.
+ This overlays the MIPS's PDR records,
+ mipsread.c (ab)uses this to save memory */
+
+typedef struct mips_extra_func_info {
+ long numargs; /* number of args to procedure (was iopt) */
+ bfd_vma high_addr; /* upper address bound */
+ long frame_adjust; /* offset of FP from SP (used on MIPS16) */
+ PDR pdr; /* Procedure descriptor record */
+} *mips_extra_func_info_t;
+
+#define EXTRA_FRAME_INFO \
+ mips_extra_func_info_t proc_desc; \
+ int num_args;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
+extern void init_extra_frame_info PARAMS ((struct frame_info *));
+
+#define PRINT_EXTRA_FRAME_INFO(fi) \
+ { \
+ if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \
+ printf_filtered (" frame pointer is at %s+%d\n", \
+ REGISTER_NAME (fi->proc_desc->pdr.framereg), \
+ fi->proc_desc->pdr.frameoffset); \
+ }
+
+/* It takes two values to specify a frame on the MIPS.
+
+ In fact, the *PC* is the primary value that sets up a frame. The
+ PC is looked up to see what function it's in; symbol information
+ from that function tells us which register is the frame pointer
+ base, and what offset from there is the "virtual frame pointer".
+ (This is usually an offset from SP.) On most non-MIPS machines,
+ the primary value is the SP, and the PC, if needed, disambiguates
+ multiple functions with the same SP. But on the MIPS we can't do
+ that since the PC is not stored in the same part of the frame every
+ time. This does not seem to be a very clever way to set up frames,
+ but there is nothing we can do about that). */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
+
+/* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
+
+#define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-38)
+
+/* Convert a ecoff register number to a gdb REGNUM */
+
+#define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee.
+
+ For the mips chip, it appears that the debug info marks the parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are passed as doubles for the non-prototyped case and floats for
+ the prototyped case. Thus we choose to make the non-prototyped case work
+ for C and break the prototyped case, since the non-prototyped case is
+ probably much more common. (FIXME). */
+
+#define COERCE_FLOAT_TO_DOUBLE (current_language -> la_language == language_c)
+
+/* Select the default mips disassembler */
+
+#define TM_PRINT_INSN_MACH 0
+
+
+/* These are defined in mdebugread.c and are used in mips-tdep.c */
+extern CORE_ADDR sigtramp_address, sigtramp_end;
+extern void fixup_sigtramp PARAMS ((void));
+
+/* Defined in mips-tdep.c and used in remote-mips.c */
+extern char *mips_read_processor_type PARAMS ((void));
+
+/* Functions for dealing with MIPS16 call and return stubs. */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) mips_in_call_stub (pc, name)
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) mips_in_return_stub (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc) mips_skip_stub (pc)
+#define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc)
+extern int mips_in_call_stub PARAMS ((CORE_ADDR pc, char *name));
+extern int mips_in_return_stub PARAMS ((CORE_ADDR pc, char *name));
+extern CORE_ADDR mips_skip_stub PARAMS ((CORE_ADDR pc));
+extern int mips_ignore_helper PARAMS ((CORE_ADDR pc));
+
+#ifndef TARGET_MIPS
+#define TARGET_MIPS
+#endif
+
+/* Definitions and declarations used by mips-tdep.c and remote-mips.c */
+#define MIPS_INSTLEN 4 /* Length of an instruction */
+#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16*/
+#define MIPS_NUMREGS 32 /* Number of integer or float registers */
+typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
+
+/* MIPS16 function addresses are odd (bit 0 is set). Here are some
+ macros to test, set, or clear bit 0 of addresses. */
+#define IS_MIPS16_ADDR(addr) ((addr) & 1)
+#define MAKE_MIPS16_ADDR(addr) ((addr) | 1)
+#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
+
+#endif /* TM_MIPS_H */
+
+/* Macros for setting and testing a bit in a minimal symbol that
+ marks it as 16-bit function. The MSB of the minimal symbol's
+ "info" field is used for this purpose. This field is already
+ being used to store the symbol size, so the assumption is
+ that the symbol size cannot exceed 2^31.
+
+ ELF_MAKE_MSYMBOL_SPECIAL
+ tests whether an ELF symbol is "special", i.e. refers
+ to a 16-bit function, and sets a "special" bit in a
+ minimal symbol to mark it as a 16-bit function
+ MSYMBOL_IS_SPECIAL tests the "special" bit in a minimal symbol
+ MSYMBOL_SIZE returns the size of the minimal symbol, i.e.
+ the "info" field with the "special" bit masked out
+*/
+
+#define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
+ { \
+ if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16) { \
+ MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000); \
+ SYMBOL_VALUE_ADDRESS (msym) |= 1; \
+ } \
+ }
+
+#define MSYMBOL_IS_SPECIAL(msym) \
+ (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
+#define MSYMBOL_SIZE(msym) \
+ ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h
new file mode 100644
index 0000000..56a8927
--- /dev/null
+++ b/gdb/config/mips/tm-mips64.h
@@ -0,0 +1,54 @@
+/* Target machine parameters for MIPS r4000
+ Copyright 1994, 1996 Free Software Foundation, Inc.
+ Contributed by Ian Lance Taylor (ian@cygnus.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDB_TARGET_IS_MIPS64 1
+
+/* Use eight byte registers. */
+#define MIPS_REGSIZE 8
+
+/* define 8 byte register type */
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+ : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+ : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+ : builtin_type_long_long)
+
+/* Load double words in CALL_DUMMY. */
+#define OP_LDFPR 065 /* ldc1 */
+#define OP_LDGPR 067 /* ld */
+
+#if defined(MIPS_EABI) && (MIPS_EABI != 0)
+/* Define sizes for 64-bit data types, allow specific targets to override
+ these values. Doing so may violate the strict EABI, but it's necessary
+ for some MIPS III and MIPS IV machines that want 64bit longs, but 32bit
+ pointers. */
+#ifndef TARGET_LONG_BIT
+#define TARGET_LONG_BIT 64
+#endif
+#ifndef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 64
+#endif
+#ifndef TARGET_PTR_BIT
+#define TARGET_PTR_BIT 64
+#endif
+#endif /* MIPS_EABI */
+
+/* Get the basic MIPS definitions. */
+#include "tm-mips.h"
diff --git a/gdb/config/mips/tm-mipsm3.h b/gdb/config/mips/tm-mipsm3.h
new file mode 100644
index 0000000..f736604
--- /dev/null
+++ b/gdb/config/mips/tm-mipsm3.h
@@ -0,0 +1,66 @@
+/* Definitions to make GDB run on a mips box under Mach 3.0
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Mach specific definitions for little endian mips (e.g. pmax)
+ * running Mach 3.0
+ *
+ * Author: Jukka Virtanen <jtv@hut.fi>
+ */
+
+/* Include common definitions for Mach3 systems */
+#include "nm-m3.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+
+/* From mk/user/threads/mips/csw.s */
+#define SAVED_FP (12*4)
+#define SAVED_PC (13*4)
+#define SAVED_BYTES (14*4)
+
+/* Using these, define our offsets to items strored in
+ * cproc_switch in csw.s
+ */
+#define MACHINE_CPROC_SP_OFFSET SAVED_BYTES
+#define MACHINE_CPROC_PC_OFFSET SAVED_PC
+#define MACHINE_CPROC_FP_OFFSET SAVED_FP
+
+/* Thread flavors used in setting the Trace state.
+ *
+ * In <mach/machine/thread_status.h>
+ */
+#define TRACE_FLAVOR MIPS_EXC_STATE
+#define TRACE_FLAVOR_SIZE MIPS_EXC_STATE_COUNT
+#define TRACE_SET(x,state) ((struct mips_exc_state *)state)->cause = EXC_SST;
+#define TRACE_CLEAR(x,state) 0
+
+/* Mach supports attach/detach */
+#define ATTACH_DETACH 1
+
+#include "mips/tm-mips.h"
+
+/* Address of end of user stack space.
+ * for MACH, see <machine/vmparam.h>
+ */
+#undef STACK_END_ADDR
+#define STACK_END_ADDR USRSTACK
+
+/* Output registers in tabular format */
+#define TABULAR_REGISTER_OUTPUT
diff --git a/gdb/config/mips/tm-mipsv4.h b/gdb/config/mips/tm-mipsv4.h
new file mode 100644
index 0000000..dd7aaa1
--- /dev/null
+++ b/gdb/config/mips/tm-mipsv4.h
@@ -0,0 +1,45 @@
+/* Target machine description for MIPS running SVR4, for GDB.
+ Copyright 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "mips/tm-bigmips.h"
+#include "tm-sysv4.h"
+
+/* When calling functions on a MIPS SVR4 ABI compliant platform
+ $25 must hold the function address. Dest_Reg is a macro
+ used in CALL_DUMMY in tm-mips.h. */
+#undef Dest_Reg
+#define Dest_Reg 25
+
+/* The signal handler trampoline is called _sigtramp. */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* On entry to the signal handler trampoline, an ucontext is already
+ pushed on the stack. We can get at the saved registers via the
+ mcontext which is contained within the ucontext. */
+#define SIGFRAME_BASE 0
+#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 40)
+#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 40 + 35 * 4)
+#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 40 + 36 * 4)
+
+/* Use the alternate method of determining valid frame chains. */
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+/* Convert a DWARF register number to a gdb REGNUM. */
+#define DWARF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
diff --git a/gdb/config/mips/tm-tx39.h b/gdb/config/mips/tm-tx39.h
new file mode 100644
index 0000000..ee99a28
--- /dev/null
+++ b/gdb/config/mips/tm-tx39.h
@@ -0,0 +1,39 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define MIPS_EABI 1
+#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
+
+#include "mips/tm-bigmips.h"
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+ { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
+ "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
+ "sr", "lo", "hi", "bad", "cause","pc", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "config", "cache", "debug", "depc", "epc", "" \
+ }
diff --git a/gdb/config/mips/tm-tx39l.h b/gdb/config/mips/tm-tx39l.h
new file mode 100644
index 0000000..8ceec72
--- /dev/null
+++ b/gdb/config/mips/tm-tx39l.h
@@ -0,0 +1,39 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define MIPS_EABI 1
+#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
+
+#include "mips/tm-mips.h"
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+ { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
+ "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
+ "sr", "lo", "hi", "bad", "cause","pc", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "config", "cache", "debug", "depc", "epc", "" \
+ }
diff --git a/gdb/config/mips/tm-vr4100.h b/gdb/config/mips/tm-vr4100.h
new file mode 100644
index 0000000..843f49c
--- /dev/null
+++ b/gdb/config/mips/tm-vr4100.h
@@ -0,0 +1,25 @@
+/* Copyright (C) 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define MIPS_EABI 1
+#define MIPS_DEFAULT_FPU_TYPE MIPS_FPU_NONE
+#define TARGET_MONITOR_PROMPT "<RISQ> "
+#define TARGET_PTR_BIT 64
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr4300.h b/gdb/config/mips/tm-vr4300.h
new file mode 100644
index 0000000..541ca44
--- /dev/null
+++ b/gdb/config/mips/tm-vr4300.h
@@ -0,0 +1,22 @@
+/* Copyright (C) 1993, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define TARGET_MONITOR_PROMPT "<RISQ> "
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr4300el.h b/gdb/config/mips/tm-vr4300el.h
new file mode 100644
index 0000000..75e8693
--- /dev/null
+++ b/gdb/config/mips/tm-vr4300el.h
@@ -0,0 +1,22 @@
+/* Copyright (C) 1993, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define TARGET_MONITOR_PROMPT "<RISQ> "
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-vr5000.h b/gdb/config/mips/tm-vr5000.h
new file mode 100644
index 0000000..b834a77
--- /dev/null
+++ b/gdb/config/mips/tm-vr5000.h
@@ -0,0 +1,23 @@
+/* Copyright (C) 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define TARGET_MONITOR_PROMPT "<RISQ> "
+#define MIPS_EABI 1
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr5000el.h b/gdb/config/mips/tm-vr5000el.h
new file mode 100644
index 0000000..c6897d1
--- /dev/null
+++ b/gdb/config/mips/tm-vr5000el.h
@@ -0,0 +1,23 @@
+/* Copyright (C) 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+#define TARGET_MONITOR_PROMPT "<RISQ> "
+#define MIPS_EABI 1
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-vxmips.h b/gdb/config/mips/tm-vxmips.h
new file mode 100644
index 0000000..392a929
--- /dev/null
+++ b/gdb/config/mips/tm-vxmips.h
@@ -0,0 +1,31 @@
+/* Target machine description for VxWorks MIPS's, for GDB, the GNU debugger.
+ Copyright 1996 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".vxgdbinit"
+
+#define DEFAULT_PROMPT "(vxgdb) "
+
+#include "mips/tm-mips.h"
+
+/* FIXME: These are almost certainly wrong. */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
diff --git a/gdb/config/mips/tx39.mt b/gdb/config/mips/tx39.mt
new file mode 100644
index 0000000..8b4c1a9
--- /dev/null
+++ b/gdb/config/mips/tx39.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o dve3900-rom.o monitor.o dsrec.o
+TM_FILE= tm-tx39.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/tx39l.mt b/gdb/config/mips/tx39l.mt
new file mode 100644
index 0000000..3508329
--- /dev/null
+++ b/gdb/config/mips/tx39l.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o dve3900-rom.o monitor.o dsrec.o
+TM_FILE= tm-tx39l.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4100.mt b/gdb/config/mips/vr4100.mt
new file mode 100644
index 0000000..c5ae4f9
--- /dev/null
+++ b/gdb/config/mips/vr4100.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4100.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4300.mt b/gdb/config/mips/vr4300.mt
new file mode 100644
index 0000000..22cb25e
--- /dev/null
+++ b/gdb/config/mips/vr4300.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4300.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4300el.mt b/gdb/config/mips/vr4300el.mt
new file mode 100644
index 0000000..cff7241
--- /dev/null
+++ b/gdb/config/mips/vr4300el.mt
@@ -0,0 +1,5 @@
+# Target: Little-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4300el.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr5000.mt b/gdb/config/mips/vr5000.mt
new file mode 100644
index 0000000..316c548
--- /dev/null
+++ b/gdb/config/mips/vr5000.mt
@@ -0,0 +1,7 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr5000.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
+GDBSERVER_DEPFILES= low-sim.o
+GDBSERVER_LIBS = ../../sim/mips/libsim.a ../../bfd/libbfd.a ../../libiberty/libiberty.a -lm
diff --git a/gdb/config/mips/vr5000el.mt b/gdb/config/mips/vr5000el.mt
new file mode 100644
index 0000000..99687ed
--- /dev/null
+++ b/gdb/config/mips/vr5000el.mt
@@ -0,0 +1,5 @@
+# Target: Little-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr5000el.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vxmips.mt b/gdb/config/mips/vxmips.mt
new file mode 100644
index 0000000..a20cf96
--- /dev/null
+++ b/gdb/config/mips/vxmips.mt
@@ -0,0 +1,3 @@
+# Target: MIPS running VxWorks
+TDEPFILES= mips-tdep.o remote-vx.o remote-vxmips.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vxmips.h
diff --git a/gdb/config/mips/xm-irix3.h b/gdb/config/mips/xm-irix3.h
new file mode 100644
index 0000000..d096594
--- /dev/null
+++ b/gdb/config/mips/xm-irix3.h
@@ -0,0 +1,31 @@
+/* Copyright (C) 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is for the iris. */
+
+#define HAVE_TERMIO
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Override register locations in upage for SGI machines */
+#undef REGISTER_U_ADDR
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ if (regno < PC_REGNUM) \
+ addr = regno; \
+ else \
+ addr = regno + NSIG_HNDLRS; /* Skip over signal handlers */
diff --git a/gdb/config/mips/xm-irix4.h b/gdb/config/mips/xm-irix4.h
new file mode 100644
index 0000000..14d21f0
--- /dev/null
+++ b/gdb/config/mips/xm-irix4.h
@@ -0,0 +1,33 @@
+/* Definitions for irix4 hosting support.
+
+Copyright (C) 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is for the iris. */
+
+#include "mips/xm-irix3.h"
+
+#define BROKEN_SIGINFO_H /* <sys/siginfo.h> si_pid & si_uid are bogus */
+
+/* Irix 4.0.1 and later have termios. Not sure about earlier versions. */
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* This enables reliable signals (and the associated setjmp/longjmp), and gives
+ bsdish prototypes for getpgrp/setpgrg/setgroups and initgroups. */
+#define _BSD_COMPAT
diff --git a/gdb/config/mips/xm-irix5.h b/gdb/config/mips/xm-irix5.h
new file mode 100644
index 0000000..a64277b
--- /dev/null
+++ b/gdb/config/mips/xm-irix5.h
@@ -0,0 +1,35 @@
+/* Definitions for irix5 hosting support.
+
+Copyright (C) 1993, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "xm-sysv4.h"
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Override register locations in upage for SGI machines */
+#undef REGISTER_U_ADDR
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ if (regno < PC_REGNUM) \
+ addr = regno; \
+ else \
+ addr = regno + NSIG_HNDLRS; /* Skip over signal handlers */
+
+/* This enables reliable signals (and the associated setjmp/longjmp), and gives
+ bsdish prototypes for getpgrp/setpgrg/setgroups and initgroups. */
+#define _BSD_COMPAT
diff --git a/gdb/config/mips/xm-mips.h b/gdb/config/mips/xm-mips.h
new file mode 100644
index 0000000..a2e9a50
--- /dev/null
+++ b/gdb/config/mips/xm-mips.h
@@ -0,0 +1,61 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+ Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+#ifdef ultrix
+/* Needed for DECstation core files. */
+#include <machine/param.h>
+#define KERNEL_U_ADDR UADDR
+
+/* Native Ultrix cc has broken long long support. */
+#ifndef __GNUC__
+#undef CC_HAS_LONG_LONG
+#endif
+#endif
+
+#if ! defined (__STDC__) && ! defined (offsetof)
+# define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
+#endif
+
+/* Only used for core files on DECstations.
+ First four registers at u.u_ar0 are saved arguments, and
+ there is no r0 saved. Float registers are saved
+ in u_pcb.pcb_fpregs, not relative to u.u_ar0. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ { \
+ if (regno < FP0_REGNUM) \
+ addr = blockend + sizeof(int) * (4 + regno - 1); \
+ else \
+ addr = offsetof (struct user, u_pcb.pcb_fpregs[0]) + \
+ sizeof (int) * (regno - FP0_REGNUM); \
+ }
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts. */
+#define ONE_PROCESS_WRITETEXT
+
+/* HAVE_SGTTY also works, last we tried.
+
+ But we have termios, at least as of Ultrix 4.2A, so use it. */
+#define HAVE_TERMIOS
diff --git a/gdb/config/mips/xm-mipsm3.h b/gdb/config/mips/xm-mipsm3.h
new file mode 100644
index 0000000..6a5a73c
--- /dev/null
+++ b/gdb/config/mips/xm-mipsm3.h
@@ -0,0 +1,32 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+ Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+#define KERNEL_U_ADDR 0 /* Not needed. */
+
+/* Only used for core files on DECstations. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ if (regno < 38) addr = (NBPG*UPAGES) + (regno - 38)*sizeof(int);\
+ else addr = 0; /* ..somewhere in the pcb */
diff --git a/gdb/config/mips/xm-mipsv4.h b/gdb/config/mips/xm-mipsv4.h
new file mode 100644
index 0000000..d80ba43
--- /dev/null
+++ b/gdb/config/mips/xm-mipsv4.h
@@ -0,0 +1,23 @@
+/* Definitions for MIPS running SVR4 hosting support.
+
+Copyright (C) 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "xm-sysv4.h"
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
diff --git a/gdb/config/mips/xm-news-mips.h b/gdb/config/mips/xm-news-mips.h
new file mode 100644
index 0000000..06aac1a
--- /dev/null
+++ b/gdb/config/mips/xm-news-mips.h
@@ -0,0 +1,24 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+ Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
+ Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+ and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER BIG_ENDIAN
+#endif
diff --git a/gdb/config/mips/xm-riscos.h b/gdb/config/mips/xm-riscos.h
new file mode 100644
index 0000000..467f32a
--- /dev/null
+++ b/gdb/config/mips/xm-riscos.h
@@ -0,0 +1,28 @@
+/* Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HAVE_TERMIO
+
+#if !defined (HOST_BYTE_ORDER)
+#define HOST_BYTE_ORDER BIG_ENDIAN
+#endif
+
+#define USG 1
+
+/* setjmp.h requires uid_t. */
+#include <sys/types.h>
diff --git a/gdb/config/mn10200/mn10200.mt b/gdb/config/mn10200/mn10200.mt
new file mode 100644
index 0000000..c85a2fb
--- /dev/null
+++ b/gdb/config/mn10200/mn10200.mt
@@ -0,0 +1,6 @@
+# Target: Matsushita mn10200
+TDEPFILES= mn10200-tdep.o
+TM_FILE= tm-mn10200.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/mn10200/libsim.a
diff --git a/gdb/config/mn10200/tm-mn10200.h b/gdb/config/mn10200/tm-mn10200.h
new file mode 100644
index 0000000..671b534
--- /dev/null
+++ b/gdb/config/mn10200/tm-mn10200.h
@@ -0,0 +1,212 @@
+/* Parameters for execution on a Matsushita mn10200 processor.
+ Copyright 1997 Free Software Foundation, Inc.
+
+ Contributed by Geoffrey Noer <noer@cygnus.com>
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The mn10200 is little endian. */
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* ints are only 16bits on the mn10200. */
+#undef TARGET_INT_BIT
+#define TARGET_INT_BIT 16
+
+/* The mn10200 doesn't support long long types. */
+#undef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 32
+
+/* The mn10200 doesn't support double or long double either. */
+#undef TARGET_DOUBLE_BIT
+#undef TARGET_LONG_DOUBLE_BIT
+#define TARGET_DOUBLE_BIT 32
+#define TARGET_LONG_DOUBLE_BIT 32
+
+/* Not strictly correct, but the machine independent code is not
+ ready to handle any of the basic sizes not being a power of two. */
+#undef TARGET_PTR_BIT
+#define TARGET_PTR_BIT 32
+
+/* The mn10200 really has 24 bit registers but the simulator reads/writes
+ them as 32bit values, so we claim they're 32bits each. This may have
+ to be tweaked if the Matsushita emulator/board really deals with them
+ as 24bits each. */
+#define REGISTER_SIZE 4
+
+#define MAX_REGISTER_RAW_SIZE REGISTER_SIZE
+#define NUM_REGS 11
+
+#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
+
+#define REGISTER_NAMES \
+{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \
+ "pc", "mdr", "psw"}
+
+#define FP_REGNUM 6
+#define SP_REGNUM 7
+#define PC_REGNUM 8
+#define MDR_REGNUM 9
+#define PSW_REGNUM 10
+
+/* Treat the registers as 32bit values. */
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long
+
+#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
+#define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE
+#define REGISTER_RAW_SIZE(REG) REGISTER_SIZE
+
+#define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE
+
+/* The breakpoint instruction must be the same size as te smallest
+ instruction in the instruction set.
+
+ The Matsushita mn10x00 processors have single byte instructions
+ so we need a single byte breakpoint. Matsushita hasn't defined
+ one, so we defined it ourselves.
+
+ 0xff is the only available single byte insn left on the mn10200. */
+#define BREAKPOINT {0xff}
+
+#define FUNCTION_START_OFFSET 0
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Stacks grow the normal way. */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff)
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+#define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size;
+
+extern void mn10200_init_extra_frame_info PARAMS ((struct frame_info *));
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi)
+#define INIT_FRAME_PC(x,y)
+
+extern void mn10200_frame_find_saved_regs PARAMS ((struct frame_info *,
+ struct frame_saved_regs *));
+#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
+
+extern CORE_ADDR mn10200_frame_chain PARAMS ((struct frame_info *));
+#define FRAME_CHAIN(fi) mn10200_frame_chain (fi)
+#define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR mn10200_find_callers_reg PARAMS ((struct frame_info *, int));
+extern CORE_ADDR mn10200_frame_saved_pc PARAMS ((struct frame_info *));
+#define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+ { \
+ if (TYPE_LENGTH (TYPE) > 8) \
+ abort (); \
+ else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
+ { \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \
+ memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \
+ } \
+ else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
+ { \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
+ } \
+ else \
+ { \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \
+ } \
+ }
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (4), \
+ REGISTER_RAW_SIZE (4))
+
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+ { \
+ if (TYPE_LENGTH (TYPE) > 8) \
+ abort (); \
+ else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
+ { \
+ write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \
+ write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \
+ } \
+ else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
+ { \
+ write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
+ } \
+ else \
+ { \
+ write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \
+ } \
+ }
+
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
+ (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP)
+
+extern CORE_ADDR mn10200_skip_prologue PARAMS ((CORE_ADDR));
+#define SKIP_PROLOGUE(pc) pc = mn10200_skip_prologue (pc)
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_NUM_ARGS(val, fi) ((val) = -1)
+
+extern void mn10200_pop_frame PARAMS ((struct frame_info *));
+#define POP_FRAME mn10200_pop_frame (get_current_frame ())
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+
+extern CORE_ADDR mn10200_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+#define PUSH_RETURN_ADDRESS(PC, SP) mn10200_push_return_address (PC, SP)
+
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+extern CORE_ADDR
+mn10200_push_arguments PARAMS ((int, struct value **, CORE_ADDR,
+ unsigned char, CORE_ADDR));
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
+ (TYPE_LENGTH (TYPE) > 8)
+
+extern use_struct_convention_fn mn10200_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE)
+
+/* Override the default get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames. */
+#define GET_SAVED_REGISTER
+
+/* Define this for Wingdb */
+#define TARGET_MN10200
diff --git a/gdb/config/mn10300/mn10300.mt b/gdb/config/mn10300/mn10300.mt
new file mode 100644
index 0000000..fc503bd
--- /dev/null
+++ b/gdb/config/mn10300/mn10300.mt
@@ -0,0 +1,6 @@
+# Target: Matsushita mn10300
+TDEPFILES= mn10300-tdep.o
+TM_FILE= tm-mn10300.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/mn10300/libsim.a
diff --git a/gdb/config/mn10300/tm-mn10300.h b/gdb/config/mn10300/tm-mn10300.h
new file mode 100644
index 0000000..e7d3fd7
--- /dev/null
+++ b/gdb/config/mn10300/tm-mn10300.h
@@ -0,0 +1,165 @@
+/* Parameters for execution on a Matsushita mn10300 processor.
+ Copyright 1996, 1997 Free Software Foundation, Inc.
+
+ Contributed by Geoffrey Noer <noer@cygnus.com>
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The mn10300 is little endian. */
+#define TARGET_BYTE_ORDER_DEFAULT LITTLE_ENDIAN
+
+/* All registers are 32bits (phew!). */
+#define REGISTER_SIZE 4
+#define MAX_REGISTER_RAW_SIZE 4
+#define NUM_REGS 32
+
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+#define REGISTER_BYTE(REG) ((REG) * 4)
+#define REGISTER_VIRTUAL_SIZE(REG) 4
+#define REGISTER_RAW_SIZE(REG) 4
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
+
+extern char **mn10300_register_names;
+#define REGISTER_NAME(i) mn10300_register_names[i]
+
+#define D2_REGNUM 2
+#define D3_REGNUM 3
+#define A2_REGNUM 6
+#define A3_REGNUM 7
+#define SP_REGNUM 8
+#define PC_REGNUM 9
+#define MDR_REGNUM 10
+#define PSW_REGNUM 11
+#define LIR_REGNUM 12
+#define LAR_REGNUM 13
+
+/* Pseudo register that contains true address of executing stack frame */
+#define FP_REGNUM 31
+
+/* BREAKPOINT_FROM_PC uses the program counter value to determine the
+ breakpoint that should be used */
+extern breakpoint_from_pc_fn mn10300_breakpoint_from_pc;
+#define BREAKPOINT_FROM_PC(pcptr, lenptr) mn10300_breakpoint_from_pc (pcptr, lenptr)
+
+#define FUNCTION_START_OFFSET 0
+
+#define DECR_PC_AFTER_BREAK 0
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ read_memory_integer (read_register (SP_REGNUM), 4)
+
+#ifdef __STDC__
+struct frame_info;
+struct type;
+struct value;
+#endif
+
+extern void mn10300_init_extra_frame_info PARAMS ((struct frame_info *));
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10300_init_extra_frame_info (fi)
+#define INIT_FRAME_PC /* Not necessary */
+
+#define FRAME_INIT_SAVED_REGS(fi) /* handled by init_extra_frame_info */
+
+extern CORE_ADDR mn10300_frame_chain PARAMS ((struct frame_info *));
+#define FRAME_CHAIN(fi) mn10300_frame_chain (fi)
+#define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR mn10300_find_callers_reg PARAMS ((struct frame_info *, int));
+extern CORE_ADDR mn10300_frame_saved_pc PARAMS ((struct frame_info *));
+#define FRAME_SAVED_PC(FI) (mn10300_frame_saved_pc (FI))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_PTR) \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
+ else \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE));
+
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (4), \
+ REGISTER_RAW_SIZE (4))
+
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_PTR) \
+ write_register_bytes(REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
+ else \
+ write_register_bytes(REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE));
+
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
+ (SP) = mn10300_store_struct_return (STRUCT_ADDR, SP)
+
+extern CORE_ADDR mn10300_skip_prologue PARAMS ((CORE_ADDR));
+#define SKIP_PROLOGUE(pc) pc = mn10300_skip_prologue (pc)
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_NUM_ARGS(val, fi) ((val) = -1)
+
+extern void mn10300_pop_frame PARAMS ((struct frame_info *));
+#define POP_FRAME mn10300_pop_frame (get_current_frame ())
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+
+extern CORE_ADDR mn10300_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+#define PUSH_RETURN_ADDRESS(PC, SP) mn10300_push_return_address (PC, SP)
+
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+extern CORE_ADDR
+mn10300_push_arguments PARAMS ((int, struct value **, CORE_ADDR,
+ unsigned char, CORE_ADDR ));
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = mn10300_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
+ (TYPE_LENGTH (TYPE) > 8)
+
+extern use_struct_convention_fn mn10300_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10300_use_struct_convention (GCC_P, TYPE)
+
+/* override the default get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+/* Cons up virtual frame pointer for trace */
+extern void mn10300_virtual_frame_pointer PARAMS ((CORE_ADDR, long *, long *));
+#define TARGET_VIRTUAL_FRAME_POINTER(PC, REGP, OFFP) \
+ mn10300_virtual_frame_pointer ((PC), (REGP), (OFFP))
+
+/* Define this for Wingdb */
+
+#define TARGET_MN10300
diff --git a/gdb/config/nm-empty.h b/gdb/config/nm-empty.h
new file mode 100644
index 0000000..7069d8c
--- /dev/null
+++ b/gdb/config/nm-empty.h
@@ -0,0 +1,2 @@
+/* This is just a dummy file to symlink to when GDB is configured as a
+ cross-only debugger. */
diff --git a/gdb/config/nm-gnu.h b/gdb/config/nm-gnu.h
new file mode 100644
index 0000000..b7ee4dc
--- /dev/null
+++ b/gdb/config/nm-gnu.h
@@ -0,0 +1,45 @@
+/* Common declarations for the GNU Hurd
+
+ Copyright (C) 1995, 1998 Free Software Foundation, Inc.
+
+ Written by Miles Bader <miles@gnu.ai.mit.edu>
+
+ The GNU Hurd is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2, or (at
+ your option) any later version.
+
+ The GNU Hurd is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#ifndef __NM_GNU_H__
+#define __NM_GNU_H__
+
+#include <unistd.h>
+#include <mach.h>
+#include <mach/exception.h>
+
+#undef target_pid_to_str
+#define target_pid_to_str(pid) gnu_target_pid_to_str(pid)
+extern char *gnu_target_pid_to_str (int pid);
+
+/* Before storing, we need to read all the registers. */
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Don't do wait_for_inferior on attach. */
+#define ATTACH_NO_WAIT
+
+/* Use SVR4 style shared library support */
+#define SVR4_SHARED_LIBS
+#include "solib.h"
+#define NO_CORE_OPS
+
+#define MAINTENANCE_CMDS 1
+
+#endif /* __NM_GNU_H__ */
diff --git a/gdb/config/nm-lynx.h b/gdb/config/nm-lynx.h
new file mode 100644
index 0000000..2daf0fa
--- /dev/null
+++ b/gdb/config/nm-lynx.h
@@ -0,0 +1,83 @@
+/* Native-dependent definitions for LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_LYNX_H
+#define NM_LYNX_H
+
+#include <sys/conf.h>
+#include <sys/kernel.h>
+/* sys/kernel.h should define this, but doesn't always, sigh. */
+#ifndef __LYNXOS
+#define __LYNXOS
+#endif
+#include <sys/mem.h>
+#include <sys/signal.h>
+#include <sys/time.h>
+#include <sys/resource.h>
+#include <sys/itimer.h>
+#include <sys/file.h>
+#include <sys/proc.h>
+#include "gdbthread.h"
+
+/* This is the amount to subtract from u.u_ar0 to get the offset in
+ the core file of the register values. */
+
+#define KERNEL_U_ADDR USRSTACK
+
+#undef FLOAT_INFO /* No float info yet */
+
+/* As of LynxOS 2.2.2 (beta 8/15/94), this is int. Previous versions seem to
+ have had no prototype, so I'm not sure why GDB used to define this to
+ char *. */
+#define PTRACE_ARG3_TYPE int
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Thread ID of stopped thread. */
+
+#define WIFTID(x) (((union wait *)&x)->w_tid)
+
+/* Override child_wait in inftarg.c */
+
+#define CHILD_WAIT
+
+/* Override child_resume in infptrace.c */
+
+#define CHILD_RESUME
+
+/* Override child_thread_alive in intarg.c */
+
+#define CHILD_THREAD_ALIVE
+
+#include "target.h"
+
+extern int child_wait PARAMS ((int pid, struct target_waitstatus *status));
+
+/* Lynx needs a special definition of this so that we can
+ print out the pid and thread number seperatly. */
+
+#undef target_pid_to_str
+
+#define target_pid_to_str(PID) lynx_pid_to_str (PID)
+
+extern char *lynx_pid_to_str PARAMS ((int pid));
+
+#endif /* NM_LYNX_H */
diff --git a/gdb/config/nm-m3.h b/gdb/config/nm-m3.h
new file mode 100644
index 0000000..6ea5256
--- /dev/null
+++ b/gdb/config/nm-m3.h
@@ -0,0 +1,123 @@
+/* Mach 3.0 common definitions and global vars.
+
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_M3_H
+#define NM_M3_H
+
+#include <mach.h>
+
+/* Mach3 doesn't declare errno in <errno.h>. */
+extern int errno;
+
+/* Task port of our debugged inferior. */
+
+extern task_t inferior_task;
+
+/* Thread port of the current thread in the inferior. */
+
+extern thread_t current_thread;
+
+/* If nonzero, we must suspend/abort && resume threads
+ * when setting or getting the state.
+ */
+extern int must_suspend_thread;
+
+#define PREPARE_TO_PROCEED(select_it) mach3_prepare_to_proceed(select_it)
+
+/* Try to get the privileged host port for authentication to machid
+ *
+ * If you can get this, you may debug anything on this host.
+ *
+ * If you can't, gdb gives it's own task port as the
+ * authentication port
+ */
+#define mach_privileged_host_port() task_by_pid(-1)
+
+/*
+ * This is the MIG ID number of the emulator/server bsd_execve() RPC call.
+ *
+ * It SHOULD never change, but if it does, gdb `run'
+ * command won't work until you fix this define.
+ *
+ */
+#define MIG_EXEC_SYSCALL_ID 101000
+
+/* If our_message_port gets a msg with this ID,
+ * GDB suspends it's inferior and enters command level.
+ * (Useful at least if ^C does not work)
+ */
+#define GDB_MESSAGE_ID_STOP 0x41151
+
+/* wait3 WNOHANG is defined in <sys/wait.h> but
+ * for some reason gdb does not want to include
+ * that file.
+ *
+ * If your system defines WNOHANG differently, this has to be changed.
+ */
+#define WNOHANG 1
+
+/* Before storing, we need to read all the registers. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Check if the inferior exists */
+#define MACH_ERROR_NO_INFERIOR \
+ do if (!MACH_PORT_VALID (inferior_task)) \
+ error ("Inferior task does not exist."); while(0)
+
+/* Error handler for mach calls */
+#define CHK(str,ret) \
+ do if (ret != KERN_SUCCESS) \
+ error ("Gdb %s [%d] %s : %s\n",__FILE__,__LINE__,str, \
+ mach_error_string(ret)); while(0)
+
+/* This is from POE9 emulator/emul_stack.h
+ */
+/*
+ * Top of emulator stack holds link and reply port.
+ */
+struct emul_stack_top {
+ struct emul_stack_top *link;
+ mach_port_t reply_port;
+};
+
+#define EMULATOR_STACK_SIZE (4096*4)
+
+#define THREAD_ALLOWED_TO_BREAK(mid) mach_thread_for_breakpoint (mid)
+
+#define THREAD_PARSE_ID(arg) mach_thread_parse_id (arg)
+
+#define THREAD_OUTPUT_ID(mid) mach_thread_output_id (mid)
+
+#define ATTACH_TO_THREAD attach_to_thread
+
+/* Don't do wait_for_inferior on attach. */
+#define ATTACH_NO_WAIT
+
+/* Do Mach 3 dependent operations when ^C or a STOP is requested */
+#define DO_QUIT() mach3_quit ()
+
+#if 0
+/* This is bogus. It is NOT OK to quit out of target_wait. */
+/* If in mach_msg() and ^C is typed set immediate_quit */
+#define REQUEST_QUIT() mach3_request_quit ()
+#endif
+
+#endif /* NM_M3_H */
diff --git a/gdb/config/nm-nbsd.h b/gdb/config/nm-nbsd.h
new file mode 100644
index 0000000..bc1d6a6
--- /dev/null
+++ b/gdb/config/nm-nbsd.h
@@ -0,0 +1,86 @@
+/* Native-dependent definitions for NetBSD.
+ Copyright 1994, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#include <machine/vmparam.h>
+
+#define KERNEL_U_ADDR USRSTACK
+
+#define PTRACE_ARG3_TYPE char*
+
+#define FETCH_INFERIOR_REGISTERS
+
+#define ATTACH_DETACH
+
+#include "solib.h" /* Support for shared libraries. */
+
+/* make structure definitions match up with those expected in solib.c */
+#define link_object sod
+#define lo_name sod_name
+#define lo_library sod_library
+#define lo_unused sod_reserved
+#define lo_major sod_major
+#define lo_minor sod_minor
+#define lo_next sod_next
+
+#define link_map so_map
+#define lm_addr som_addr
+#define lm_name som_path
+#define lm_next som_next
+#define lm_lop som_sod
+#define lm_lob som_sodbase
+#define lm_rwt som_write
+#define lm_ld som_dynamic
+#define lm_lpd som_spd
+
+#define link_dynamic_2 section_dispatch_table
+#define ld_loaded sdt_loaded
+#define ld_need sdt_sods
+#define ld_rules sdt_filler1
+#define ld_got sdt_got
+#define ld_plt sdt_plt
+#define ld_rel sdt_rel
+#define ld_hash sdt_hash
+#define ld_stab sdt_nzlist
+#define ld_stab_hash sdt_filler2
+#define ld_buckets sdt_buckets
+#define ld_symbols sdt_strings
+#define ld_symb_size sdt_str_sz
+#define ld_text sdt_text_sz
+#define ld_plt_sz sdt_plt_sz
+
+#define rtc_symb rt_symbol
+#define rtc_sp rt_sp
+#define rtc_next rt_next
+
+#define ld_debug so_debug
+#define ldd_version dd_version
+#define ldd_in_debugger dd_in_debugger
+#define ldd_sym_loaded dd_sym_loaded
+#define ldd_bp_addr dd_bpt_addr
+#define ldd_bp_inst dd_bpt_shadow
+#define ldd_cp dd_cc
+
+#define link_dynamic _dynamic
+#define ld_version d_version
+#define ldd d_debug
+#define ld_un d_un
+#define ld_2 d_sdt
diff --git a/gdb/config/nm-sysv4.h b/gdb/config/nm-sysv4.h
new file mode 100644
index 0000000..b891d4d
--- /dev/null
+++ b/gdb/config/nm-sysv4.h
@@ -0,0 +1,33 @@
+/* Definitions for running gdb on a host machine running any flavor of SVR4.
+ Copyright 1991, 1992, 1998 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Use SVR4 style shared library support */
+
+#define SVR4_SHARED_LIBS
+#include "solib.h"
+
+/* SVR4 has /proc support, so use it instead of ptrace. */
+
+#define USE_PROC_FS
+
+/* SVR4 machines can easily do attach and detach via /proc (procfs.c)
+ support */
+
+#define ATTACH_DETACH
diff --git a/gdb/config/none/nm-none.h b/gdb/config/none/nm-none.h
new file mode 100644
index 0000000..9d630f3
--- /dev/null
+++ b/gdb/config/none/nm-none.h
@@ -0,0 +1,18 @@
+/* Defines needed when configuring for "none".
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
diff --git a/gdb/config/none/none.mh b/gdb/config/none/none.mh
new file mode 100644
index 0000000..33d5e4a
--- /dev/null
+++ b/gdb/config/none/none.mh
@@ -0,0 +1,5 @@
+# Host: "no target". This can be used to build you
+# a Makefile that only runs administrative commands like 'clean',
+# 'gdb.tar.Z', etc.
+NAT_FILE= nm-none.h
+XM_FILE= xm-none.h
diff --git a/gdb/config/none/none.mt b/gdb/config/none/none.mt
new file mode 100644
index 0000000..300e2dc
--- /dev/null
+++ b/gdb/config/none/none.mt
@@ -0,0 +1,4 @@
+# Target: "no target".
+# This can be used to build you a Makefile that only runs administrative
+# commands like 'clean', 'gdb.tar.Z', etc.
+TM_FILE= tm-none.h
diff --git a/gdb/config/none/tm-none.h b/gdb/config/none/tm-none.h
new file mode 100644
index 0000000..4b16b3b
--- /dev/null
+++ b/gdb/config/none/tm-none.h
@@ -0,0 +1,23 @@
+/* Defines needed when configuring for "none".
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This define is needed so that "gcc -MM" doesn't get errors and fail on
+ source files that use the value of INNER_THAN in preprocessor lines. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
diff --git a/gdb/config/none/xm-none.h b/gdb/config/none/xm-none.h
new file mode 100644
index 0000000..9d630f3
--- /dev/null
+++ b/gdb/config/none/xm-none.h
@@ -0,0 +1,18 @@
+/* Defines needed when configuring for "none".
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
diff --git a/gdb/config/ns32k/merlin.mh b/gdb/config/ns32k/merlin.mh
new file mode 100644
index 0000000..f9c3e7b
--- /dev/null
+++ b/gdb/config/ns32k/merlin.mh
@@ -0,0 +1,16 @@
+# Host: Merlin running utek 2.1
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+XM_FILE= xm-merlin.h
+
+# FIXME: M_INSTALL is gone from the gdb makefile. If anyone cares
+# about the Merlin anymore, and the bug which inspired
+# SHELL_FILE/gdb-sh is still there, will need to reinstate it. Also,
+# this should be done for native only.
+
+# See SHELL_FILE in xm-merlin.h for a explanation of this.
+
+# FIXME: This should use $prefix, but only if SHELL_FILE does too.
+
+M_INSTALL=cp /bin/sh /usr/local/lib/gdb-sh; \
+chmod ogu+rw /usr/local/lib/gdb-sh
+M_UNINSTALL = rm -f /usr/local/lib/gdb-sh
diff --git a/gdb/config/ns32k/merlin.mt b/gdb/config/ns32k/merlin.mt
new file mode 100644
index 0000000..b346077
--- /dev/null
+++ b/gdb/config/ns32k/merlin.mt
@@ -0,0 +1,3 @@
+# Target: Merlin running utek 2.1
+TDEPFILES= ns32k-tdep.o
+TM_FILE= tm-merlin.h
diff --git a/gdb/config/ns32k/nbsd.mh b/gdb/config/ns32k/nbsd.mh
new file mode 100644
index 0000000..aae025b
--- /dev/null
+++ b/gdb/config/ns32k/nbsd.mh
@@ -0,0 +1,5 @@
+# Host: PC532 running NetBSD
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o ns32knbsd-nat.o
diff --git a/gdb/config/ns32k/nbsd.mt b/gdb/config/ns32k/nbsd.mt
new file mode 100644
index 0000000..512132a
--- /dev/null
+++ b/gdb/config/ns32k/nbsd.mt
@@ -0,0 +1,3 @@
+# Target: PC532 running NetBSD
+TDEPFILES= ns32k-tdep.o solib.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/ns32k/nm-nbsd.h b/gdb/config/ns32k/nm-nbsd.h
new file mode 100644
index 0000000..cef536e
--- /dev/null
+++ b/gdb/config/ns32k/nm-nbsd.h
@@ -0,0 +1,36 @@
+/* Native-dependent definitions for ns32k running NetBSD, for GDB.
+ Copyright 1986, 1987, 1989, 1992, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "nm-nbsd.h"
+
+#if 0
+#define FLOAT_INFO { extern ns32k_float_info(); ns32k_float_info(); }
+#endif
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+ (addr) = ns32k_register_u_addr ((blockend),(regno));
+
+extern int
+ns32k_register_u_addr PARAMS ((int, int));
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/ns32k/nm-umax.h b/gdb/config/ns32k/nm-umax.h
new file mode 100644
index 0000000..add6e70
--- /dev/null
+++ b/gdb/config/ns32k/nm-umax.h
@@ -0,0 +1,54 @@
+/* Definitions to make GDB run on an encore under umax 4.2
+ Copyright 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands... */
+#define ATTACH_DETACH
+
+/* Offset of registers within u area. */
+#define U_REGS_OFFSET 0
+
+/* called from register_addr() -- blockend not used for now */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ \
+ switch (regno) { \
+ case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: \
+ addr = PU_R0 - (regno * sizeof (int)); break; \
+ case SP_REGNUM: \
+ addr = PU_SP; break; \
+ case PC_REGNUM: \
+ addr = PU_PC; break; \
+ case FP_REGNUM: \
+ addr = PU_FP; break; \
+ case PS_REGNUM: \
+ addr = PU_PSL; break; \
+ case FPS_REGNUM: \
+ addr = PU_FSR; break; \
+ case FP0_REGNUM + 0: case FP0_REGNUM + 1: \
+ case FP0_REGNUM + 2: case FP0_REGNUM + 3: \
+ case FP0_REGNUM + 4: case FP0_REGNUM + 5: \
+ case FP0_REGNUM + 6: case FP0_REGNUM + 7: \
+ addr = PU_F0 + (regno - FP0_REGNUM) * sizeof (float); break; \
+ case LP0_REGNUM + 0: case LP0_REGNUM + 1: \
+ case LP0_REGNUM + 2: case LP0_REGNUM + 3: \
+ addr = PU_F0 + (regno - LP0_REGNUM) * sizeof (double); break; \
+ default: \
+ printf ("bad argument to REGISTER_U_ADDR %d\n", regno); \
+ abort (); \
+ } \
+}
diff --git a/gdb/config/ns32k/ns32km3.mh b/gdb/config/ns32k/ns32km3.mh
new file mode 100644
index 0000000..7f0992a
--- /dev/null
+++ b/gdb/config/ns32k/ns32km3.mh
@@ -0,0 +1,7 @@
+# Host: ns32k running Mach3
+
+XDEPFILES=
+NATDEPFILES= m3-nat.o ns32km3-nat.o fork-child.o corelow.o core-aout.o
+NAT_CLIBS= -L/usr/mach/lib -lnetname -lmachid -lmach
+XM_FILE= xm-ns32km3.h
+NAT_FILE= nm-m3.h
diff --git a/gdb/config/ns32k/ns32km3.mt b/gdb/config/ns32k/ns32km3.mt
new file mode 100644
index 0000000..9391176
--- /dev/null
+++ b/gdb/config/ns32k/ns32km3.mt
@@ -0,0 +1,3 @@
+# Target: ns32k with a.out on Mach 3
+TDEPFILES= ns32k-tdep.o
+TM_FILE= tm-ns32km3.h
diff --git a/gdb/config/ns32k/tm-merlin.h b/gdb/config/ns32k/tm-merlin.h
new file mode 100644
index 0000000..f90c5e7
--- /dev/null
+++ b/gdb/config/ns32k/tm-merlin.h
@@ -0,0 +1,313 @@
+/* Definitions to target GDB to a merlin under utek 2.1
+ Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+{ register int op = read_memory_integer (pc, 1); \
+ if (op == 0x82) \
+ { op = read_memory_integer (pc+2,1); \
+ if ((op & 0x80) == 0) pc += 3; \
+ else if ((op & 0xc0) == 0x80) pc += 4; \
+ else pc += 6; \
+ }}
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ read_memory_integer (read_register (SP_REGNUM), 4)
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR (0x800000)
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0xf2}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Define this to say that the "svc" insn is followed by
+ codes in memory saying which kind of system call it is. */
+
+#define NS32K_SVC_IMMED_OPERANDS
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 25
+
+#define NUM_GENERAL_REGS 8
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "pc", "sp", "fp", "ps", \
+ "fsr", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "l0", "l1", "l2", "l3", "l4", \
+ }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define AP_REGNUM FP_REGNUM
+#define FP_REGNUM 10 /* Contains address of executing stack frame */
+#define SP_REGNUM 9 /* Contains address of top of stack */
+#define PC_REGNUM 8 /* Contains program counter */
+#define PS_REGNUM 11 /* Contains processor status */
+#define FPS_REGNUM 12 /* Floating point status register */
+#define FP0_REGNUM 13 /* Floating point register 0 */
+#define LP0_REGNUM 21 /* Double register 0 (same as FP0) */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES ((NUM_REGS - 4) * sizeof (int) + 4 * sizeof (double))
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) >= LP0_REGNUM ? \
+ LP0_REGNUM * 4 + ((N) - LP0_REGNUM) * 8 : (N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the 32000, all regs are 4 bytes
+ except for the doubled floating registers. */
+
+#define REGISTER_RAW_SIZE(N) ((N) >= LP0_REGNUM ? 8 : 4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the 32000, all regs are 4 bytes
+ except for the doubled floating registers. */
+
+#define REGISTER_VIRTUAL_SIZE(N) ((N) >= LP0_REGNUM ? 8 : 4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) >= FP0_REGNUM ? \
+ ((N) >= LP0_REGNUM ? \
+ builtin_type_double \
+ : builtin_type_float) \
+ : builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ On this machine this is a no-op, as gcc doesn't run on it yet.
+ This calling convention is not used. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the Merlin, the frame's nominal address is the FP value,
+ and at that address is saved previous FP value as a 4-byte word. */
+
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+#define FRAME_SAVED_PC(FRAME) (read_memory_integer ((FRAME)->frame + 4, 4))
+
+/* compute base of arguments */
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) \
+{ CORE_ADDR pc; \
+ int insn; \
+ int addr_mode; \
+ int width; \
+ \
+ pc = FRAME_SAVED_PC (fi); \
+ insn = read_memory_integer (pc,2); \
+ addr_mode = (insn >> 11) & 0x1f; \
+ insn = insn & 0x7ff; \
+ if ((insn & 0x7fc) == 0x57c \
+ && addr_mode == 0x14) /* immediate */ \
+ { if (insn == 0x57c) /* adjspb */ \
+ width = 1; \
+ else if (insn == 0x57d) /* adjspw */ \
+ width = 2; \
+ else if (insn == 0x57f) /* adjspd */ \
+ width = 4; \
+ numargs = read_memory_integer (pc+2,width); \
+ if (width > 1) \
+ flip_bytes (&numargs, width); \
+ numargs = - sign_extend (numargs, width*8) / 4; } \
+ else numargs = -1; \
+}
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ int regmask,regnum; \
+ int localcount; \
+ CORE_ADDR enter_addr; \
+ CORE_ADDR next_addr; \
+ \
+ enter_addr = get_pc_function_start ((frame_info)->pc); \
+ regmask = read_memory_integer (enter_addr+1, 1); \
+ localcount = ns32k_localcount (enter_addr); \
+ next_addr = (frame_info)->frame + localcount; \
+ for (regnum = 0; regnum < 8; regnum++, regmask >>= 1) \
+ (frame_saved_regs).regs[regnum] \
+ = (regmask & 1) ? (next_addr -= 4) : 0; \
+ (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame + 4; \
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 4; \
+ (frame_saved_regs).regs[FP_REGNUM] \
+ = read_memory_integer ((frame_info)->frame, 4); }
+
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM); \
+ register int regnum; \
+ sp = push_word (sp, read_register (PC_REGNUM)); \
+ sp = push_word (sp, read_register (FP_REGNUM)); \
+ write_register (FP_REGNUM, sp); \
+ for (regnum = 0; regnum < 8; regnum++) \
+ sp = push_word (sp, read_register (regnum)); \
+ write_register (SP_REGNUM, sp); \
+}
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+{ register struct frame_info *frame = get_current_frame (); \
+ register CORE_ADDR fp; \
+ register int regnum; \
+ struct frame_saved_regs fsr; \
+ struct frame_info *fi; \
+ fp = frame->frame; \
+ get_frame_saved_regs (frame, &fsr); \
+ for (regnum = 0; regnum < 8; regnum++) \
+ if (fsr.regs[regnum]) \
+ write_register (regnum, read_memory_integer (fsr.regs[regnum], 4)); \
+ write_register (FP_REGNUM, read_memory_integer (fp, 4)); \
+ write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); \
+ write_register (SP_REGNUM, fp + 8); \
+ flush_cached_frames (); \
+}
+
+/* This sequence of words is the instructions
+ enter 0xff,0 82 ff 00
+ jsr @0x00010203 7f ae c0 01 02 03
+ adjspd 0x69696969 7f a5 01 02 03 04
+ bpt f2
+ Note this is 16 bytes. */
+
+#define CALL_DUMMY { 0x7f00ff82, 0x0201c0ae, 0x01a57f03, 0xf2040302 }
+
+#define CALL_DUMMY_START_OFFSET 3
+#define CALL_DUMMY_LENGTH 16
+#define CALL_DUMMY_ADDR 5
+#define CALL_DUMMY_NARGS 11
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ int flipped = fun | 0xc0000000; \
+ flip_bytes (&flipped, 4); \
+ *((int *) (((char *) dummyname)+CALL_DUMMY_ADDR)) = flipped; \
+ flipped = - nargs * 4; \
+ flip_bytes (&flipped, 4); \
+ *((int *) (((char *) dummyname)+CALL_DUMMY_NARGS)) = flipped; \
+}
diff --git a/gdb/config/ns32k/tm-nbsd.h b/gdb/config/ns32k/tm-nbsd.h
new file mode 100644
index 0000000..6e61de3
--- /dev/null
+++ b/gdb/config/ns32k/tm-nbsd.h
@@ -0,0 +1,79 @@
+/* Macro definitions for ns32k running under NetBSD.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Override number of expected traps from sysv. */
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Most definitions from umax could be used. */
+
+#include "ns32k/tm-umax.h"
+
+/* Generic NetBSD definitions. */
+
+#include "tm-nbsd.h"
+
+/* Saved Pc. Get it from sigcontext if within sigtramp. */
+
+/* Offset to saved PC in sigcontext, from <machine/signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#undef FRAME_SAVED_PC(FRAME)
+#define FRAME_SAVED_PC(FRAME) \
+ (((FRAME)->signal_handler_caller \
+ ? sigtramp_saved_pc (FRAME) \
+ : read_memory_integer ((FRAME)->frame + 4, 4)) \
+ )
+
+
+/* tm-umax.h assumes a 32082 fpu. We have a 32382 fpu. */
+#undef REGISTER_NAMES
+#undef NUM_REGS
+#undef REGISTER_BYTES
+#undef REGISTER_BYTE
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "sp", "fp", "pc", "ps", \
+ "fsr", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", "xx", \
+ }
+
+#define NUM_REGS 29
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES \
+ ((NUM_REGS - 4) * REGISTER_RAW_SIZE(R0_REGNUM) \
+ + 8 * REGISTER_RAW_SIZE(LP0_REGNUM))
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+/* This is a bit yuck. The even numbered double precision floating
+ point long registers occupy the same space as the even:odd numbered
+ single precision floating point registers, but the extra 32381 fpu
+ registers are at the end. Doing it this way is compatable for both
+ 32081 and 32381 equiped machines. */
+
+#define REGISTER_BYTE(N) (((N) < LP0_REGNUM? (N)\
+ : ((N) - LP0_REGNUM) & 1? (N) - 1 \
+ : ((N) - LP0_REGNUM + FP0_REGNUM)) * 4)
+
diff --git a/gdb/config/ns32k/tm-ns32km3.h b/gdb/config/ns32k/tm-ns32km3.h
new file mode 100644
index 0000000..27d07d7
--- /dev/null
+++ b/gdb/config/ns32k/tm-ns32km3.h
@@ -0,0 +1,73 @@
+/* Macro definitions for ns532, Mach 3.0
+ Copyright (C) 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include common definitions for Mach3 systems */
+#include "nm-m3.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+#define MACHINE_CPROC_SP_OFFSET 20
+#define MACHINE_CPROC_PC_OFFSET 16
+#define MACHINE_CPROC_FP_OFFSET 12
+
+#include <ns532/psl.h>
+#include <ns532/vmparam.h>
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define TRACE_FLAVOR NS532_THREAD_STATE
+#define TRACE_FLAVOR_SIZE NS532_THREAD_STATE_COUNT
+#define TRACE_SET(x,state) \
+ ((struct ns532_thread_state *)state)->psr |= PSR_T
+#define TRACE_CLEAR(x,state) \
+ ((((struct ns532_thread_state *)state)->psr &= ~PSR_T), 1)
+
+/* we can do it */
+#define ATTACH_DETACH 1
+
+/* Address of end of stack space.
+ * for MACH, see <ns532/vmparam.h>
+ */
+#define STACK_END_ADDR USRSTACK
+
+#include "ns32k/tm-umax.h"
+
+/* tm-umax.h assumes a 32082 fpu. We have a 32382 fpu. */
+#undef REGISTER_NAMES
+#undef NUM_REGS
+#undef REGISTER_BYTES
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "sp", "fp", "pc", "ps", \
+ "fsr", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", "xx", \
+ }
+
+#define NUM_REGS 29
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES \
+ ((NUM_REGS - 4) * REGISTER_RAW_SIZE(R0_REGNUM) \
+ + 8 * REGISTER_RAW_SIZE(LP0_REGNUM))
diff --git a/gdb/config/ns32k/tm-umax.h b/gdb/config/ns32k/tm-umax.h
new file mode 100644
index 0000000..1fdfb2f
--- /dev/null
+++ b/gdb/config/ns32k/tm-umax.h
@@ -0,0 +1,370 @@
+/* Definitions to make GDB run on an encore under umax 4.2
+ Copyright 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is also included by tm-ns32km3.h, as well as being used by umax. */
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* Need to get function ends by adding this to epilogue address from .bf
+ record, not using x_fsize field. */
+#define FUNCTION_EPILOGUE_SIZE 4
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+{ register unsigned char op = read_memory_integer (pc, 1); \
+ if (op == 0x82) { op = read_memory_integer (pc+2,1); \
+ if ((op & 0x80) == 0) pc += 3; \
+ else if ((op & 0xc0) == 0x80) pc += 4; \
+ else pc += 6; \
+ } \
+}
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ read_memory_integer (read_register (SP_REGNUM), 4)
+
+/* Address of end of stack space. */
+
+#ifndef STACK_END_ADDR
+#define STACK_END_ADDR (0xfffff000)
+#endif
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0xf2}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+#if 0 /* Disable until fixed *correctly*. */
+#ifndef INVALID_FLOAT
+#ifndef NaN
+#include <nan.h>
+#endif NaN
+
+/* Return 1 if P points to an invalid floating point value. */
+/* Surely wrong for cross-debugging. */
+#define INVALID_FLOAT(p, s) \
+ ((s == sizeof (float))? \
+ NaF (*(float *) p) : \
+ NaD (*(double *) p))
+#endif /* INVALID_FLOAT */
+#endif
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 25
+
+#define NUM_GENERAL_REGS 8
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "sp", "fp", "pc", "ps", \
+ "fsr", \
+ "l0", "l1", "l2", "l3", "xx", \
+ }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define R0_REGNUM 0 /* General register 0 */
+#define FP0_REGNUM 8 /* Floating point register 0 */
+#define SP_REGNUM 16 /* Contains address of top of stack */
+#define AP_REGNUM FP_REGNUM
+#define FP_REGNUM 17 /* Contains address of executing stack frame */
+#define PC_REGNUM 18 /* Contains program counter */
+#define PS_REGNUM 19 /* Contains processor status */
+#define FPS_REGNUM 20 /* Floating point status register */
+#define LP0_REGNUM 21 /* Double register 0 (same as FP0) */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES \
+ ((NUM_REGS - 4) * REGISTER_RAW_SIZE(R0_REGNUM) \
+ + 4 * REGISTER_RAW_SIZE(LP0_REGNUM))
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) >= LP0_REGNUM ? \
+ LP0_REGNUM * 4 + ((N) - LP0_REGNUM) * 8 : (N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the 32000, all regs are 4 bytes
+ except for the doubled floating registers. */
+
+#define REGISTER_RAW_SIZE(N) ((N) >= LP0_REGNUM ? 8 : 4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the 32000, all regs are 4 bytes
+ except for the doubled floating registers. */
+
+#define REGISTER_VIRTUAL_SIZE(N) ((N) >= LP0_REGNUM ? 8 : 4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((N) < FP0_REGNUM) ? \
+ builtin_type_int : \
+ ((N) < FP0_REGNUM + 8) ? \
+ builtin_type_float : \
+ ((N) < LP0_REGNUM) ? \
+ builtin_type_int : \
+ builtin_type_double)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ On this machine this is a no-op, because gcc isn't used on it
+ yet. So this calling convention is not used. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF+REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 0), TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 0), VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the ns32000 series, the frame's nominal address is the FP
+ value, and at that address is saved previous FP value as a 4-byte word. */
+
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+#define FRAME_SAVED_PC(FRAME) (read_memory_integer ((FRAME)->frame + 4, 4))
+
+/* Compute base of arguments. */
+
+#define FRAME_ARGS_ADDRESS(fi) \
+ ((ns32k_get_enter_addr ((fi)->pc) > 1) ? \
+ ((fi)->frame) : (read_register (SP_REGNUM) - 4))
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Get the address of the enter opcode for this function, if it is active.
+ Returns positive address > 1 if pc is between enter/exit,
+ 1 if pc before enter or after exit, 0 otherwise. */
+
+extern CORE_ADDR ns32k_get_enter_addr ();
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell.
+ Encore's C compiler often reuses same area on stack for args,
+ so this will often not work properly. If the arg names
+ are known, it's likely most of them will be printed. */
+
+#define FRAME_NUM_ARGS(numargs, fi) \
+{ CORE_ADDR pc; \
+ CORE_ADDR enter_addr; \
+ unsigned int insn; \
+ unsigned int addr_mode; \
+ int width; \
+ \
+ numargs = -1; \
+ enter_addr = ns32k_get_enter_addr ((fi)->pc); \
+ if (enter_addr > 0) \
+ { \
+ pc = (enter_addr == 1) ? \
+ SAVED_PC_AFTER_CALL (fi) : \
+ FRAME_SAVED_PC (fi); \
+ insn = read_memory_integer (pc,2); \
+ addr_mode = (insn >> 11) & 0x1f; \
+ insn = insn & 0x7ff; \
+ if ((insn & 0x7fc) == 0x57c && \
+ addr_mode == 0x14) /* immediate */ \
+ { \
+ if (insn == 0x57c) /* adjspb */ \
+ width = 1; \
+ else if (insn == 0x57d) /* adjspw */ \
+ width = 2; \
+ else if (insn == 0x57f) /* adjspd */ \
+ width = 4; \
+ numargs = read_memory_integer (pc+2,width); \
+ if (width > 1) \
+ flip_bytes (&numargs, width); \
+ numargs = - sign_extend (numargs, width*8) / 4;\
+ } \
+ } \
+}
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ \
+ register int regmask, regnum; \
+ int localcount; \
+ register CORE_ADDR enter_addr; \
+ register CORE_ADDR next_addr; \
+ \
+ memset (&(frame_saved_regs), '\0', sizeof (frame_saved_regs)); \
+ enter_addr = ns32k_get_enter_addr ((frame_info)->pc); \
+ if (enter_addr > 1) \
+ { \
+ regmask = read_memory_integer (enter_addr+1, 1) & 0xff; \
+ localcount = ns32k_localcount (enter_addr); \
+ next_addr = (frame_info)->frame + localcount; \
+ for (regnum = 0; regnum < 8; regnum++, regmask >>= 1) \
+ (frame_saved_regs).regs[regnum] = (regmask & 1) ? \
+ (next_addr -= 4) : 0; \
+ (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame + 4;\
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 4;\
+ (frame_saved_regs).regs[FP_REGNUM] = \
+ (read_memory_integer ((frame_info)->frame, 4));\
+ } \
+ else if (enter_addr == 1) \
+ { \
+ CORE_ADDR sp = read_register (SP_REGNUM); \
+ (frame_saved_regs).regs[PC_REGNUM] = sp; \
+ (frame_saved_regs).regs[SP_REGNUM] = sp + 4; \
+ } \
+}
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM);\
+ register int regnum; \
+ sp = push_word (sp, read_register (PC_REGNUM)); \
+ sp = push_word (sp, read_register (FP_REGNUM)); \
+ write_register (FP_REGNUM, sp); \
+ for (regnum = 0; regnum < 8; regnum++) \
+ sp = push_word (sp, read_register (regnum)); \
+ write_register (SP_REGNUM, sp); \
+}
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+{ register struct frame_info *frame = get_current_frame (); \
+ register CORE_ADDR fp; \
+ register int regnum; \
+ struct frame_saved_regs fsr; \
+ struct frame_info *fi; \
+ fp = frame->frame; \
+ get_frame_saved_regs (frame, &fsr); \
+ for (regnum = 0; regnum < 8; regnum++) \
+ if (fsr.regs[regnum]) \
+ write_register (regnum, read_memory_integer (fsr.regs[regnum], 4)); \
+ write_register (FP_REGNUM, read_memory_integer (fp, 4)); \
+ write_register (PC_REGNUM, read_memory_integer (fp + 4, 4)); \
+ write_register (SP_REGNUM, fp + 8); \
+ flush_cached_frames (); \
+}
+
+/* This sequence of words is the instructions
+ enter 0xff,0 82 ff 00
+ jsr @0x00010203 7f ae c0 01 02 03
+ adjspd 0x69696969 7f a5 01 02 03 04
+ bpt f2
+ Note this is 16 bytes. */
+
+#define CALL_DUMMY { 0x7f00ff82, 0x0201c0ae, 0x01a57f03, 0xf2040302 }
+
+#define CALL_DUMMY_START_OFFSET 3
+#define CALL_DUMMY_LENGTH 16
+#define CALL_DUMMY_ADDR 5
+#define CALL_DUMMY_NARGS 11
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+ int flipped; \
+ flipped = fun | 0xc0000000; \
+ flip_bytes (&flipped, 4); \
+ *((int *) (((char *) dummyname)+CALL_DUMMY_ADDR)) = flipped; \
+ flipped = - nargs * 4; \
+ flip_bytes (&flipped, 4); \
+ *((int *) (((char *) dummyname)+CALL_DUMMY_NARGS)) = flipped; \
+}
diff --git a/gdb/config/ns32k/umax.mh b/gdb/config/ns32k/umax.mh
new file mode 100644
index 0000000..e43f6ec
--- /dev/null
+++ b/gdb/config/ns32k/umax.mh
@@ -0,0 +1,5 @@
+# Host: Encore running umax 4.2
+XDEPFILES= umax-xdep.o
+XM_FILE= xm-umax.h
+NAT_FILE= nm-umax.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o
diff --git a/gdb/config/ns32k/umax.mt b/gdb/config/ns32k/umax.mt
new file mode 100644
index 0000000..4c9169d
--- /dev/null
+++ b/gdb/config/ns32k/umax.mt
@@ -0,0 +1,3 @@
+# Target: Encore running umax 4.2
+TDEPFILES= ns32k-tdep.o
+TM_FILE= tm-umax.h
diff --git a/gdb/config/ns32k/xm-merlin.h b/gdb/config/ns32k/xm-merlin.h
new file mode 100644
index 0000000..b8329f6
--- /dev/null
+++ b/gdb/config/ns32k/xm-merlin.h
@@ -0,0 +1,65 @@
+/* Definitions to make GDB run on a merlin under utek 2.1
+ Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include <machine/reg.h>
+
+/* This machine doesn't have the siginterrupt call. */
+#define NO_SIGINTERRUPT
+
+/* Under Utek, a ptrace'd process can be the only active process for
+ an executable. Therefore instead of /bin/sh use gdb-sh (which should
+ just be a copy of /bin/sh which is world readable and writeable). */
+/* FIXME: name should be passed in from Makefile so it can use prefix. */
+#define SHELL_FILE "/usr/local/lib/gdb-sh"
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0xfef000)
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ \
+ switch (regno) { \
+ case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: \
+ addr = blockend + (R0 - regno) * sizeof (int); break; \
+ case PC_REGNUM: \
+ addr = blockend + PC * sizeof (int); break; \
+ case SP_REGNUM: \
+ addr = blockend + SP * sizeof (int); break; \
+ case FP_REGNUM: \
+ addr = blockend + FP * sizeof (int); break; \
+ case PS_REGNUM: \
+ addr = blockend + 12 * sizeof (int); break; \
+ case FPS_REGNUM: \
+ addr = 108; break; \
+ case FP0_REGNUM + 0: case FP0_REGNUM + 1: \
+ case FP0_REGNUM + 2: case FP0_REGNUM + 3: \
+ case FP0_REGNUM + 4: case FP0_REGNUM + 5: \
+ case FP0_REGNUM + 6: case FP0_REGNUM + 7: \
+ addr = 76 + (regno - FP0_REGNUM) * sizeof (float); break; \
+ case LP0_REGNUM + 0: case LP0_REGNUM + 1: \
+ case LP0_REGNUM + 2: case LP0_REGNUM + 3: \
+ addr = 76 + (regno - LP0_REGNUM) * sizeof (double); break; \
+ default: \
+ printf ("bad argument to REGISTER_U_ADDR %d\n", regno); \
+ abort (); \
+ } \
+}
diff --git a/gdb/config/ns32k/xm-nbsd.h b/gdb/config/ns32k/xm-nbsd.h
new file mode 100644
index 0000000..db8c0bc
--- /dev/null
+++ b/gdb/config/ns32k/xm-nbsd.h
@@ -0,0 +1,21 @@
+/* Parameters for execution on a ns32k running NetBSD, for GDB.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/ns32k/xm-ns32km3.h b/gdb/config/ns32k/xm-ns32km3.h
new file mode 100644
index 0000000..3d08e67
--- /dev/null
+++ b/gdb/config/ns32k/xm-ns32km3.h
@@ -0,0 +1,23 @@
+/* Definitions to make GDB run on Mach 3 on an National ns32k
+ Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* Do implement the attach and detach commands. */
+#define ATTACH_DETACH 1
diff --git a/gdb/config/ns32k/xm-umax.h b/gdb/config/ns32k/xm-umax.h
new file mode 100644
index 0000000..1bb0071
--- /dev/null
+++ b/gdb/config/ns32k/xm-umax.h
@@ -0,0 +1,26 @@
+/* Definitions to make GDB run on an encore under umax 4.2
+ Copyright 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+#define HAVE_WAIT_STRUCT
+
+/* Doesn't have siginterupt. */
+#define NO_SIGINTERRUPT
+
diff --git a/gdb/config/pa/hppabsd.mh b/gdb/config/pa/hppabsd.mh
new file mode 100644
index 0000000..dfd2d4c
--- /dev/null
+++ b/gdb/config/pa/hppabsd.mh
@@ -0,0 +1,7 @@
+# Host: Hewlett-Packard PA-RISC machine, running BSD
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-hppab.h
+NAT_FILE= nm-hppab.h
+NATDEPFILES= hppab-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
+
+GDBSERVER_DEPFILES= low-hppabsd.o
diff --git a/gdb/config/pa/hppabsd.mt b/gdb/config/pa/hppabsd.mt
new file mode 100644
index 0000000..0fc0380
--- /dev/null
+++ b/gdb/config/pa/hppabsd.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running bsd
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppab.h
diff --git a/gdb/config/pa/hppahpux.mh b/gdb/config/pa/hppahpux.mh
new file mode 100644
index 0000000..0d30244
--- /dev/null
+++ b/gdb/config/pa/hppahpux.mh
@@ -0,0 +1,9 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX
+
+XM_FILE= xm-hppah.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-hppah.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hppahpux.mt b/gdb/config/pa/hppahpux.mt
new file mode 100644
index 0000000..dddb3f5
--- /dev/null
+++ b/gdb/config/pa/hppahpux.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running hpux
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/hppaosf.mh b/gdb/config/pa/hppaosf.mh
new file mode 100644
index 0000000..6bde9c0
--- /dev/null
+++ b/gdb/config/pa/hppaosf.mh
@@ -0,0 +1,9 @@
+# Host: Hewlett-Packard PA-RISC machine, running BSD
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-hppab.h
+NAT_FILE= nm-hppao.h
+NATDEPFILES= fork-child.o m3-nat.o hppam3-nat.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
+NAT_CLIBS= -lmachid -lnetname -lmach
+
+GDBSERVER_DEPFILES= low-hppabsd.o
+
diff --git a/gdb/config/pa/hppaosf.mt b/gdb/config/pa/hppaosf.mt
new file mode 100644
index 0000000..6754023
--- /dev/null
+++ b/gdb/config/pa/hppaosf.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running OSF1
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppao.h
diff --git a/gdb/config/pa/hppapro.mt b/gdb/config/pa/hppapro.mt
new file mode 100644
index 0000000..4851b18
--- /dev/null
+++ b/gdb/config/pa/hppapro.mt
@@ -0,0 +1,3 @@
+# Target: PA based debug monitor
+TDEPFILES= hppa-tdep.o op50-rom.o w89k-rom.o monitor.o xmodem.o dsrec.o
+TM_FILE= tm-pro.h
diff --git a/gdb/config/pa/hpux1020.mh b/gdb/config/pa/hpux1020.mh
new file mode 100644
index 0000000..28eae11
--- /dev/null
+++ b/gdb/config/pa/hpux1020.mh
@@ -0,0 +1,11 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX 10.20
+
+MH_CFLAGS = -D__HP_CURSES
+
+XM_FILE= xm-hppah.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-hppah.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infptrace.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hpux1020.mt b/gdb/config/pa/hpux1020.mt
new file mode 100644
index 0000000..a856d8c
--- /dev/null
+++ b/gdb/config/pa/hpux1020.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running hpux
+TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o corelow.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/hpux1100.mh b/gdb/config/pa/hpux1100.mh
new file mode 100644
index 0000000..10fbd7e
--- /dev/null
+++ b/gdb/config/pa/hpux1100.mh
@@ -0,0 +1,11 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX 11.00
+
+MH_CFLAGS = -D__HP_CURSES
+
+XM_FILE= xm-hppah.h
+XDEPFILES= ser-tcp.o
+
+NAT_FILE= nm-hppah11.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infttrace.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hpux1100.mt b/gdb/config/pa/hpux1100.mt
new file mode 100644
index 0000000..405f73a
--- /dev/null
+++ b/gdb/config/pa/hpux1100.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running HPUX 11.00
+TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/nm-hppab.h b/gdb/config/pa/nm-hppab.h
new file mode 100644
index 0000000..6b63674
--- /dev/null
+++ b/gdb/config/pa/nm-hppab.h
@@ -0,0 +1,135 @@
+/* HPPA PA-RISC machine native support for BSD, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "somsolib.h"
+
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* 3rd argument to ptrace is supposed to be a caddr_t. */
+
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+ with five arguments, so programs written for normal ptrace lose. */
+#define FIVE_ARG_PTRACE
+
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+ are effectively unavailable to the user through ptrace(). It allows
+ us to include the whole register set in REGISTER_NAMES (inorder to
+ better support remote debugging). If it is used in
+ fetch/store_inferior_registers() gdb will not complain about I/O errors
+ on fetching these registers. If all registers in REGISTER_NAMES
+ are available, then return false (0). */
+
+#define CANNOT_STORE_REGISTER(regno) \
+ ((regno) == 0) || \
+ ((regno) == PCSQ_HEAD_REGNUM) || \
+ ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
+ ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* fetch_inferior_registers is in hppab-nat.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+/* attach/detach works to some extent under BSD and HPUX. So long
+ as the process you're attaching to isn't blocked waiting on io,
+ blocked waiting on a signal, or in a system call things work
+ fine. (The problems in those cases are related to the fact that
+ the kernel can't provide complete register information for the
+ target process... Which really pisses off GDB.) */
+
+#define ATTACH_DETACH
+
+/* The PA-BSD kernel has support for using the data memory break bit
+ to implement fast watchpoints.
+
+ Watchpoints on the PA act much like traditional page protection
+ schemes, but with some notable differences.
+
+ First, a special bit in the page table entry is used to cause
+ a trap when a specific page is written to. This avoids having
+ to overload watchpoints on the page protection bits. This makes
+ it possible for the kernel to easily decide if a trap was caused
+ by a watchpoint or by the user writing to protected memory and can
+ signal the user program differently in each case.
+
+ Second, the PA has a bit in the processor status word which causes
+ data memory breakpoints (aka watchpoints) to be disabled for a single
+ instruction. This bit can be used to avoid the overhead of unprotecting
+ and reprotecting pages when it becomes necessary to step over a watchpoint.
+
+
+ When the kernel receives a trap indicating a write to a page which
+ is being watched, the kernel performs a couple of simple actions. First
+ is sets the magic "disable memory breakpoint" bit in the processor
+ status word, it then sends a SIGTRAP to the process which caused the
+ trap.
+
+ GDB will take control and catch the signal for the inferior. GDB then
+ examines the PSW-X bit to determine if the SIGTRAP was caused by a
+ watchpoint firing. If so GDB single steps the inferior over the
+ instruction which caused the watchpoint to trigger (note because the
+ kernel disabled the data memory break bit for one instruction no trap
+ will be taken!). GDB will then determines the appropriate action to
+ take. (this may include restarting the inferior if the watchpoint
+ fired because of a write to an address on the same page as a watchpoint,
+ but no write to the watched address occured). */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS /* Enable the code in procfs.c */
+
+/* The PA can watch any number of locations, there's no need for it to reject
+ anything (generic routines already check that all intermediates are
+ in memory). */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ ((type) == bp_hardware_watchpoint)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+ instruction which caused the watchpoint. It will be necessary for
+ GDB to step over the watchpoint.
+
+ On a PA running BSD, it is trivial to identify when it will be
+ necessary to step over a hardware watchpoint as we can examine
+ the PSW-X bit. If the bit is on, then we trapped because of a
+ watchpoint, else we trapped for some other reason. */
+#define STOPPED_BY_WATCHPOINT(W) \
+ ((W).kind == TARGET_WAITKIND_STOPPED \
+ && (W).value.sig == TARGET_SIGNAL_TRAP \
+ && ((int) read_register (IPSW_REGNUM) & 0x00100000))
+
+/* The PA can single step over a watchpoint if the kernel has set the
+ "X" bit in the processor status word (disable data memory breakpoint
+ for one instruction).
+
+ The kernel will always set this bit before notifying the inferior
+ that it hit a watchpoint. Thus, the inferior can single step over
+ the instruction which caused the watchpoint to fire. This avoids
+ the traditional need to disable the watchpoint, step the inferior,
+ then enable the watchpoint again. */
+#define HAVE_STEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion. */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 1)
+#define target_remove_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 0)
diff --git a/gdb/config/pa/nm-hppah.h b/gdb/config/pa/nm-hppah.h
new file mode 100644
index 0000000..0f5ef01
--- /dev/null
+++ b/gdb/config/pa/nm-hppah.h
@@ -0,0 +1,281 @@
+/* Native support for HPPA-RISC machine running HPUX, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+ with five arguments, so programs written for normal ptrace lose. */
+#define FIVE_ARG_PTRACE
+
+/* We need to figure out where the text region is so that we use the
+ appropriate ptrace operator to manipulate text. Simply reading/writing
+ user space will crap out HPUX. */
+#define NEED_TEXT_START_END 1
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+ are effectively unavailable to the user through ptrace(). It allows
+ us to include the whole register set in REGISTER_NAMES (inorder to
+ better support remote debugging). If it is used in
+ fetch/store_inferior_registers() gdb will not complain about I/O errors
+ on fetching these registers. If all registers in REGISTER_NAMES
+ are available, then return false (0). */
+
+#define CANNOT_STORE_REGISTER(regno) \
+ ((regno) == 0) || \
+ ((regno) == PCSQ_HEAD_REGNUM) || \
+ ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
+ ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* In hppah-nat.c: */
+#define FETCH_INFERIOR_REGISTERS
+#define CHILD_XFER_MEMORY
+#define CHILD_POST_FOLLOW_INFERIOR_BY_CLONE
+#define CHILD_POST_FOLLOW_VFORK
+
+/* While this is for use by threaded programs, it doesn't appear
+ * to hurt non-threaded ones. This is used in infrun.c: */
+#define PREPARE_TO_PROCEED() hppa_prepare_to_proceed()
+extern int hppa_prepare_to_proceed PARAMS(( void ));
+
+/* In infptrace.c or infttrace.c: */
+#define CHILD_PID_TO_EXEC_FILE
+#define CHILD_POST_STARTUP_INFERIOR
+#define CHILD_ACKNOWLEDGE_CREATED_INFERIOR
+#define CHILD_INSERT_FORK_CATCHPOINT
+#define CHILD_REMOVE_FORK_CATCHPOINT
+#define CHILD_INSERT_VFORK_CATCHPOINT
+#define CHILD_REMOVE_VFORK_CATCHPOINT
+#define CHILD_HAS_FORKED
+#define CHILD_HAS_VFORKED
+#define CHILD_CAN_FOLLOW_VFORK_PRIOR_TO_EXEC
+#define CHILD_INSERT_EXEC_CATCHPOINT
+#define CHILD_REMOVE_EXEC_CATCHPOINT
+#define CHILD_HAS_EXECD
+#define CHILD_REPORTED_EXEC_EVENTS_PER_EXEC_CALL
+#define CHILD_HAS_SYSCALL_EVENT
+#define CHILD_POST_ATTACH
+#define CHILD_THREAD_ALIVE
+
+#define REQUIRE_ATTACH(pid) hppa_require_attach(pid)
+extern int hppa_require_attach PARAMS ((int));
+
+#define REQUIRE_DETACH(pid,signal) hppa_require_detach(pid,signal)
+extern int hppa_require_detach PARAMS ((int,int));
+
+/* So we can cleanly use code in infptrace.c. */
+#define PT_KILL PT_EXIT
+#define PT_STEP PT_SINGLE
+#define PT_CONTINUE PT_CONTIN
+
+/* FIXME HP MERGE : Previously, PT_RDUAREA. this is actually fixed
+ in gdb-hp-snapshot-980509 */
+#define PT_READ_U PT_RUAREA
+#define PT_WRITE_U PT_WUAREA
+#define PT_READ_I PT_RIUSER
+#define PT_READ_D PT_RDUSER
+#define PT_WRITE_I PT_WIUSER
+#define PT_WRITE_D PT_WDUSER
+
+/* attach/detach works to some extent under BSD and HPUX. So long
+ as the process you're attaching to isn't blocked waiting on io,
+ blocked waiting on a signal, or in a system call things work
+ fine. (The problems in those cases are related to the fact that
+ the kernel can't provide complete register information for the
+ target process... Which really pisses off GDB.) */
+
+#define ATTACH_DETACH
+
+/* In infptrace or infttrace.c: */
+
+/* Starting with HP-UX 10.30, support is provided (in the form of
+ ttrace requests) for memory-protection-based hardware watchpoints.
+
+ The 10.30 implementation of these functions reside in infttrace.c.
+
+ Stubs of these functions will be provided in infptrace.c, so that
+ 10.20 will at least link. However, the "can I use a fast watchpoint?"
+ query will always return "No" for 10.20. */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* The PA can watch any number of locations (generic routines already check
+ that all intermediates are in watchable memory locations). */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ hppa_can_use_hw_watchpoint(type, cnt, ot)
+
+/* The PA can also watch memory regions of arbitrary size, since we're using
+ a page-protection scheme. (On some targets, apparently watch registers
+ are used, which can only accomodate regions of REGISTER_SIZE.) */
+#define TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT(byte_count) \
+ (1)
+
+/* However, some addresses may not be profitable to use hardware to watch,
+ or may be difficult to understand when the addressed object is out of
+ scope, and hence should be unwatched. On some targets, this may have
+ severe performance penalties, such that we might as well use regular
+ watchpoints, and save (possibly precious) hardware watchpoints for other
+ locations.
+
+ On HP-UX, we choose not to watch stack-based addresses, because
+
+ [1] Our implementation relies on page protection traps. The granularity
+ of these is large and so can generate many false hits, which are expensive
+ to respond to.
+
+ [2] Watches of "*p" where we may not know the symbol that p points to,
+ make it difficult to know when the addressed object is out of scope, and
+ hence shouldn't be watched. Page protection that isn't removed when the
+ addressed object is out of scope will either degrade execution speed
+ (false hits) or give false triggers (when the address is recycled by
+ other calls).
+
+ Since either of these points results in a slow-running inferior, we might
+ as well use normal watchpoints, aka single-step & test. */
+#define TARGET_RANGE_PROFITABLE_FOR_HW_WATCHPOINT(pid,start,len) \
+ hppa_range_profitable_for_hw_watchpoint(pid, start, (LONGEST)(len))
+
+/* On HP-UX, we're using page-protection to implement hardware watchpoints.
+ When an instruction attempts to write to a write-protected memory page,
+ a SIGBUS is raised. At that point, the write has not actually occurred.
+
+ We must therefore remove page-protections; single-step the inferior (to
+ allow the write to happen); restore page-protections; and check whether
+ any watchpoint triggered.
+
+ If none did, then the write was to a "nearby" location that just happens
+ to fall on the same page as a watched location, and so can be ignored.
+
+ The only intended client of this macro is wait_for_inferior(), in infrun.c.
+ When HAVE_NONSTEPPABLE_WATCHPOINT is true, that function will take care
+ of the stepping & etc. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ ((W.kind == TARGET_WAITKIND_STOPPED) && \
+ (stop_signal == TARGET_SIGNAL_BUS) && \
+ ! stepped_after_stopped_by_watchpoint && \
+ bpstat_have_active_hw_watchpoints ())
+
+/* When a hardware watchpoint triggers, we'll move the inferior past it
+ by removing all eventpoints; stepping past the instruction that caused
+ the trigger; reinserting eventpoints; and checking whether any watched
+ location changed. */
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Our implementation of "hardware" watchpoints uses memory page-protection
+ faults. However, HP-UX has unfortunate interactions between these and
+ system calls; basically, it's unsafe to have page protections on when a
+ syscall is running. Therefore, we also ask for notification of syscall
+ entries and returns. When the inferior enters a syscall, we disable
+ h/w watchpoints. When the inferior returns from a syscall, we reenable
+ h/w watchpoints.
+
+ infptrace.c supplies dummy versions of these; infttrace.c is where the
+ meaningful implementations are.
+ */
+#define TARGET_ENABLE_HW_WATCHPOINTS(pid) \
+ hppa_enable_page_protection_events (pid)
+extern void hppa_enable_page_protection_events PARAMS ((int));
+
+#define TARGET_DISABLE_HW_WATCHPOINTS(pid) \
+ hppa_disable_page_protection_events (pid)
+extern void hppa_disable_page_protection_events PARAMS ((int));
+
+/* Use these macros for watchpoint insertion/deletion. */
+#define target_insert_watchpoint(addr, len, type) \
+ hppa_insert_hw_watchpoint (inferior_pid, addr, (LONGEST)(len), type)
+
+#define target_remove_watchpoint(addr, len, type) \
+ hppa_remove_hw_watchpoint (inferior_pid, addr, (LONGEST)(len), type)
+
+/* We call our k-thread processes "threads", rather
+ * than processes. So we need a new way to print
+ * the string. Code is in hppah-nat.c.
+ */
+#define target_pid_to_str( pid ) \
+ hppa_pid_to_str( pid )
+extern char * hppa_pid_to_str PARAMS ((pid_t));
+
+#define target_tid_to_str( pid ) \
+ hppa_tid_to_str( pid )
+extern char * hppa_tid_to_str PARAMS ((pid_t));
+
+/* For this, ID can be either a process or thread ID, and the function
+ will describe it appropriately, returning the description as a printable
+ string.
+
+ The function that implements this macro is defined in infptrace.c and
+ infttrace.c.
+ */
+#define target_pid_or_tid_to_str(ID) \
+ hppa_pid_or_tid_to_str (ID)
+extern char * hppa_pid_or_tid_to_str PARAMS ((pid_t));
+
+/* This is used when handling events caused by a call to vfork(). On ptrace-
+ based HP-UXs, when you resume the vforked child, the parent automagically
+ begins running again. To prevent this runaway, this function is used.
+
+ Note that for vfork on HP-UX, we receive three events of interest:
+
+ 1. the vfork event for the new child process
+ 2. the exit or exec event of the new child process (actually, you get
+ two exec events on ptrace-based HP-UXs)
+ 3. the vfork event for the original parent process
+
+ The first is always received first. The other two may be received in any
+ order; HP-UX doesn't guarantee an order.
+ */
+#define ENSURE_VFORKING_PARENT_REMAINS_STOPPED(PID) \
+ hppa_ensure_vforking_parent_remains_stopped (PID)
+extern void hppa_ensure_vforking_parent_remains_stopped PARAMS((int));
+
+/* This is used when handling events caused by a call to vfork().
+
+ On ttrace-based HP-UXs, the parent vfork and child exec arrive more or less
+ together. That is, you could do two wait()s without resuming either parent
+ or child, and get both events.
+
+ On ptrace-based HP-UXs, you must resume the child after its exec event is
+ delivered or you won't get the parent's vfork. I.e., you can't just wait()
+ and get the parent vfork, after receiving the child exec.
+ */
+#define RESUME_EXECD_VFORKING_CHILD_TO_GET_PARENT_VFORK() \
+ hppa_resume_execd_vforking_child_to_get_parent_vfork ()
+extern int hppa_resume_execd_vforking_child_to_get_parent_vfork PARAMS ((void));
+
+#ifdef HAVE_HPUX_THREAD_SUPPORT
+
+#ifdef __STDC__
+struct objfile;
+#endif
+
+void hpux_thread_new_objfile PARAMS ((struct objfile *objfile));
+#define target_new_objfile(OBJFILE) hpux_thread_new_objfile (OBJFILE)
+
+extern char *hpux_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) hpux_pid_to_str (PID)
+
+#endif /* HAVE_HPUX_THREAD_SUPPORT */
+
+#define HPUXHPPA
diff --git a/gdb/config/pa/nm-hppah11.h b/gdb/config/pa/nm-hppah11.h
new file mode 100644
index 0000000..7a73c24
--- /dev/null
+++ b/gdb/config/pa/nm-hppah11.h
@@ -0,0 +1,22 @@
+/* Native support for HPPA-RISC machine running HPUX 11.x, for GDB.
+ Copyright 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDB_NATIVE_HPUX_11
+
+#include "pa/nm-hppah.h"
diff --git a/gdb/config/pa/nm-hppao.h b/gdb/config/pa/nm-hppao.h
new file mode 100644
index 0000000..a09dfd1
--- /dev/null
+++ b/gdb/config/pa/nm-hppao.h
@@ -0,0 +1,56 @@
+/* HPPA PA-RISC machine native support for Lites, for GDB.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "nm-m3.h"
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+ are effectively unavailable to the user through ptrace(). It allows
+ us to include the whole register set in REGISTER_NAMES (inorder to
+ better support remote debugging). If it is used in
+ fetch/store_inferior_registers() gdb will not complain about I/O errors
+ on fetching these registers. If all registers in REGISTER_NAMES
+ are available, then return false (0). */
+
+#define CANNOT_STORE_REGISTER(regno) \
+ ((regno) == 0) || \
+ ((regno) == PCSQ_HEAD_REGNUM) || \
+ ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
+ ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* fetch_inferior_registers is in hppab-nat.c. */
+#define FETCH_INFERIOR_REGISTERS
+
+/* attach/detach works to some extent under BSD and HPUX. So long
+ as the process you're attaching to isn't blocked waiting on io,
+ blocked waiting on a signal, or in a system call things work
+ fine. (The problems in those cases are related to the fact that
+ the kernel can't provide complete register information for the
+ target process... Which really pisses off GDB.) */
+
+#define ATTACH_DETACH
+
+#define EMULATOR_BASE 0x90100000
+#define EMULATOR_END 0x90200000
diff --git a/gdb/config/pa/tm-hppa.h b/gdb/config/pa/tm-hppa.h
new file mode 100644
index 0000000..559534a
--- /dev/null
+++ b/gdb/config/pa/tm-hppa.h
@@ -0,0 +1,788 @@
+/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
+ Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
+ Free Software Foundation, Inc.
+
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Forward declarations of some types we use in prototypes */
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+struct inferior_status;
+#endif
+
+/* Target system byte order. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* By default assume we don't have to worry about software floating point. */
+#ifndef SOFT_FLOAT
+#define SOFT_FLOAT 0
+#endif
+
+/* Get at various relevent fields of an instruction word. */
+
+#define MASK_5 0x1f
+#define MASK_11 0x7ff
+#define MASK_14 0x3fff
+#define MASK_21 0x1fffff
+
+/* This macro gets bit fields using HP's numbering (MSB = 0) */
+#ifndef GET_FIELD
+#define GET_FIELD(X, FROM, TO) \
+ ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+#endif
+
+/* Watch out for NaNs */
+
+#define IEEE_FLOAT
+
+/* On the PA, any pass-by-value structure > 8 bytes is actually
+ passed via a pointer regardless of its type or the compiler
+ used. */
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) \
+ (TYPE_LENGTH (type) > 8)
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) pc = skip_prologue (pc)
+extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR));
+
+/* If PC is in some function-call trampoline code, return the PC
+ where the function itself actually starts. If not, return NULL. */
+
+#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
+extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
+
+/* Return non-zero if we are in an appropriate trampoline. */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+ in_solib_call_trampoline (pc, name)
+extern int in_solib_call_trampoline PARAMS ((CORE_ADDR, char *));
+
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
+ in_solib_return_trampoline (pc, name)
+extern int in_solib_return_trampoline PARAMS ((CORE_ADDR, char *));
+
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#undef SAVED_PC_AFTER_CALL
+#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
+extern CORE_ADDR saved_pc_after_call PARAMS ((struct frame_info *));
+
+/* Stack grows upward */
+#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
+
+/* elz: adjust the quantity to the next highest value which is 64-bit aligned.
+ This is used in valops.c, when the sp is adjusted.
+ On hppa the sp must always be kept 64-bit aligned*/
+
+#define STACK_ALIGN(arg) ( ((arg)%8) ? (((arg)+7)&-8) : (arg))
+#define NO_EXTRA_ALIGNMENT_NEEDED 1
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
+#define BREAKPOINT32 0x10004
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always.
+
+ Not on the PA-RISC */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Sometimes we may pluck out a minimal symbol that has a negative
+ address.
+
+ An example of this occurs when an a.out is linked against a foo.sl.
+ The foo.sl defines a global bar(), and the a.out declares a signature
+ for bar(). However, the a.out doesn't directly call bar(), but passes
+ its address in another call.
+
+ If you have this scenario and attempt to "break bar" before running,
+ gdb will find a minimal symbol for bar() in the a.out. But that
+ symbol's address will be negative. What this appears to denote is
+ an index backwards from the base of the procedure linkage table (PLT)
+ into the data linkage table (DLT), the end of which is contiguous
+ with the start of the PLT. This is clearly not a valid address for
+ us to set a breakpoint on.
+
+ Note that one must be careful in how one checks for a negative address.
+ 0xc0000000 is a legitimate address of something in a shared text
+ segment, for example. Since I don't know what the possible range
+ is of these "really, truly negative" addresses that come from the
+ minimal symbols, I'm resorting to the gross hack of checking the
+ top byte of the address for all 1's. Sigh.
+ */
+#define PC_REQUIRES_RUN_BEFORE_USE(pc) \
+ (! target_has_stack && (pc & 0xFF000000))
+
+/* return instruction is bv r0(rp) or bv,n r0(rp)*/
+
+#define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 128
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer.
+ They are in rows of eight entries */
+
+#define REGISTER_NAMES \
+ {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+ "r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
+ "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
+ "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
+ "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
+ "cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
+ "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
+ "fr4", "fr4R", "fr5", "fr5R", "fr6", "fr6R", "fr7", "fr7R", \
+ "fr8", "fr8R", "fr9", "fr9R", "fr10", "fr10R", "fr11", "fr11R", \
+ "fr12", "fr12R", "fr13", "fr13R", "fr14", "fr14R", "fr15", "fr15R", \
+ "fr16", "fr16R", "fr17", "fr17R", "fr18", "fr18R", "fr19", "fr19R", \
+ "fr20", "fr20R", "fr21", "fr21R", "fr22", "fr22R", "fr23", "fr23R", \
+ "fr24", "fr24R", "fr25", "fr25R", "fr26", "fr26R", "fr27", "fr27R", \
+ "fr28", "fr28R", "fr29", "fr29R", "fr30", "fr30R", "fr31", "fr31R"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define R0_REGNUM 0 /* Doesn't actually exist, used as base for
+ other r registers. */
+#define FLAGS_REGNUM 0 /* Various status flags */
+#define RP_REGNUM 2 /* return pointer */
+#define FP_REGNUM 3 /* Contains address of executing stack */
+ /* frame */
+#define SP_REGNUM 30 /* Contains address of top of stack */
+#define SAR_REGNUM 32 /* Shift Amount Register */
+#define IPSW_REGNUM 41 /* Interrupt Processor Status Word */
+#define PCOQ_HEAD_REGNUM 33 /* instruction offset queue head */
+#define PCSQ_HEAD_REGNUM 34 /* instruction space queue head */
+#define PCOQ_TAIL_REGNUM 35 /* instruction offset queue tail */
+#define PCSQ_TAIL_REGNUM 36 /* instruction space queue tail */
+#define EIEM_REGNUM 37 /* External Interrupt Enable Mask */
+#define IIR_REGNUM 38 /* Interrupt Instruction Register */
+#define IOR_REGNUM 40 /* Interrupt Offset Register */
+#define SR4_REGNUM 43 /* space register 4 */
+#define RCR_REGNUM 51 /* Recover Counter (also known as cr0) */
+#define CCR_REGNUM 54 /* Coprocessor Configuration Register */
+#define TR0_REGNUM 57 /* Temporary Registers (cr24 -> cr31) */
+#define CR27_REGNUM 60 /* Base register for thread-local storage, cr27 */
+#define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
+#define FP4_REGNUM 72
+
+#define ARG0_REGNUM 26 /* The first argument of a callee. */
+#define ARG1_REGNUM 25 /* The second argument of a callee. */
+#define ARG2_REGNUM 24 /* The third argument of a callee. */
+#define ARG3_REGNUM 23 /* The fourth argument of a callee. */
+
+/* compatibility with the rest of gdb. */
+#define PC_REGNUM PCOQ_HEAD_REGNUM
+#define NPC_REGNUM PCOQ_TAIL_REGNUM
+
+/*
+ * Processor Status Word Masks
+ */
+
+#define PSW_T 0x01000000 /* Taken Branch Trap Enable */
+#define PSW_H 0x00800000 /* Higher-Privilege Transfer Trap Enable */
+#define PSW_L 0x00400000 /* Lower-Privilege Transfer Trap Enable */
+#define PSW_N 0x00200000 /* PC Queue Front Instruction Nullified */
+#define PSW_X 0x00100000 /* Data Memory Break Disable */
+#define PSW_B 0x00080000 /* Taken Branch in Previous Cycle */
+#define PSW_C 0x00040000 /* Code Address Translation Enable */
+#define PSW_V 0x00020000 /* Divide Step Correction */
+#define PSW_M 0x00010000 /* High-Priority Machine Check Disable */
+#define PSW_CB 0x0000ff00 /* Carry/Borrow Bits */
+#define PSW_R 0x00000010 /* Recovery Counter Enable */
+#define PSW_Q 0x00000008 /* Interruption State Collection Enable */
+#define PSW_P 0x00000004 /* Protection ID Validation Enable */
+#define PSW_D 0x00000002 /* Data Address Translation Enable */
+#define PSW_I 0x00000001 /* External, Power Failure, Low-Priority */
+ /* Machine Check Interruption Enable */
+
+/* When fetching register values from an inferior or a core file,
+ clean them up using this macro. BUF is a char pointer to
+ the raw value of the register in the registers[] array. */
+
+#define CLEAN_UP_REGISTER_VALUE(regno, buf) \
+ do { \
+ if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
+ (buf)[3] &= ~0x3; \
+ } while (0)
+
+/* Define DO_REGISTERS_INFO() to do machine-specific formatting
+ of register dumps. */
+
+#define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
+extern void pa_do_registers_info PARAMS ((int, int));
+
+#if 0
+#define STRCAT_REGISTER(regnum, fpregs, stream, precision) pa_do_strcat_registers_info (regnum, fpregs, stream, precision)
+extern void pa_do_strcat_registers_info PARAMS ((int, int, GDB_FILE *, enum precision_type));
+#endif
+
+/* PA specific macro to see if the current instruction is nullified. */
+#ifndef INSTRUCTION_NULLIFIED
+#define INSTRUCTION_NULLIFIED \
+ (((int)read_register (IPSW_REGNUM) & 0x00200000) && \
+ !((int)read_register (FLAGS_REGNUM) & 0x2))
+#endif
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the PA-RISC, all regs are 4 bytes, including
+ the FP registers (they're accessed as two 4 byte halves). */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) (N) * 4
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF.
+
+ elz: changed what to return when length is > 4: the stored result is
+ in register 28 and in register 29, with the lower order word being in reg 29,
+ so we must start reading it from somehere in the middle of reg28
+
+ FIXME: Not sure what to do for soft float here. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ { \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
+ memcpy ((VALBUF), \
+ ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM), \
+ TYPE_LENGTH (TYPE)); \
+ else \
+ memcpy ((VALBUF), \
+ (char *)(REGBUF) + REGISTER_BYTE (28) + \
+ (TYPE_LENGTH (TYPE) > 4 ? (8 - TYPE_LENGTH (TYPE)) : (4 - TYPE_LENGTH (TYPE))), \
+ TYPE_LENGTH (TYPE)); \
+ }
+
+
+ /* elz: decide whether the function returning a value of type type
+ will put it on the stack or in the registers.
+ The pa calling convention says that:
+ register 28 (called ret0 by gdb) contains any ASCII char,
+ and any non_floating point value up to 32-bits.
+ reg 28 and 29 contain non-floating point up tp 64 bits and larger
+ than 32 bits. (higer order word in reg 28).
+ fr4: floating point up to 64 bits
+ sr1: space identifier (32-bit)
+ stack: any lager than 64-bit, with the address in r28
+ */
+extern use_struct_convention_fn hppa_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p,type) hppa_use_struct_convention (gcc_p,type)
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format.
+
+ For software floating point the return value goes into the integer
+ registers. But we don't have any flag to key this on, so we always
+ store the value into the integer registers, and if it's a float value,
+ then we put it in the float registers too. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE (28),(VALBUF), TYPE_LENGTH (TYPE)) ; \
+ if (!SOFT_FLOAT) \
+ write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_FLT \
+ ? REGISTER_BYTE (FP4_REGNUM) \
+ : REGISTER_BYTE (28)), \
+ (VALBUF), TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (*(int *)((REGBUF) + REGISTER_BYTE (28)))
+
+/* elz: Return a large value, which is stored on the stack at addr.
+ This is defined only for the hppa, at this moment.
+ The above macro EXTRACT_STRUCT_VALUE_ADDRESS is not called anymore,
+ because it assumes that on exit from a called function which returns
+ a large structure on the stack, the address of the ret structure is
+ still in register 28. Unfortunately this register is usually overwritten
+ by the called function itself, on hppa. This is specified in the calling
+ convention doc. As far as I know, the only way to get the return value
+ is to have the caller tell us where it told the callee to put it, rather
+ than have the callee tell us.
+*/
+#define VALUE_RETURNED_FROM_STACK(valtype,addr) \
+ hppa_value_returned_from_stack (valtype, addr)
+
+/*
+ * This macro defines the register numbers (from REGISTER_NAMES) that
+ * are effectively unavailable to the user through ptrace(). It allows
+ * us to include the whole register set in REGISTER_NAMES (inorder to
+ * better support remote debugging). If it is used in
+ * fetch/store_inferior_registers() gdb will not complain about I/O errors
+ * on fetching these registers. If all registers in REGISTER_NAMES
+ * are available, then return false (0).
+ */
+
+#define CANNOT_STORE_REGISTER(regno) \
+ ((regno) == 0) || \
+ ((regno) == PCSQ_HEAD_REGNUM) || \
+ ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
+ ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
+extern void init_extra_frame_info PARAMS ((int, struct frame_info *));
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer.
+
+ FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
+ and produces the nominal address of the caller frame.
+
+ However, if FRAME_CHAIN_VALID returns zero,
+ it means the given frame is the outermost one and has no caller.
+ In that case, FRAME_CHAIN_COMBINE is not used. */
+
+/* In the case of the PA-RISC, the frame's nominal address
+ is the address of a 4-byte word containing the calling frame's
+ address (previous FP). */
+
+#define FRAME_CHAIN(thisframe) frame_chain (thisframe)
+extern CORE_ADDR frame_chain PARAMS ((struct frame_info *));
+
+extern int hppa_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
+#define FRAME_CHAIN_VALID(chain, thisframe) hppa_frame_chain_valid (chain, thisframe)
+
+#define FRAME_CHAIN_COMBINE(chain, thisframe) (chain)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_function_invocation(FI)
+extern int frameless_function_invocation PARAMS ((struct frame_info *));
+
+extern CORE_ADDR hppa_frame_saved_pc PARAMS ((struct frame_info *frame));
+#define FRAME_SAVED_PC(FRAME) hppa_frame_saved_pc (FRAME)
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
+extern void
+hppa_frame_find_saved_regs PARAMS ((struct frame_info *,
+ struct frame_saved_regs *));
+
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME push_dummy_frame (&inf_status)
+extern void push_dummy_frame PARAMS ((struct inferior_status *));
+
+/* Discard from the stack the innermost frame,
+ restoring all saved registers. */
+#define POP_FRAME hppa_pop_frame ()
+extern void hppa_pop_frame PARAMS ((void));
+
+#define INSTRUCTION_SIZE 4
+
+#ifndef PA_LEVEL_0
+
+/* Non-level zero PA's have space registers (but they don't always have
+ floating-point, do they???? */
+
+/* This sequence of words is the instructions
+
+; Call stack frame has already been built by gdb. Since we could be calling
+; a varargs function, and we do not have the benefit of a stub to put things in
+; the right place, we load the first 4 word of arguments into both the general
+; and fp registers.
+call_dummy
+ ldw -36(sp), arg0
+ ldw -40(sp), arg1
+ ldw -44(sp), arg2
+ ldw -48(sp), arg3
+ ldo -36(sp), r1
+ fldws 0(0, r1), fr4
+ fldds -4(0, r1), fr5
+ fldws -8(0, r1), fr6
+ fldds -12(0, r1), fr7
+ ldil 0, r22 ; FUNC_LDIL_OFFSET must point here
+ ldo 0(r22), r22 ; FUNC_LDO_OFFSET must point here
+ ldsid (0,r22), r4
+ ldil 0, r1 ; SR4EXPORT_LDIL_OFFSET must point here
+ ldo 0(r1), r1 ; SR4EXPORT_LDO_OFFSET must point here
+ ldsid (0,r1), r20
+ combt,=,n r4, r20, text_space ; If target is in data space, do a
+ ble 0(sr5, r22) ; "normal" procedure call
+ copy r31, r2
+ break 4, 8
+ mtsp r21, sr0
+ ble,n 0(sr0, r22)
+text_space ; Otherwise, go through _sr4export,
+ ble (sr4, r1) ; which will return back here.
+ stw r31,-24(r30)
+ break 4, 8
+ mtsp r21, sr0
+ ble,n 0(sr0, r22)
+ nop ; To avoid kernel bugs
+ nop ; and keep the dummy 8 byte aligned
+
+ The dummy decides if the target is in text space or data space. If
+ it's in data space, there's no problem because the target can
+ return back to the dummy. However, if the target is in text space,
+ the dummy calls the secret, undocumented routine _sr4export, which
+ calls a function in text space and can return to any space. Instead
+ of including fake instructions to represent saved registers, we
+ know that the frame is associated with the call dummy and treat it
+ specially.
+
+ The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1
+ kernels. If the memory at the location pointed to by the PC is
+ 0xffffffff then a ptrace step call will fail (even if the instruction
+ is nullified).
+
+ The code to pop a dummy frame single steps three instructions
+ starting with the last mtsp. This includes the nullified "instruction"
+ following the ble (which is uninitialized junk). If the
+ "instruction" following the last BLE is 0xffffffff, then the ptrace
+ will fail and the dummy frame is not correctly popped.
+
+ By placing a NOP in the delay slot of the BLE instruction we can be
+ sure that we never try to execute a 0xffffffff instruction and
+ avoid the kernel bug. The second NOP is needed to keep the call
+ dummy 8 byte aligned. */
+
+/* Define offsets into the call dummy for the target function address */
+#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
+#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
+
+/* Define offsets into the call dummy for the _sr4export address */
+#define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
+#define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
+
+#define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
+ 0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
+ 0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
+ 0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
+ 0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
+ 0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
+ 0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
+
+#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
+
+#else /* defined PA_LEVEL_0 */
+
+/* This is the call dummy for a level 0 PA. Level 0's don't have space
+ registers (or floating point??), so we skip all that inter-space call stuff,
+ and avoid touching the fp regs.
+
+call_dummy
+
+ ldw -36(%sp), %arg0
+ ldw -40(%sp), %arg1
+ ldw -44(%sp), %arg2
+ ldw -48(%sp), %arg3
+ ldil 0, %r31 ; FUNC_LDIL_OFFSET must point here
+ ldo 0(%r31), %r31 ; FUNC_LDO_OFFSET must point here
+ ble 0(%sr0, %r31)
+ copy %r31, %r2
+ break 4, 8
+ nop ; restore_pc_queue expects these
+ bv,n 0(%r22) ; instructions to be here...
+ nop
+*/
+
+/* Define offsets into the call dummy for the target function address */
+#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
+#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
+
+#define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
+ 0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
+ 0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
+
+#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
+
+#endif
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* If we've reached a trap instruction within the call dummy, then
+ we'll consider that to mean that we've reached the call dummy's
+ end after its successful completion. */
+#define CALL_DUMMY_HAS_COMPLETED(pc, sp, frame_address) \
+ (PC_IN_CALL_DUMMY((pc), (sp), (frame_address)) && \
+ (read_memory_integer((pc), 4) == BREAKPOINT32))
+
+/*
+ * Insert the specified number of args and function address
+ * into a call sequence of the above form stored at DUMMYNAME.
+ *
+ * On the hppa we need to call the stack dummy through $$dyncall.
+ * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
+ * real_pc, which is the location where gdb should start up the
+ * inferior to do the function call.
+ */
+
+#define FIX_CALL_DUMMY hppa_fix_call_dummy
+
+extern CORE_ADDR
+hppa_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR, int,
+ struct value **, struct type *, int));
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = hppa_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+hppa_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int,
+ CORE_ADDR));
+
+/* The low two bits of the PC on the PA contain the privilege level. Some
+ genius implementing a (non-GCC) compiler apparently decided this means
+ that "addresses" in a text section therefore include a privilege level,
+ and thus symbol tables should contain these bits. This seems like a
+ bonehead thing to do--anyway, it seems to work for our purposes to just
+ ignore those bits. */
+#define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
+
+#define GDB_TARGET_IS_HPPA
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/*
+ * Unwind table and descriptor.
+ */
+
+struct unwind_table_entry {
+ unsigned int region_start;
+ unsigned int region_end;
+
+ unsigned int Cannot_unwind : 1; /* 0 */
+ unsigned int Millicode : 1; /* 1 */
+ unsigned int Millicode_save_sr0 : 1; /* 2 */
+ unsigned int Region_description : 2; /* 3..4 */
+ unsigned int reserved1 : 1; /* 5 */
+ unsigned int Entry_SR : 1; /* 6 */
+ unsigned int Entry_FR : 4; /* number saved */ /* 7..10 */
+ unsigned int Entry_GR : 5; /* number saved */ /* 11..15 */
+ unsigned int Args_stored : 1; /* 16 */
+ unsigned int Variable_Frame : 1; /* 17 */
+ unsigned int Separate_Package_Body : 1; /* 18 */
+ unsigned int Frame_Extension_Millicode:1; /* 19 */
+ unsigned int Stack_Overflow_Check : 1; /* 20 */
+ unsigned int Two_Instruction_SP_Increment:1; /* 21 */
+ unsigned int Ada_Region : 1; /* 22 */
+ unsigned int cxx_info : 1; /* 23 */
+ unsigned int cxx_try_catch : 1; /* 24 */
+ unsigned int sched_entry_seq : 1; /* 25 */
+ unsigned int reserved2 : 1; /* 26 */
+ unsigned int Save_SP : 1; /* 27 */
+ unsigned int Save_RP : 1; /* 28 */
+ unsigned int Save_MRP_in_frame : 1; /* 29 */
+ unsigned int extn_ptr_defined : 1; /* 30 */
+ unsigned int Cleanup_defined : 1; /* 31 */
+
+ unsigned int MPE_XL_interrupt_marker: 1; /* 0 */
+ unsigned int HP_UX_interrupt_marker: 1; /* 1 */
+ unsigned int Large_frame : 1; /* 2 */
+ unsigned int Pseudo_SP_Set : 1; /* 3 */
+ unsigned int reserved4 : 1; /* 4 */
+ unsigned int Total_frame_size : 27; /* 5..31 */
+
+ /* This is *NOT* part of an actual unwind_descriptor in an object
+ file. It is *ONLY* part of the "internalized" descriptors that
+ we create from those in a file.
+ */
+ struct {
+ unsigned int stub_type : 4; /* 0..3 */
+ unsigned int padding : 28; /* 4..31 */
+ } stub_unwind;
+};
+
+/* HP linkers also generate unwinds for various linker-generated stubs.
+ GDB reads in the stubs from the $UNWIND_END$ subspace, then
+ "converts" them into normal unwind entries using some of the reserved
+ fields to store the stub type. */
+
+struct stub_unwind_entry
+{
+ /* The offset within the executable for the associated stub. */
+ unsigned stub_offset;
+
+ /* The type of stub this unwind entry describes. */
+ char type;
+
+ /* Unknown. Not needed by GDB at this time. */
+ char prs_info;
+
+ /* Length (in instructions) of the associated stub. */
+ short stub_length;
+};
+
+/* Sizes (in bytes) of the native unwind entries. */
+#define UNWIND_ENTRY_SIZE 16
+#define STUB_UNWIND_ENTRY_SIZE 8
+
+/* The gaps represent linker stubs used in MPE and space for future
+ expansion. */
+enum unwind_stub_types
+{
+ LONG_BRANCH = 1,
+ PARAMETER_RELOCATION = 2,
+ EXPORT = 10,
+ IMPORT = 11,
+};
+
+/* We use the objfile->obj_private pointer for two things:
+ *
+ * 1. An unwind table;
+ *
+ * 2. A pointer to any associated shared library object.
+ *
+ * #defines are used to help refer to these objects.
+ */
+
+/* Info about the unwind table associated with an object file.
+ *
+ * This is hung off of the "objfile->obj_private" pointer, and
+ * is allocated in the objfile's psymbol obstack. This allows
+ * us to have unique unwind info for each executable and shared
+ * library that we are debugging.
+ */
+struct obj_unwind_info {
+ struct unwind_table_entry *table; /* Pointer to unwind info */
+ struct unwind_table_entry *cache; /* Pointer to last entry we found */
+ int last; /* Index of last entry */
+};
+
+typedef struct obj_private_struct {
+ struct obj_unwind_info *unwind_info; /* a pointer */
+ struct so_list *so_info; /* a pointer */
+} obj_private_data_t;
+
+#if 0
+extern void target_write_pc PARAMS ((CORE_ADDR, int))
+extern CORE_ADDR target_read_pc PARAMS ((int));
+extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
+#endif
+
+#define TARGET_READ_PC(pid) target_read_pc (pid)
+extern CORE_ADDR target_read_pc PARAMS ((int));
+
+#define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
+extern void target_write_pc PARAMS ((CORE_ADDR, int));
+
+#define TARGET_READ_FP() target_read_fp (inferior_pid)
+extern CORE_ADDR target_read_fp PARAMS ((int));
+
+/* For a number of horrible reasons we may have to adjust the location
+ of variables on the stack. Ugh. */
+#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
+
+extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee.
+
+ For the pa, it appears that the debug info marks the parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are passed as doubles for the non-prototyped case and floats for
+ the prototyped case. Thus we choose to make the non-prototyped case work
+ for C and break the prototyped case, since the non-prototyped case is
+ probably much more common. (FIXME). */
+
+#define COERCE_FLOAT_TO_DOUBLE (current_language -> la_language == language_c)
diff --git a/gdb/config/pa/tm-hppab.h b/gdb/config/pa/tm-hppab.h
new file mode 100644
index 0000000..1cd438d
--- /dev/null
+++ b/gdb/config/pa/tm-hppab.h
@@ -0,0 +1,47 @@
+/* Parameters for execution on an HP PA-RISC machine running BSD, for GDB.
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu). */
+
+/* For BSD:
+
+ The signal context structure pointer is always saved at the base
+ of the frame + 0x4.
+
+ We get the PC & SP directly from the sigcontext structure itself.
+ For other registers we have to dive in a little deeper:
+
+ The hardware save state pointer is at offset 0x10 within the
+ signal context structure.
+
+ Within the hardware save state, registers are found in the same order
+ as the register numbers in GDB. */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+ int i; \
+ CORE_ADDR TMP; \
+ TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ TMP = read_memory_integer (TMP + 0x10, 4); \
+ for (i = 0; i < NUM_REGS; i++) \
+ { \
+ if (i == SP_REGNUM) \
+ (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+ else \
+ (FSR)->regs[i] = TMP + i * 4; \
+ } \
+}
+
+/* It's mostly just the common stuff. */
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-hppah.h b/gdb/config/pa/tm-hppah.h
new file mode 100644
index 0000000..a8f1166
--- /dev/null
+++ b/gdb/config/pa/tm-hppah.h
@@ -0,0 +1,79 @@
+/* Parameters for execution on an HP PA-RISC machine, running HPUX, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HPUX_SNAP1
+#define HPUX_SNAP2
+
+#include "somsolib.h"
+
+/* Actually, for a PA running HPUX the kernel calls the signal handler
+ without an intermediate trampoline. Luckily the kernel always sets
+ the return pointer for the signal handler to point to _sigreturn. */
+#define IN_SIGTRAMP(pc, name) (name && STREQ ("_sigreturn", name))
+
+/* For HPUX:
+
+ The signal context structure pointer is always saved at the base
+ of the frame which "calls" the signal handler. We only want to find
+ the hardware save state structure, which lives 10 32bit words into
+ sigcontext structure.
+
+ Within the hardware save state structure, registers are found in the
+ same order as the register numbers in GDB.
+
+ At one time we peeked at %r31 rather than the PC queues to determine
+ what instruction took the fault. This was done on purpose, but I don't
+ remember why. Looking at the PC queues is really the right way, and
+ I don't remember why that didn't work when this code was originally
+ written. */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + (43 * 4) , 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + (40 * 4), 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+ int i; \
+ CORE_ADDR TMP; \
+ TMP = (FRAME)->frame + (10 * 4); \
+ for (i = 0; i < NUM_REGS; i++) \
+ { \
+ if (i == SP_REGNUM) \
+ (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+ else \
+ (FSR)->regs[i] = TMP + i * 4; \
+ } \
+}
+
+/* For HP-UX on PA-RISC we have an implementation
+ for the exception handling target op (in hppa-tdep.c) */
+#define CHILD_ENABLE_EXCEPTION_CALLBACK
+#define CHILD_GET_CURRENT_EXCEPTION_EVENT
+
+/* Mostly it's common to all HPPA's. */
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-hppao.h b/gdb/config/pa/tm-hppao.h
new file mode 100644
index 0000000..7df4247
--- /dev/null
+++ b/gdb/config/pa/tm-hppao.h
@@ -0,0 +1,96 @@
+/* Parameters for execution on an HP PA-RISC machine running OSF1, for GDB.
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu). */
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+#define MACHINE_CPROC_SP_OFFSET 20
+#define MACHINE_CPROC_PC_OFFSET 16
+#define MACHINE_CPROC_FP_OFFSET 12
+
+/*
+ * Software defined PSW masks.
+ */
+#define PSW_SS 0x10000000 /* Kernel managed single step */
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define TRACE_FLAVOR HP800_THREAD_STATE
+#define TRACE_FLAVOR_SIZE HP800_THREAD_STATE_COUNT
+#define TRACE_SET(x,state) \
+ ((struct hp800_thread_state *)state)->cr22 |= PSW_SS
+#define TRACE_CLEAR(x,state) \
+ ((((struct hp800_thread_state *)state)->cr22 &= ~PSW_SS), 1)
+
+/* For OSF1 (Should be close if not identical to BSD, but I haven't
+ tested it yet):
+
+ The signal context structure pointer is always saved at the base
+ of the frame + 0x4.
+
+ We get the PC & SP directly from the sigcontext structure itself.
+ For other registers we have to dive in a little deeper:
+
+ The hardware save state pointer is at offset 0x10 within the
+ signal context structure.
+
+ Within the hardware save state, registers are found in the same order
+ as the register numbers in GDB. */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+ *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+ int i; \
+ CORE_ADDR TMP; \
+ TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+ TMP = read_memory_integer (TMP + 0x10, 4); \
+ for (i = 0; i < NUM_REGS; i++) \
+ { \
+ if (i == SP_REGNUM) \
+ (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+ else \
+ (FSR)->regs[i] = TMP + i * 4; \
+ } \
+}
+
+/* OSF1 does not need the pc space queue restored. */
+#define NO_PC_SPACE_QUEUE_RESTORE
+
+/* The mach kernel uses the recovery counter to implement single
+ stepping. While this greatly simplifies the kernel support
+ necessary for single stepping, it unfortunately does the wrong
+ thing in the presense of a nullified instruction (gives control
+ back two insns after the nullifed insn). This is an artifact
+ of the HP architecture (recovery counter doesn't tick for
+ nullified insns).
+
+ Do our best to avoid losing in such situations. */
+#define INSTRUCTION_NULLIFIED \
+(({ \
+ int ipsw = (int)read_register(IPSW_REGNUM); \
+ if (ipsw & PSW_N) \
+ { \
+ int pcoqt = (int)read_register(PCOQ_TAIL_REGNUM); \
+ write_register(PCOQ_HEAD_REGNUM, pcoqt); \
+ write_register(PCOQ_TAIL_REGNUM, pcoqt + 0x4); \
+ write_register(IPSW_REGNUM, ipsw & ~(PSW_N | PSW_B | PSW_X)); \
+ stop_pc = pcoqt; \
+ } \
+ }), 0)
+
+/* It's mostly just the common stuff. */
+
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-pro.h b/gdb/config/pa/tm-pro.h
new file mode 100644
index 0000000..05ecb62
--- /dev/null
+++ b/gdb/config/pa/tm-pro.h
@@ -0,0 +1,14 @@
+/* Parameters for execution on an HP PA-RISC level 0 embedded system.
+ This is based on tm-hppab.h.
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu). */
+
+#define PA_LEVEL_0 /* Disables touching space regs and fp */
+
+/* All the PRO targets use software floating point at the moment. */
+#define SOFT_FLOAT 1
+
+/* It's mostly just the common stuff. */
+#include "pa/tm-hppa.h"
+
+#define GDB_TARGET_IS_PA_ELF
diff --git a/gdb/config/pa/xm-hppab.h b/gdb/config/pa/xm-hppab.h
new file mode 100644
index 0000000..9f6467f
--- /dev/null
+++ b/gdb/config/pa/xm-hppab.h
@@ -0,0 +1,27 @@
+/* Parameters for hosting on an HPPA PA-RISC machine, running BSD, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This is a big-endian host. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#include "pa/xm-pa.h"
diff --git a/gdb/config/pa/xm-hppah.h b/gdb/config/pa/xm-hppah.h
new file mode 100644
index 0000000..2cd47dd
--- /dev/null
+++ b/gdb/config/pa/xm-hppah.h
@@ -0,0 +1,49 @@
+/* Parameters for hosting on an HPPA-RISC machine running HPUX, for GDB.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+
+ Contributed by the Center for Software Science at the
+ University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Host is big-endian. */
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#include "pa/xm-pa.h"
+
+#define USG
+
+#ifndef __STDC__
+/* This define is discussed in decode_line_1 in symtab.c */
+#define HPPA_COMPILER_BUG
+#endif
+
+#define HAVE_TERMIOS
+
+/* HP defines malloc and realloc as returning void *, even for non-ANSI
+ compilations (such as with the native compiler). */
+
+#define MALLOC_INCOMPATIBLE
+
+extern void *
+malloc PARAMS ((size_t));
+
+extern void *
+realloc PARAMS ((void *, size_t));
+
+extern void
+free PARAMS ((void *));
diff --git a/gdb/config/pa/xm-pa.h b/gdb/config/pa/xm-pa.h
new file mode 100644
index 0000000..979609d
--- /dev/null
+++ b/gdb/config/pa/xm-pa.h
@@ -0,0 +1,5 @@
+/* Definitions for all PA machines. */
+
+/* This was created for "makeva", which is obsolete. This file can
+ probably go away (unless someone can think of some other host thing
+ which is common to various pa machines). */
diff --git a/gdb/config/powerpc/aix.mh b/gdb/config/powerpc/aix.mh
new file mode 100644
index 0000000..bac3e30
--- /dev/null
+++ b/gdb/config/powerpc/aix.mh
@@ -0,0 +1,11 @@
+# Host: IBM PowerPC running AIX
+
+XM_FILE= xm-aix.h
+XDEPFILES=
+
+NAT_FILE= nm-aix.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o xcoffread.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
diff --git a/gdb/config/powerpc/aix.mt b/gdb/config/powerpc/aix.mt
new file mode 100644
index 0000000..6d03b7d
--- /dev/null
+++ b/gdb/config/powerpc/aix.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running AIX
+TDEPFILES= rs6000-tdep.o xcoffsolib.o
+TM_FILE= tm-ppc-aix.h
diff --git a/gdb/config/powerpc/cygwin.mh b/gdb/config/powerpc/cygwin.mh
new file mode 100644
index 0000000..0c25709
--- /dev/null
+++ b/gdb/config/powerpc/cygwin.mh
@@ -0,0 +1,5 @@
+MH_CFLAGS=
+XM_FILE=xm-cygwin.h
+XDEP_FILES=ser-tcp.o
+NATDEPFILES=win32-nat.o
+XM_CLIBS=-lkernel32
diff --git a/gdb/config/powerpc/cygwin.mt b/gdb/config/powerpc/cygwin.mt
new file mode 100644
index 0000000..b86b2af
--- /dev/null
+++ b/gdb/config/powerpc/cygwin.mt
@@ -0,0 +1,6 @@
+# Target: Powerpc running cygnus's unix api over win32
+TDEPFILES= rs6000-tdep.o
+TM_FILE= tm-cygwin.h
+
+
+
diff --git a/gdb/config/powerpc/gdbserve.mt b/gdb/config/powerpc/gdbserve.mt
new file mode 100644
index 0000000..7728407
--- /dev/null
+++ b/gdb/config/powerpc/gdbserve.mt
@@ -0,0 +1,3 @@
+# Target: GDBSERVE.NLM running on a Power-PC
+TDEPFILES= ppc.o
+CPU_FILE= ppc
diff --git a/gdb/config/powerpc/linux.mh b/gdb/config/powerpc/linux.mh
new file mode 100644
index 0000000..0de0e20
--- /dev/null
+++ b/gdb/config/powerpc/linux.mh
@@ -0,0 +1,10 @@
+# Host: PowerPC, running Linux
+
+XM_FILE= xm-linux.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS=
+
+NAT_FILE= ../nm-sysv4.h
+NATDEPFILES= solib.o corelow.o # infptrace.o inftarg.o fork-child.o core-aout.o core-regset.o
+
+GDBSERVER_DEPFILES= low-linux.o
diff --git a/gdb/config/powerpc/macos.mh b/gdb/config/powerpc/macos.mh
new file mode 100644
index 0000000..63b0648
--- /dev/null
+++ b/gdb/config/powerpc/macos.mh
@@ -0,0 +1,4 @@
+# Host: PowerMac (PowerPC running MacOS)
+
+NATDEPFILES= mac-nat.o
+NAT_FILE= nm-macos.h
diff --git a/gdb/config/powerpc/macos.mt b/gdb/config/powerpc/macos.mt
new file mode 100644
index 0000000..07ad0d2
--- /dev/null
+++ b/gdb/config/powerpc/macos.mt
@@ -0,0 +1,3 @@
+# Target: PowerMac (PowerPC running MacOS)
+TDEPFILES= rs6000-tdep.o xcoffread.o
+TM_FILE= tm-macos.h
diff --git a/gdb/config/powerpc/nm-aix.h b/gdb/config/powerpc/nm-aix.h
new file mode 100644
index 0000000..9661d50
--- /dev/null
+++ b/gdb/config/powerpc/nm-aix.h
@@ -0,0 +1,22 @@
+/* IBM PowerPC native-dependent macros for GDB, the GNU debugger.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#include "rs6000/nm-rs6000.h"
+
+#define PTRACE_ARG3_TYPE int*
diff --git a/gdb/config/powerpc/nm-macos.h b/gdb/config/powerpc/nm-macos.h
new file mode 100644
index 0000000..a1a3d9e
--- /dev/null
+++ b/gdb/config/powerpc/nm-macos.h
@@ -0,0 +1,20 @@
+/* PowerMac native-dependent macros for GDB, the GNU debugger.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Nothing needed, at least so far. */
diff --git a/gdb/config/powerpc/nm-solaris.h b/gdb/config/powerpc/nm-solaris.h
new file mode 100644
index 0000000..b276a71
--- /dev/null
+++ b/gdb/config/powerpc/nm-solaris.h
@@ -0,0 +1,30 @@
+/* Native-dependent definitions for PowerPC running Solaris.
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include the generic SVR4 definitions. */
+
+#include <nm-sysv4.h>
+
+/* Before storing, we need to read all the registers. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Solaris PSRVADDR support does not seem to include a place for nPC. */
+
+#define PRSVADDR_BROKEN
diff --git a/gdb/config/powerpc/ppc-eabi.mt b/gdb/config/powerpc/ppc-eabi.mt
new file mode 100644
index 0000000..c4e21c8
--- /dev/null
+++ b/gdb/config/powerpc/ppc-eabi.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running eabi
+TDEPFILES= ser-ocd.o rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o dink32-rom.o ppc-bdm.o ocd.o remote-sds.o
+TM_FILE= tm-ppc-eabi.h
diff --git a/gdb/config/powerpc/ppc-nw.mt b/gdb/config/powerpc/ppc-nw.mt
new file mode 100644
index 0000000..0eaa23d
--- /dev/null
+++ b/gdb/config/powerpc/ppc-nw.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running Netware
+TDEPFILES= rs6000-tdep.o
+TM_FILE= tm-ppc-nw.h
diff --git a/gdb/config/powerpc/ppc-sim.mt b/gdb/config/powerpc/ppc-sim.mt
new file mode 100644
index 0000000..c73fef2
--- /dev/null
+++ b/gdb/config/powerpc/ppc-sim.mt
@@ -0,0 +1,6 @@
+# Target: PowerPC running eabi and including the simulator
+TDEPFILES= ser-ocd.o rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o dink32-rom.o ppc-bdm.o ocd.o remote-sds.o
+TM_FILE= tm-ppc-eabi.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/ppcle-eabi.mt b/gdb/config/powerpc/ppcle-eabi.mt
new file mode 100644
index 0000000..b336a11
--- /dev/null
+++ b/gdb/config/powerpc/ppcle-eabi.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running eabi in little endian mode
+TDEPFILES= ser-ocd.o rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o ppc-bdm.o ocd.o
+TM_FILE= tm-ppcle-eabi.h
diff --git a/gdb/config/powerpc/ppcle-sim.mt b/gdb/config/powerpc/ppcle-sim.mt
new file mode 100644
index 0000000..f08dafe
--- /dev/null
+++ b/gdb/config/powerpc/ppcle-sim.mt
@@ -0,0 +1,6 @@
+# Target: PowerPC running eabi in little endian mode under the simulator
+TDEPFILES= ser-ocd.o rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o ppc-bdm.o ocd.o
+TM_FILE= tm-ppcle-eabi.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/solaris.mh b/gdb/config/powerpc/solaris.mh
new file mode 100644
index 0000000..7d3444e
--- /dev/null
+++ b/gdb/config/powerpc/solaris.mh
@@ -0,0 +1,18 @@
+# Host: PowerPC, running Solaris 2
+
+XM_FILE= xm-solaris.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-solaris.h
+NATDEPFILES= corelow.o core-sol2.o solib.o procfs.o fork-child.o
+
+# If you are compiling with Sun's compiler, add the -xs option to CC
+# (e.g. `make CC="cc -xs"').
+# Sun's compilers require the -xs option to produce debug information
+# in the final linked executable. Otherwise they leave it in the .o
+# files only, with undocumented pointers to it in the linked executable.
+# This is commented out because we don't assume that the Sun compiler
+# is in use.
+#MH_CFLAGS=-xs
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/powerpc/solaris.mt b/gdb/config/powerpc/solaris.mt
new file mode 100644
index 0000000..a6e421e
--- /dev/null
+++ b/gdb/config/powerpc/solaris.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC, running Solaris 2
+TDEPFILES= rs6000-tdep.o
+TM_FILE= tm-solaris.h
diff --git a/gdb/config/powerpc/tm-cygwin.h b/gdb/config/powerpc/tm-cygwin.h
new file mode 100644
index 0000000..27ae24a
--- /dev/null
+++ b/gdb/config/powerpc/tm-cygwin.h
@@ -0,0 +1,21 @@
+/* Macro definitions PowerPC running under the Cygwin API.
+ Copyright 1996 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "powerpc/tm-ppcle-eabi.h"
+
diff --git a/gdb/config/powerpc/tm-macos.h b/gdb/config/powerpc/tm-macos.h
new file mode 100644
index 0000000..b29d285
--- /dev/null
+++ b/gdb/config/powerpc/tm-macos.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Power PC running MacOS.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#define GDB_TARGET_POWERPC
+
+/* This is no use to us. */
+#undef PC_LOAD_SEGMENT
diff --git a/gdb/config/powerpc/tm-ppc-aix.h b/gdb/config/powerpc/tm-ppc-aix.h
new file mode 100644
index 0000000..5dfb3c4
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-aix.h
@@ -0,0 +1,28 @@
+/* Macro definitions for Power PC running AIX.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#ifndef TM_PPC_AIX_H
+#define TM_PPC_AIX_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#define GDB_TARGET_POWERPC
+
+#endif /* TM_PPC_AIX_H */
diff --git a/gdb/config/powerpc/tm-ppc-eabi.h b/gdb/config/powerpc/tm-ppc-eabi.h
new file mode 100644
index 0000000..c2828b2
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-eabi.h
@@ -0,0 +1,84 @@
+/* Macro definitions for Power PC running embedded ABI.
+ Copyright 1995, 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PPC_EABI_H
+#define TM_PPC_EABI_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+/* except we want to allow single stepping */
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P 0
+
+#undef DEFAULT_LR_SAVE
+#define DEFAULT_LR_SAVE 4 /* eabi saves LR at 4 off of SP */
+
+#define GDB_TARGET_POWERPC
+
+#undef PC_LOAD_SEGMENT
+#undef PROCESS_LINENUMBER_HOOK
+
+#undef TEXT_SEGMENT_BASE
+#define TEXT_SEGMENT_BASE 1
+
+/* Say that we're using ELF, not XCOFF. */
+#define ELF_OBJECT_FORMAT 1
+
+#define TARGET_BYTE_ORDER_SELECTABLE_P 1
+
+/* return true if a given `pc' value is in `call dummy' function. */
+/* FIXME: This just checks for the end of the stack, which is broken
+ for things like stepping through gcc nested function stubs. */
+#undef PC_IN_CALL_DUMMY
+#define PC_IN_CALL_DUMMY(STOP_PC, STOP_SP, STOP_FRAME_ADDR) \
+ (STOP_SP < STOP_PC)
+
+/* generic dummy frame stuff */
+
+
+
+/* target-specific dummy_frame stuff */
+
+extern struct frame_info *rs6000_pop_frame PARAMS ((struct frame_info *frame));
+
+extern CORE_ADDR ppc_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+extern CORE_ADDR rs6000_push_arguments PARAMS ((int nargs,
+ struct value **args,
+ CORE_ADDR sp,
+ unsigned char struct_return,
+ CORE_ADDR struct_addr));
+
+#undef PUSH_DUMMY_FRAME
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+#define PUSH_RETURN_ADDRESS(PC, SP) ppc_push_return_address (PC, SP)
+
+/* override the standard get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+#undef CALL_DUMMY_START_OFFSET
+#define CALL_DUMMY_START_OFFSET 0
+
+
+#endif /* TM_PPC_EABI_H */
diff --git a/gdb/config/powerpc/tm-ppc-nw.h b/gdb/config/powerpc/tm-ppc-nw.h
new file mode 100644
index 0000000..38f7211
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-nw.h
@@ -0,0 +1,31 @@
+/* Macro definitions for Power PC running Netware.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PPC_NW_H
+#define TM_PPC_NW_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#define GDB_TARGET_POWERPC
+
+#undef PC_LOAD_SEGMENT
+#undef PROCESS_LINENUMBER_HOOK
+
+#endif /* TM_PPC_NW_H */
diff --git a/gdb/config/powerpc/tm-ppc-sim.h b/gdb/config/powerpc/tm-ppc-sim.h
new file mode 100644
index 0000000..e4116bc
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-sim.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Power PC running embedded ABI under the simulator.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PPC_SIM_H
+#define TM_PPC_SIM_H
+
+#include "powerpc/tm-ppc-eabi.h"
+
+#endif /* TM_PPC_SIM_H */
+
diff --git a/gdb/config/powerpc/tm-ppcle-eabi.h b/gdb/config/powerpc/tm-ppcle-eabi.h
new file mode 100644
index 0000000..355195d
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppcle-eabi.h
@@ -0,0 +1,30 @@
+/* Macro definitions for Power PC running embedded ABI
+ in little endian mode.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PPCLE_EABI_H
+#define TM_PPCLE_EABI_H
+
+/* Use normal ppc-eabi definitions */
+#include "powerpc/tm-ppc-eabi.h"
+
+#undef TARGET_BYTE_ORDER_DEFAULT
+#define TARGET_BYTE_ORDER_DEFAULT LITTLE_ENDIAN
+
+#endif /* TM_PPCLE_EABI_H */
diff --git a/gdb/config/powerpc/tm-ppcle-sim.h b/gdb/config/powerpc/tm-ppcle-sim.h
new file mode 100644
index 0000000..76564f2
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppcle-sim.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Power PC running embedded ABI under the simulator.
+ Copyright 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_PPCLE_SIM_H
+#define TM_PPCLE_SIM_H
+
+#include "powerpc/tm-ppcle-eabi.h"
+
+#endif /* TM_PPCLE_SIM_H */
+
diff --git a/gdb/config/powerpc/tm-solaris.h b/gdb/config/powerpc/tm-solaris.h
new file mode 100644
index 0000000..bd9373f
--- /dev/null
+++ b/gdb/config/powerpc/tm-solaris.h
@@ -0,0 +1,74 @@
+/* Macro definitions for GDB for a PowerPC running Solaris 2
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "powerpc/tm-ppc-eabi.h"
+
+/* There are two different signal handler trampolines in Solaris2. */
+#define IN_SIGTRAMP(pc, name) \
+ ((name) \
+ && (STREQ ("sigacthandler", name) || STREQ ("ucbsigvechandler", name)))
+
+/* The signal handler gets a pointer to an ucontext as third argument
+ if it is called from sigacthandler. This is the offset to the saved
+ PC within it. sparc_frame_saved_pc knows how to deal with
+ ucbsigvechandler. */
+#define SIGCONTEXT_PC_OFFSET 44
+
+#if 0 /* FIXME Setjmp/longjmp are not as well doc'd in SunOS 5.x yet */
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+#endif /* 0 */
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+ and for SunPRO 3.0, N_FUN symbols too. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+#if 0
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#endif
+
+#define FAULTED_USE_SIGINFO
+
+/* Enable handling of shared libraries for a.out executables. */
+#define HANDLE_SVR4_EXEC_EMULATORS
diff --git a/gdb/config/powerpc/xm-aix.h b/gdb/config/powerpc/xm-aix.h
new file mode 100644
index 0000000..efd0e74
--- /dev/null
+++ b/gdb/config/powerpc/xm-aix.h
@@ -0,0 +1,30 @@
+/* Parameters for hosting on an PowerPC, for GDB, the GNU debugger.
+ Copyright 1995 Free Software Foundation, Inc.
+ Contributed by Cygnus Corporation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#include "xm-aix4.h"
+
+/* This doesn't seem to be declared in any header file I can find. */
+char *termdef PARAMS ((int, int));
+
+/* UINT_MAX is defined in <sys/limits.h> as a decimal constant (4294967295)
+ which is too large to fit in a signed int when it is parsed by the
+ compiler, so it issues a diagnostic. Just undef it here so that we
+ use gdb's version in defs.h */
+#undef UINT_MAX
diff --git a/gdb/config/powerpc/xm-cygwin.h b/gdb/config/powerpc/xm-cygwin.h
new file mode 100644
index 0000000..82aa0fb
--- /dev/null
+++ b/gdb/config/powerpc/xm-cygwin.h
@@ -0,0 +1,32 @@
+/* Definitions for hosting on WIN32, for GDB.
+ Copyright 1995, 1996, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+#include "fopen-bin.h"
+
+#define GDBINIT_FILENAME "gdb.ini"
+
+#define SLASH_P(X) ((X)=='\\' || (X) == '/')
+#define ROOTED_P(X) ((SLASH_P((X)[0]))|| ((X)[1] ==':'))
+#define SLASH_CHAR '/'
+#define SLASH_STRING "/"
+
+/* Define this lseek(n) != nth byte of file */
+#define LSEEK_NOT_LINEAR
diff --git a/gdb/config/powerpc/xm-linux.h b/gdb/config/powerpc/xm-linux.h
new file mode 100644
index 0000000..41c8ba7
--- /dev/null
+++ b/gdb/config/powerpc/xm-linux.h
@@ -0,0 +1,21 @@
+/* Host definitions for a Sun 4, for GDB, the GNU debugger.
+ Copyright 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
diff --git a/gdb/config/powerpc/xm-mpw.h b/gdb/config/powerpc/xm-mpw.h
new file mode 100644
index 0000000..6b33ca2
--- /dev/null
+++ b/gdb/config/powerpc/xm-mpw.h
@@ -0,0 +1,22 @@
+/* Macro definitions for running GDB on Apple Power Macintoshes.
+ Copyright (C) 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+#include <xm-mpw.h>
diff --git a/gdb/config/powerpc/xm-solaris.h b/gdb/config/powerpc/xm-solaris.h
new file mode 100644
index 0000000..9ead87a
--- /dev/null
+++ b/gdb/config/powerpc/xm-solaris.h
@@ -0,0 +1,21 @@
+/* Host definitions for a Sun 4, for GDB, the GNU debugger.
+ Copyright 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
diff --git a/gdb/config/pyr/pyramid.mh b/gdb/config/pyr/pyramid.mh
new file mode 100644
index 0000000..cd25e57
--- /dev/null
+++ b/gdb/config/pyr/pyramid.mh
@@ -0,0 +1,8 @@
+# Host: Pyramid under OSx 4.0 (4.2bsd).
+
+#msg If you don't compile GDB with GCC, you'll need to add
+#msg ALLOCA=alloca.o and ALLOCA1=alloca.o to the Makefile.
+#msg
+
+XDEPFILES= pyr-xdep.o infptrace.o inftarg.o fork-child.o
+XM_FILE= xm-pyr.h
diff --git a/gdb/config/pyr/pyramid.mt b/gdb/config/pyr/pyramid.mt
new file mode 100644
index 0000000..48f9557
--- /dev/null
+++ b/gdb/config/pyr/pyramid.mt
@@ -0,0 +1,3 @@
+# Target: Pyramid under OSx 4.0 (4.2bsd).
+TDEPFILES= pyr-tdep.o
+TM_FILE= tm-pyr.h
diff --git a/gdb/config/pyr/tm-pyr.h b/gdb/config/pyr/tm-pyr.h
new file mode 100644
index 0000000..b97ebe7
--- /dev/null
+++ b/gdb/config/pyr/tm-pyr.h
@@ -0,0 +1,483 @@
+/* Definitions to make GDB run on a Pyramid under OSx 4.0 (4.2bsd).
+ Copyright 1988, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Traditional Unix virtual address spaces have thre regions: text,
+ data and stack. The text, initialised data, and uninitialised data
+ are represented in separate segments of the a.out file.
+ When a process dumps core, the data and stack regions are written
+ to a core file. This gives a debugger enough information to
+ reconstruct (and debug) the virtual address space at the time of
+ the coredump.
+ Pyramids have an distinct fourth region of the virtual address
+ space, in which the contents of the windowed registers are stacked
+ in fixed-size frames. Pyramid refer to this region as the control
+ stack. Each call (or trap) automatically allocates a new register
+ frame; each return deallocates the current frame and restores the
+ windowed registers to their values before the call.
+
+ When dumping core, the control stack is written to a core files as
+ a third segment. The core-handling functions need to know to deal
+ with it. */
+
+/* Tell corefile.c there is an extra segment. */
+#define REG_STACK_SEGMENT
+
+/* Floating point is IEEE compatible on most Pyramid hardware
+ (Older processors do not have IEEE NaNs). */
+#define IEEE_FLOAT
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+/* FIXME -- do we want to skip insns to allocate the local frame?
+ If so, what do they look like?
+ This is becoming harder, since tege@sics.SE wants to change
+ gcc to not output a prologue when no frame is needed. */
+#define SKIP_PROLOGUE(pc) do {} while (0)
+
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) FRAME_SAVED_PC(frame)
+
+/* Address of end of stack space. */
+/* This seems to be right for the 90x comp.vuw.ac.nz.
+ The correct value at any site may be a function of the configured
+ maximum control stack depth. If so, I don't know where the
+ control-stack depth is configured, so I can't #include it here. */
+#define STACK_END_ADDR (0xc00cc000)
+
+/* Register window stack (Control stack) stack definitions
+ - Address of beginning of control stack.
+ - size of control stack frame
+ (Note that since crts0 is usually the first function called,
+ main()'s control stack is one frame (0x80 bytes) beyond this value. */
+
+#define CONTROL_STACK_ADDR (0xc00cd000)
+
+/* Bytes in a register window -- 16 parameter regs, 16 local regs
+ for each call, is 32 regs * 4 bytes */
+
+#define CONTROL_STACK_FRAME_SIZE (32*4)
+
+/* FIXME. On a pyr, Data Stack grows downward; control stack goes upwards.
+ Which direction should we use for INNER_THAN, PC_INNER_THAN ?? */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be aligned on 32-bit boundaries when synthesizing
+ function calls. */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 3) & -4)
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0xf0, 00, 00, 00}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+/* pyramids have 64, plus one for the PSW; plus perhaps one more for the
+ kernel stack pointer (ksp) and control-stack pointer (CSP) */
+
+#define NUM_REGS 67
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES \
+{"gr0", "gr1", "gr2", "gr3", "gr4", "gr5", "gr6", "gr7", \
+ "gr8", "gr9", "gr10", "gr11", "logpsw", "cfp", "sp", "pc", \
+ "pr0", "pr1", "pr2", "pr3", "pr4", "pr5", "pr6", "pr7", \
+ "pr8", "pr9", "pr10", "pr11", "pr12", "pr13", "pr14", "pr15", \
+ "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", \
+ "lr8", "lr9", "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", \
+ "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7", \
+ "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15", \
+ "psw", "ksp", "csp"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+/* pseudo-registers: */
+#define PS_REGNUM 64 /* Contains processor status */
+#define PSW_REGNUM 64 /* Contains current psw, whatever it is.*/
+#define CSP_REGNUM 65 /* address of this control stack frame*/
+#define KSP_REGNUM 66 /* Contains process's Kernel Stack Pointer */
+
+#define CFP_REGNUM 13 /* Current data-stack frame ptr */
+#define TR0_REGNUM 48 /* After function call, contains
+ function result */
+
+/* Registers interesting to the machine-independent part of gdb*/
+
+#define FP_REGNUM CSP_REGNUM /* Contains address of executing (control)
+ stack frame */
+#define SP_REGNUM 14 /* Contains address of top of stack -??*/
+#define PC_REGNUM 15 /* Contains program counter */
+
+/* Define DO_REGISTERS_INFO() to do machine-specific formatting
+ of register dumps. */
+
+#define DO_REGISTERS_INFO(_regnum, fp) pyr_do_registers_info(_regnum, fp)
+
+/* need this so we can find the global registers: they never get saved. */
+extern unsigned int global_reg_offset;
+extern unsigned int last_frame_offset;
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (NUM_REGS*4)
+
+/* the Pyramid has register windows. */
+
+#define HAVE_REGISTER_WINDOWS
+
+/* Is this register part of the register window system? A yes answer
+ implies that 1) The name of this register will not be the same in
+ other frames, and 2) This register is automatically "saved" (out
+ registers shifting into ins counts) upon subroutine calls and thus
+ there is no need to search more than one stack frame for it. */
+
+#define REGISTER_IN_WINDOW_P(regnum) \
+ ((regnum) >= 16 && (regnum) < 64)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the Pyramid, all regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the Pyramid, all regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) builtin_type_int
+
+/* FIXME: It seems impossible for both EXTRACT_RETURN_VALUE and
+ STORE_RETURN_VALUE to be correct. */
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+/****FIXME****/
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (TR0_REGNUM, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+/* Note that on a register-windowing machine (eg, Pyr, SPARC), this is
+ where the value is found after the function call -- ie, it should
+ correspond to GNU CC's FUNCTION_VALUE rather than FUNCTION_OUTGOING_VALUE.*/
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, ((int *)(REGBUF))+TR0_REGNUM, TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+/* on pyrs, values are returned in */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE(TR0_REGNUM), VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+/* FIXME */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ ( ((int *)(REGBUF)) [TR0_REGNUM])
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR bottom; \
+ CORE_ADDR frame_cfp; \
+ CORE_ADDR frame_window_addr;
+
+/* The bottom field is misnamed, since it might imply that memory from
+ bottom to frame contains this frame. That need not be true if
+ stack frames are allocated in different segments (e.g. some on a
+ stack, some on a heap in the data segment). */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
+do { \
+ (fci)->frame_window_addr = (fci)->frame; \
+ (fci)->bottom = \
+ ((fci)->next ? \
+ ((fci)->frame == (fci)->next->frame ? \
+ (fci)->next->bottom : (fci)->next->frame) : \
+ read_register (SP_REGNUM)); \
+ (fci)->frame_cfp = \
+ read_register (CFP_REGNUM); \
+ /***fprintf (stderr, \
+ "[[creating new frame for %0x,pc=%0x,csp=%0x]]\n", \
+ (fci)->frame, (fci)->pc,(fci)->frame_cfp);*/ \
+} while (0);
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the pyr, the frame's nominal address is the address
+ of parameter register 0. The previous frame is found 32 words up. */
+
+#define FRAME_CHAIN(thisframe) \
+ ( (thisframe) -> frame - CONTROL_STACK_FRAME_SIZE)
+
+ /*((thisframe) >= CONTROL_STACK_ADDR))*/
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0.
+
+ I do not understand what this means on a Pyramid, where functions
+ *always* have a control-stack frame, but may or may not have a
+ frame on the data stack. Since GBD uses the value of the
+ control stack pointer as its "address" of a frame, FRAMELESS
+ is always 1, so does not need to be defined. */
+
+
+/* Where is the PC for a specific frame */
+
+#define FRAME_SAVED_PC(fi) \
+ ((CORE_ADDR) (read_memory_integer ( (fi) -> frame + 60, 4)))
+
+/* There may be bugs in FRAME_ARGS_ADDRESS and FRAME_LOCALS_ADDRESS;
+ or there may be bugs in accessing the registers that break
+ their definitions.
+ Having the macros expand into functions makes them easier to debug.
+ When the bug is finally located, the inline macro defintions can
+ be un-#if 0ed, and frame_args_addr and frame_locals_address can
+ be deleted from pyr-dep.c */
+
+/* If the argument is on the stack, it will be here. */
+#define FRAME_ARGS_ADDRESS(fi) \
+ frame_args_addr(fi)
+
+#define FRAME_LOCALS_ADDRESS(fi) \
+ frame_locals_address(fi)
+
+/* The following definitions doesn't seem to work.
+ I don't understand why. */
+#if 0
+#define FRAME_ARGS_ADDRESS(fi) \
+ /*(FRAME_FP(fi) + (13*4))*/ (read_register (CFP_REGNUM))
+
+#define FRAME_LOCALS_ADDRESS(fi) \
+ ((fi)->frame +(16*4))
+
+#endif /* 0 */
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(val, fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame.
+
+ Note that on register window machines, we are currently making the
+ assumption that window registers are being saved somewhere in the
+ frame in which they are being used. If they are stored in an
+ inferior frame, find_saved_register will break.
+
+ On pyrs, frames of window registers are stored contiguously on a
+ separate stack. All window registers are always stored.
+ The pc and psw (gr15 and gr14) are also always saved: the call
+ insn saves them in pr15 and pr14 of the new frame (tr15,tr14 of the
+ old frame).
+ The data-stack frame pointer (CFP) is only saved in functions which
+ allocate a (data)stack frame (with "adsf"). We detect them by
+ looking at the first insn of the procedure.
+
+ Other non-window registers (gr0-gr11) are never saved. Pyramid's C
+ compiler and gcc currently ignore them, so it's not an issue. */
+
+#define FRAME_FIND_SAVED_REGS(fi_p, frame_saved_regs) \
+{ register int regnum; \
+ register CORE_ADDR pc; \
+ register CORE_ADDR fn_start_pc; \
+ register int first_insn; \
+ register CORE_ADDR prev_cf_addr; \
+ register int window_ptr; \
+ if (!fi_p) fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); \
+ memset (&(frame_saved_regs), '\0', sizeof (frame_saved_regs)); \
+ \
+ window_ptr = prev_cf_addr = FRAME_FP(fi_p); \
+ \
+ for (regnum = 16 ; regnum < 64; regnum++,window_ptr+=4) \
+ { \
+ (frame_saved_regs).regs[regnum] = window_ptr; \
+ } \
+ \
+ /* In each window, psw, and pc are "saved" in tr14,tr15. */ \
+ /*** psw is sometimes saved in gr12 (so sez <sys/pcb.h>) */ \
+ (frame_saved_regs).regs[PS_REGNUM] = FRAME_FP(fi_p) + (14*4); \
+ \
+/*(frame_saved_regs).regs[PC_REGNUM] = (frame_saved_regs).regs[31];*/ \
+ (frame_saved_regs).regs[PC_REGNUM] = FRAME_FP(fi_p) + ((15+32)*4); \
+ \
+ /* Functions that allocate a frame save sp *where*? */ \
+/*first_insn = read_memory_integer (get_pc_function_start ((fi_p)->pc),4); */ \
+ \
+ fn_start_pc = (get_pc_function_start ((fi_p)->pc)); \
+ first_insn = read_memory_integer(fn_start_pc, 4); \
+ \
+ if (0x08 == ((first_insn >> 20) &0x0ff)) { \
+ /* NB: because WINDOW_REGISTER_P(cfp) is false, a saved cfp \
+ in this frame is only visible in this frame's callers. \
+ That means the cfp we mark saved is my caller's cfp, ie pr13. \
+ I don't understand why we don't have to do that for pc, too. */ \
+ \
+ (frame_saved_regs).regs[CFP_REGNUM] = FRAME_FP(fi_p)+(13*4); \
+ \
+ (frame_saved_regs).regs[SP_REGNUM] = \
+ read_memory_integer (FRAME_FP(fi_p)+((13+32)*4),4); \
+ } \
+ \
+/* \
+ *(frame_saved_regs).regs[CFP_REGNUM] = (frame_saved_regs).regs[61]; \
+ * (frame_saved_regs).regs[SP_REGNUM] = \
+ * read_memory_integer (FRAME_FP(fi_p)+((13+32)*4),4); \
+ */ \
+ \
+ (frame_saved_regs).regs[CSP_REGNUM] = prev_cf_addr; \
+}
+
+/* Things needed for making the inferior call functions. */
+#if 0
+/* These are all lies. These macro definitions are appropriate for a
+ SPARC. On a pyramid, pushing a dummy frame will
+ surely involve writing the control stack pointer,
+ then saving the pc. This requires a privileged instruction.
+ Maybe one day Pyramid can be persuaded to add a syscall to do this.
+ Until then, we are out of luck. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM);\
+ register int regnum; \
+ sp = push_word (sp, 0); /* arglist */ \
+ for (regnum = 11; regnum >= 0; regnum--) \
+ sp = push_word (sp, read_register (regnum)); \
+ sp = push_word (sp, read_register (PC_REGNUM)); \
+ sp = push_word (sp, read_register (FP_REGNUM)); \
+/* sp = push_word (sp, read_register (AP_REGNUM));*/ \
+ sp = push_word (sp, (read_register (PS_REGNUM) & 0xffef) \
+ + 0x2fff0000); \
+ sp = push_word (sp, 0); \
+ write_register (SP_REGNUM, sp); \
+ write_register (FP_REGNUM, sp); \
+/* write_register (AP_REGNUM, sp + 17 * sizeof (int));*/ }
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+{ register CORE_ADDR fp = read_register (FP_REGNUM); \
+ register int regnum; \
+ register int regmask = read_memory_integer (fp + 4, 4); \
+ write_register (PS_REGNUM, \
+ (regmask & 0xffff) \
+ | (read_register (PS_REGNUM) & 0xffff0000)); \
+ write_register (PC_REGNUM, read_memory_integer (fp + 16, 4)); \
+ write_register (FP_REGNUM, read_memory_integer (fp + 12, 4)); \
+/* write_register (AP_REGNUM, read_memory_integer (fp + 8, 4));*/ \
+ fp += 16; \
+ for (regnum = 0; regnum < 12; regnum++) \
+ if (regmask & (0x10000 << regnum)) \
+ write_register (regnum, read_memory_integer (fp += 4, 4)); \
+ fp = fp + 4 + ((regmask >> 30) & 3); \
+ if (regmask & 0x20000000) \
+ { regnum = read_memory_integer (fp, 4); \
+ fp += (regnum + 1) * 4; } \
+ write_register (SP_REGNUM, fp); \
+ set_current_frame (read_register (FP_REGNUM)); }
+
+/* This sequence of words is the instructions
+ calls #69, @#32323232
+ bpt
+ Note this is 8 bytes. */
+
+#define CALL_DUMMY {0x329f69fb, 0x03323232}
+
+#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ *((char *) dummyname + 1) = nargs; \
+ *(int *)((char *) dummyname + 3) = fun; }
+#endif /* 0 */
+
+#define POP_FRAME \
+ { error ("The return command is not supported on this machine."); }
diff --git a/gdb/config/pyr/xm-pyr.h b/gdb/config/pyr/xm-pyr.h
new file mode 100644
index 0000000..f45d10a
--- /dev/null
+++ b/gdb/config/pyr/xm-pyr.h
@@ -0,0 +1,92 @@
+/* Definitions to make GDB run on a Pyramidax under OSx 4.0 (4.2bsd).
+ Copyright 1988, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Define PYRAMID_CONTROL_FRAME_DEBUGGING to get copious messages
+ about reading the control stack on standard output. This
+ makes gdb unusable as a debugger. */
+
+/* #define PYRAMID_CONTROL_FRAME_DEBUGGING */
+
+/* Define PYRAMID_FRAME_DEBUGGING for ? */
+
+/* use Pyramid's slightly strange ptrace */
+#define PYRAMID_PTRACE
+
+/* Traditional Unix virtual address spaces have thre regions: text,
+ data and stack. The text, initialised data, and uninitialised data
+ are represented in separate segments of the a.out file.
+ When a process dumps core, the data and stack regions are written
+ to a core file. This gives a debugger enough information to
+ reconstruct (and debug) the virtual address space at the time of
+ the coredump.
+ Pyramids have an distinct fourth region of the virtual address
+ space, in which the contents of the windowed registers are stacked
+ in fixed-size frames. Pyramid refer to this region as the control
+ stack. Each call (or trap) automatically allocates a new register
+ frame; each return deallocates the current frame and restores the
+ windowed registers to their values before the call.
+
+ When dumping core, the control stack is written to a core files as
+ a third segment. The core-handling functions need to know to deal
+ with it. */
+
+/* Tell dep.c what the extra segment is. */
+#define PYRAMID_CORE
+
+#define NO_SIGINTERRUPT
+
+#define HAVE_WAIT_STRUCT
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))
+
+/* Define offsets of registers in the core file (or maybe u area) */
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ struct user __u; \
+ addr = blockend + (regno - 16 ) * 4; \
+ if (regno == 67) { \
+ printf("\\geting reg 67\\"); \
+ addr = (int)(&__u.u_pcb.pcb_csp) - (int) &__u; \
+ } else if (regno == KSP_REGNUM) { \
+ printf("\\geting KSP (reg %d)\\", KSP_REGNUM); \
+ addr = (int)(&__u.u_pcb.pcb_ksp) - (int) &__u; \
+ } else if (regno == CSP_REGNUM) { \
+ printf("\\geting CSP (reg %d\\",CSP_REGNUM); \
+ addr = (int)(&__u.u_pcb.pcb_csp) - (int) &__u; \
+ } else if (regno == 64) { \
+ printf("\\geting reg 64\\"); \
+ addr = (int)(&__u.u_pcb.pcb_csp) - (int) &__u; \
+ } else if (regno == PS_REGNUM) \
+ addr = blockend - 4; \
+ else if (1 && ((16 > regno) && (regno > 11))) \
+ addr = last_frame_offset + (4 *(regno+32)); \
+ else if (0 && (12 > regno)) \
+ addr = global_reg_offset + (4 *regno); \
+ else if (16 > regno) \
+ addr = global_reg_offset + (4 *regno); \
+ else \
+ addr = blockend + (regno - 16 ) * 4; \
+}
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+#define FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/romp/rtbsd.mh b/gdb/config/romp/rtbsd.mh
new file mode 100644
index 0000000..003c42f
--- /dev/null
+++ b/gdb/config/romp/rtbsd.mh
@@ -0,0 +1,8 @@
+# IBM RT/PC running BSD unix.
+# This file contributed at NYU, where we are using the RT to remote
+# debug an a29k running unix. No attempt, as of 7/16/91, has been made
+# to support debugging of RT executables.
+XDEPFILES corelow.o core-aout.o infptrace.o inftarg.o fork-child.o
+MH_CFLAGS=-DHOSTING_ONLY # No debugging of RT executables
+XM_FILE= xm-rtbsd.h
+CC=gcc -traditional # hc/pcc just can't cut it.
diff --git a/gdb/config/romp/xm-rtbsd.h b/gdb/config/romp/xm-rtbsd.h
new file mode 100644
index 0000000..d99b57f
--- /dev/null
+++ b/gdb/config/romp/xm-rtbsd.h
@@ -0,0 +1,40 @@
+/* Definitions to host GDB on an IBM RT/PC running BSD Unix.
+ Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+ Contributed by David Wood @ New York University (wood@lab.ultra.nyu.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* This machine is most significant byte first */
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* This OS has the wait structure */
+#define HAVE_WAIT_STRUCT
+
+#ifdef HOSTING_ONLY
+/*
+ * This next two defines are to get GDB up and running as a host to
+ * do remote debugging. I know there is a gdb for the RT, but there wasn't
+ * an xconfig/rt* file.
+ */
+#define KERNEL_U_ADDR_BSD /* This may be correct, but hasn't been tested */
+#define REGISTER_U_ADDR(a,b,c) \
+ (printf("GDB can not debug IBM RT/PC BSD executables (yet)\n"),\
+ quit(),0)
+#else
+# include "GDB for the RT is not included in the distribution"
+#endif
+
diff --git a/gdb/config/rs6000/aix4.mh b/gdb/config/rs6000/aix4.mh
new file mode 100644
index 0000000..c5bc2da
--- /dev/null
+++ b/gdb/config/rs6000/aix4.mh
@@ -0,0 +1,11 @@
+# Host: IBM RS/6000 running AIX4
+
+XM_FILE= xm-aix4.h
+XDEPFILES=
+
+NAT_FILE= nm-rs6000.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
diff --git a/gdb/config/rs6000/aix4.mt b/gdb/config/rs6000/aix4.mt
new file mode 100644
index 0000000..f213f0f
--- /dev/null
+++ b/gdb/config/rs6000/aix4.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS/6000 running AIX4
+TDEPFILES= rs6000-tdep.o xcoffsolib.o xcoffread.o
+TM_FILE= tm-rs6000-aix4.h
diff --git a/gdb/config/rs6000/nm-rs6000.h b/gdb/config/rs6000/nm-rs6000.h
new file mode 100644
index 0000000..cf0d53d
--- /dev/null
+++ b/gdb/config/rs6000/nm-rs6000.h
@@ -0,0 +1,60 @@
+/* IBM RS/6000 native-dependent macros for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+#define PTRACE_ATTACH PT_ATTACH
+#define PTRACE_DETACH PT_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* When a child process is just starting, we sneak in and relocate
+ the symbol table (and other stuff) after the dynamic linker has
+ figured out where they go. */
+
+#define SOLIB_CREATE_INFERIOR_HOOK(PID) \
+ do { \
+ xcoff_relocate_symtab (PID); \
+ } while (0)
+
+/* When a target process or core-file has been attached, we sneak in
+ and figure out where the shared libraries have got to. */
+
+#define SOLIB_ADD(a, b, c) \
+ if (inferior_pid) \
+ /* Attach to process. */ \
+ xcoff_relocate_symtab (inferior_pid); \
+ else \
+ /* Core file. */ \
+ xcoff_relocate_core (c);
+
+extern void xcoff_relocate_symtab PARAMS ((unsigned int));
+#ifdef __STDC__
+struct target_ops;
+#endif
+extern void xcoff_relocate_core PARAMS ((struct target_ops *));
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
diff --git a/gdb/config/rs6000/nm-rs6000ly.h b/gdb/config/rs6000/nm-rs6000ly.h
new file mode 100644
index 0000000..4159822
--- /dev/null
+++ b/gdb/config/rs6000/nm-rs6000ly.h
@@ -0,0 +1,25 @@
+/* Native-dependent definitions for RS6000 running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_RS6000LYNX_H
+#define NM_RS6000LYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_RS6000LYNX_H */
diff --git a/gdb/config/rs6000/rs6000.mh b/gdb/config/rs6000/rs6000.mh
new file mode 100644
index 0000000..600d616
--- /dev/null
+++ b/gdb/config/rs6000/rs6000.mh
@@ -0,0 +1,11 @@
+# Host: IBM RS/6000 running AIX
+
+XM_FILE= xm-rs6000.h
+XDEPFILES=
+
+NAT_FILE= nm-rs6000.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
diff --git a/gdb/config/rs6000/rs6000.mt b/gdb/config/rs6000/rs6000.mt
new file mode 100644
index 0000000..a2294b2
--- /dev/null
+++ b/gdb/config/rs6000/rs6000.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS/6000 running AIX
+TDEPFILES= rs6000-tdep.o xcoffsolib.o xcoffread.o
+TM_FILE= tm-rs6000.h
diff --git a/gdb/config/rs6000/rs6000lynx.mh b/gdb/config/rs6000/rs6000lynx.mh
new file mode 100644
index 0000000..b938152
--- /dev/null
+++ b/gdb/config/rs6000/rs6000lynx.mh
@@ -0,0 +1,11 @@
+# Host: RS6000 running LynxOS
+
+XM_FILE= xm-rs6000ly.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-rs6000ly.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o xcoffread.o
+
+GDBSERVER_LIBS= -lbsd
+GDBSERVER_DEPFILES= low-lynx.o
diff --git a/gdb/config/rs6000/rs6000lynx.mt b/gdb/config/rs6000/rs6000lynx.mt
new file mode 100644
index 0000000..978030c
--- /dev/null
+++ b/gdb/config/rs6000/rs6000lynx.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS6000 running LynxOS
+TDEPFILES= coff-solib.o rs6000-tdep.o
+TM_FILE= tm-rs6000ly.h
diff --git a/gdb/config/rs6000/tm-rs6000-aix4.h b/gdb/config/rs6000/tm-rs6000-aix4.h
new file mode 100644
index 0000000..f65eae3
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000-aix4.h
@@ -0,0 +1,26 @@
+/* Macro definitions for RS/6000 running AIX4.
+ Copyright 1995, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+#ifndef TM_RS6000_AIX4_H
+#define TM_RS6000_AIX4_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#endif /* TM_RS6000_AIX4_H */
diff --git a/gdb/config/rs6000/tm-rs6000.h b/gdb/config/rs6000/tm-rs6000.h
new file mode 100644
index 0000000..52beec1
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000.h
@@ -0,0 +1,564 @@
+/* Parameters for target execution on an RS6000, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1997
+ Free Software Foundation, Inc.
+ Contributed by IBM Corporation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifdef __STDC__ /* Forward decls for prototypes */
+struct frame_info;
+struct type;
+struct value;
+#endif
+
+/* Minimum possible text address in AIX */
+
+#define TEXT_SEGMENT_BASE 0x10000000
+
+/* Load segment of a given pc value. */
+
+#define PC_LOAD_SEGMENT(PC) pc_load_segment_name(PC)
+extern char *pc_load_segment_name PARAMS ((CORE_ADDR));
+
+/* AIX cc seems to get this right. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* return true if a given `pc' value is in `call dummy' function. */
+/* FIXME: This just checks for the end of the stack, which is broken
+ for things like stepping through gcc nested function stubs. */
+#define PC_IN_CALL_DUMMY(STOP_PC, STOP_SP, STOP_FRAME_ADDR) \
+ (STOP_SP < STOP_PC && STOP_PC < STACK_END_ADDR)
+
+#if 0
+extern unsigned int text_start, data_start;
+extern char *corefile;
+#endif
+extern int inferior_pid;
+
+/* We are missing register descriptions in the system header files. Sigh! */
+
+struct regs {
+ int gregs [32]; /* general purpose registers */
+ int pc; /* program conter */
+ int ps; /* processor status, or machine state */
+};
+
+struct fp_status {
+ double fpregs [32]; /* floating GP registers */
+};
+
+
+/* To be used by skip_prologue. */
+
+struct rs6000_framedata {
+ int offset; /* total size of frame --- the distance
+ by which we decrement sp to allocate
+ the frame */
+ int saved_gpr; /* smallest # of saved gpr */
+ int saved_fpr; /* smallest # of saved fpr */
+ int alloca_reg; /* alloca register number (frame ptr) */
+ char frameless; /* true if frameless functions. */
+ char nosavedpc; /* true if pc not saved. */
+ int gpr_offset; /* offset of saved gprs from prev sp */
+ int fpr_offset; /* offset of saved fprs from prev sp */
+ int lr_offset; /* offset of saved lr */
+ int cr_offset; /* offset of saved cr */
+};
+
+/* Define the byte order of the machine. */
+
+#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
+
+/* AIX's assembler doesn't grok dollar signs in identifiers.
+ So we use dots instead. This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+do { \
+ struct rs6000_framedata _frame; \
+ pc = skip_prologue (pc, &_frame); \
+} while (0)
+
+extern CORE_ADDR skip_prologue PARAMS((CORE_ADDR, struct rs6000_framedata *));
+
+
+/* If PC is in some function-call trampoline code, return the PC
+ where the function itself actually starts. If not, return NULL. */
+
+#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc)
+extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR));
+
+/* Number of trap signals we need to skip over, once the inferior process
+ starts running. */
+
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* AIX has a couple of strange returns from wait(). */
+
+#define CHILD_SPECIAL_WAITSTATUS(ourstatus, hoststatus) ( \
+ /* "stop after load" status. */ \
+ (hoststatus) == 0x57c ? (ourstatus)->kind = TARGET_WAITKIND_LOADED, 1 : \
+ \
+ /* signal 0. I have no idea why wait(2) returns with this status word. */ \
+ /* It looks harmless. */ \
+ (hoststatus) == 0x7f ? (ourstatus)->kind = TARGET_WAITKIND_SPURIOUS, 1 : \
+ \
+ /* A normal waitstatus. Let the usual macros deal with it. */ \
+ 0)
+
+/* In xcoff, we cannot process line numbers when we see them. This is
+ mainly because we don't know the boundaries of the include files. So,
+ we postpone that, and then enter and sort(?) the whole line table at
+ once, when we are closing the current symbol table in end_symtab(). */
+
+#define PROCESS_LINENUMBER_HOOK() aix_process_linenos ()
+extern void aix_process_linenos PARAMS ((void));
+
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) read_register (LR_REGNUM)
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR 0x2ff80000
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* This is how arguments pushed onto stack or passed in registers.
+ Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls. We don't need STACK_ALIGN, PUSH_ARGUMENTS will
+ handle it. */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR push_arguments PARAMS ((int, struct value **, CORE_ADDR,
+ int, CORE_ADDR));
+
+/* BREAKPOINT_FROM_PC uses the program counter value to determine the
+ breakpoint that should be used */
+extern breakpoint_from_pc_fn rs6000_breakpoint_from_pc;
+#define BREAKPOINT_FROM_PC(pcptr, lenptr) rs6000_breakpoint_from_pc (pcptr, lenptr)
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+#define REGISTER_SIZE 4
+
+
+/* Return the name of register number REG. This may return "" to
+ indicate a register number that's not used on this variant.
+ (Register numbers may be sparse for consistency between variants.) */
+#define REGISTER_NAME(reg) (rs6000_register_name(reg))
+extern char *rs6000_register_name (int reg);
+
+/* Number of machine registers */
+#define NUM_REGS 183
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define FP_REGNUM 1 /* Contains address of executing stack frame */
+#define SP_REGNUM 1 /* Contains address of top of stack */
+#define TOC_REGNUM 2 /* TOC register */
+#define FP0_REGNUM 32 /* Floating point register 0 */
+#define GP0_REGNUM 0 /* GPR register 0 */
+#define FP0_REGNUM 32 /* FPR (Floating point) register 0 */
+#define FPLAST_REGNUM 63 /* Last floating point register */
+
+/* Special purpose registers... */
+/* P.S. keep these in the same order as in /usr/mstsave.h `mstsave'
+ structure, for easier processing */
+
+#define PC_REGNUM 64 /* Program counter (instruction address %iar)*/
+#define PS_REGNUM 65 /* Processor (or machine) status (%msr) */
+#define CR_REGNUM 66 /* Condition register */
+#define LR_REGNUM 67 /* Link register */
+#define CTR_REGNUM 68 /* Count register */
+#define XER_REGNUM 69 /* Fixed point exception registers */
+#define MQ_REGNUM 70 /* Multiply/quotient register */
+
+/* These #defines are used to parse core files and talk to ptrace, so they
+ must remain fixed. */
+#define FIRST_UISA_SP_REGNUM 64 /* first special register number */
+#define LAST_UISA_SP_REGNUM 70 /* last special register number */
+
+/* This is the offset in REG_NAMES at which the `set processor'
+ command starts plugging in its names. */
+#define FIRST_VARIANT_REGISTER 66
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'.
+ 32 4-byte gpr's
+ 32 8-byte fpr's
+ 7 4-byte UISA special purpose registers,
+ 16 4-byte segment registers,
+ 32 4-byte standard OEA special-purpose registers,
+ and up to 64 4-byte non-standard OEA special purpose regs.
+ total: (+ (* 32 4) (* 32 8) (* 7 4) (* 16 4) (* 32 4) (* 64 4)) 860 bytes
+ Keep some extra space for now, in case to add more. */
+#define REGISTER_BYTES 880
+
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) \
+ ( \
+ ((N) > FPLAST_REGNUM) ? ((((N) - FPLAST_REGNUM -1) * 4) + 384)\
+ :((N) >= FP0_REGNUM) ? ((((N) - FP0_REGNUM) * 8) + 128) \
+ :((N) * 4) )
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+/* Note that the unsigned cast here forces the result of the
+ subtraction to very high positive values if N < FP0_REGNUM */
+
+#define REGISTER_RAW_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 32 ? 8 : 4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the RS6000, all regs are 4 bytes
+ except the floating point regs which are 8-byte doubles. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 32 ? 8 : 4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
+
+#define STAB_REG_TO_REGNUM(value) (value)
+
+/* Nonzero if register N requires conversion
+ from raw format to virtual format.
+ The register format for rs6000 floating point registers is always
+ double, we need a conversion if the memory format is float. */
+
+#define REGISTER_CONVERTIBLE(N) ((N) >= FP0_REGNUM && (N) <= FPLAST_REGNUM)
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+ if (TYPE_LENGTH (TYPE) != REGISTER_RAW_SIZE (REGNUM)) \
+ { \
+ double val = extract_floating ((FROM), REGISTER_RAW_SIZE (REGNUM)); \
+ store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+ } \
+ else \
+ memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register REGNUM in buffer TO. */
+
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+ if (TYPE_LENGTH (TYPE) != REGISTER_RAW_SIZE (REGNUM)) \
+ { \
+ double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+ store_floating ((TO), REGISTER_RAW_SIZE (REGNUM), val); \
+ } \
+ else \
+ memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (((unsigned)(N) - FP0_REGNUM) < 32 ? builtin_type_double : builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+/* in RS6000, struct return addresses are passed as an extra parameter in r3.
+ In function return, callee is not responsible of returning this address back.
+ Since gdb needs to find it, we will store in a designated variable
+ `rs6000_struct_return_address'. */
+
+extern CORE_ADDR rs6000_struct_return_address;
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (3, (ADDR)); \
+ rs6000_struct_return_address = (ADDR); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+/* #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE)) */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ extract_return_value(TYPE,REGBUF,VALBUF)
+extern void extract_return_value PARAMS ((struct type *, char [], char *));
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ { \
+ if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
+ \
+ /* Floating point values are returned starting from FPR1 and up. \
+ Say a double_double_double type could be returned in \
+ FPR1/FPR2/FPR3 triple. */ \
+ \
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM+1), (VALBUF), \
+ TYPE_LENGTH (TYPE)); \
+ else \
+ /* Everything else is returned in GPR3 and up. */ \
+ write_register_bytes (REGISTER_BYTE (GP0_REGNUM+3), (VALBUF), \
+ TYPE_LENGTH (TYPE)); \
+ }
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) rs6000_struct_return_address
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the RS6000, the frame's nominal address
+ is the address of a 4-byte word containing the calling frame's address. */
+
+#define FRAME_CHAIN(thisframe) rs6000_frame_chain (thisframe)
+CORE_ADDR rs6000_frame_chain PARAMS ((struct frame_info *));
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ FRAMELESS = frameless_function_invocation (FI)
+
+extern int frameless_function_invocation PARAMS((struct frame_info *));
+
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+ prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) : \
+ prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
+#define INIT_FRAME_PC(fromleaf, prev) /* nothing */
+extern void rs6000_init_extra_frame_info (int fromleaf, struct frame_info *);
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) rs6000_init_extra_frame_info (fromleaf, fi)
+
+/* If the kernel has to deliver a signal, it pushes a sigcontext
+ structure on the stack and then calls the signal handler, passing
+ the address of the sigcontext in an argument register. Usually
+ the signal handler doesn't save this register, so we have to
+ access the sigcontext structure via an offset from the signal handler
+ frame.
+ The following constants were determined by experimentation on AIX 3.2. */
+#define SIG_FRAME_PC_OFFSET 96
+#define SIG_FRAME_LR_OFFSET 108
+#define SIG_FRAME_FP_OFFSET 284
+
+/* Default offset from SP where the LR is stored */
+#define DEFAULT_LR_SAVE 8
+
+/* Return saved PC from a frame */
+#define FRAME_SAVED_PC(FRAME) frame_saved_pc (FRAME)
+
+extern unsigned long frame_saved_pc PARAMS ((struct frame_info *));
+
+extern CORE_ADDR rs6000_frame_args_address PARAMS ((struct frame_info *));
+#define FRAME_ARGS_ADDRESS(FI) rs6000_frame_args_address (FI)
+
+#define FRAME_LOCALS_ADDRESS(FI) FRAME_ARGS_ADDRESS(FI)
+
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8 /* Not sure on this. FIXMEmgo */
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+/* In the following implementation for RS6000, we did *not* save sp. I am
+ not sure if it will be needed. The following macro takes care of gpr's
+ and fpr's only. */
+
+extern void rs6000_frame_init_saved_regs PARAMS ((struct frame_info *));
+#define FRAME_INIT_SAVED_REGS(FI) rs6000_frame_init_saved_regs (FI)
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+/* Change these names into rs6k_{push, pop}_frame(). FIXMEmgo. */
+
+#define PUSH_DUMMY_FRAME push_dummy_frame ()
+extern void push_dummy_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame,
+ restoring all saved registers. */
+
+#define POP_FRAME pop_frame ()
+extern void pop_frame PARAMS ((void));
+
+/* This sequence of words is the instructions:
+
+ mflr r0 // 0x7c0802a6
+ // save fpr's
+ stfd r?, num(r1) // 0xd8010000 there should be 32 of this??
+ // save gpr's
+ stm r0, num(r1) // 0xbc010000
+ stu r1, num(r1) // 0x94210000
+
+ // the function we want to branch might be in a different load
+ // segment. reset the toc register. Note that the actual toc address
+ // will be fix by fix_call_dummy () along with function address.
+
+ st r2, 0x14(r1) // 0x90410014 save toc register
+ liu r2, 0x1234 // 0x3c401234 reset a new toc value 0x12345678
+ oril r2, r2,0x5678 // 0x60425678
+
+ // load absolute address 0x12345678 to r0
+ liu r0, 0x1234 // 0x3c001234
+ oril r0, r0,0x5678 // 0x60005678
+ mtctr r0 // 0x7c0903a6 ctr <- r0
+ bctrl // 0x4e800421 jump subroutine 0x12345678 (%ctr)
+ cror 0xf, 0xf, 0xf // 0x4def7b82
+ brpt // 0x7d821008, breakpoint
+ cror 0xf, 0xf, 0xf // 0x4def7b82 (for 8 byte alignment)
+
+
+ We actually start executing by saving the toc register first, since the pushing
+ of the registers is done by PUSH_DUMMY_FRAME. If this were real code,
+ the arguments for the function called by the `bctrl' would be pushed
+ between the `stu' and the `bctrl', and we could allow it to execute through.
+ But the arguments have to be pushed by GDB after the PUSH_DUMMY_FRAME is done,
+ and we cannot allow to push the registers again.
+*/
+
+#define CALL_DUMMY {0x7c0802a6, 0xd8010000, 0xbc010000, 0x94210000, \
+ 0x90410014, 0x3c401234, 0x60425678, \
+ 0x3c001234, 0x60005678, 0x7c0903a6, 0x4e800421, \
+ 0x4def7b82, 0x7d821008, 0x4def7b82 }
+
+
+/* keep this as multiple of 8 (%sp requires 8 byte alignment) */
+#define CALL_DUMMY_LENGTH 56
+
+#define CALL_DUMMY_START_OFFSET 16
+
+/* Insert the specified number of args and function address into a
+ call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
+extern void rs6000_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR,
+ int, struct value **,
+ struct type *, int));
+
+/* Hook in rs6000-tdep.c for determining the TOC address when
+ calling functions in the inferior. */
+extern CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR));
+
+/* xcoffread.c provides a function to determine the TOC offset
+ for a given object file.
+ It is used under native AIX configurations for determining the
+ TOC address when calling functions in the inferior. */
+#ifdef __STDC__
+struct objfile;
+#endif
+extern CORE_ADDR get_toc_offset PARAMS ((struct objfile *));
+
+/* Usually a function pointer's representation is simply the address
+ of the function. On the RS/6000 however, a function pointer is
+ represented by a pointer to a TOC entry. This TOC entry contains
+ three words, the first word is the address of the function, the
+ second word is the TOC pointer (r2), and the third word is the
+ static chain value. Throughout GDB it is currently assumed that a
+ function pointer contains the address of the function, which is not
+ easy to fix. In addition, the conversion of a function address to
+ a function pointer would require allocation of a TOC entry in the
+ inferior's memory space, with all its drawbacks. To be able to
+ call C++ virtual methods in the inferior (which are called via
+ function pointers), find_function_addr uses this macro to get the
+ function address from a function pointer. */
+
+#define CONVERT_FROM_FUNC_PTR_ADDR(ADDR) \
+ (is_magic_function_pointer (ADDR) ? read_memory_integer (ADDR, 4) : (ADDR))
+extern int is_magic_function_pointer PARAMS ((CORE_ADDR));
+
+/* Flag for machine-specific stuff in shared files. FIXME */
+#define IBM6000_TARGET
+
+/* RS6000/AIX does not support PT_STEP. Has to be simulated. */
+
+#define SOFTWARE_SINGLE_STEP_P 1
+extern void rs6000_software_single_step PARAMS ((unsigned int, int));
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) rs6000_software_single_step (sig, bp_p)
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee.
+
+ For the PowerPC, it appears that the debug info marks the parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are always passed in as doubles. Thus by setting this to 1, both
+ types of calls will work. */
+
+#define COERCE_FLOAT_TO_DOUBLE 1
diff --git a/gdb/config/rs6000/tm-rs6000ly.h b/gdb/config/rs6000/tm-rs6000ly.h
new file mode 100644
index 0000000..0946b0f
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000ly.h
@@ -0,0 +1,32 @@
+/* Macro definitions for RS6000 running under LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_RS6000LYNX_H
+#define TM_RS6000LYNX_H
+
+#include "tm-lynx.h"
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#undef PC_LOAD_SEGMENT
+
+#define CANNOT_STORE_REGISTER(regno) (regno == PS_REGNUM)
+
+#endif /* TM_RS6000LYNX_H */
diff --git a/gdb/config/rs6000/xm-aix4.h b/gdb/config/rs6000/xm-aix4.h
new file mode 100644
index 0000000..1bc5cae
--- /dev/null
+++ b/gdb/config/rs6000/xm-aix4.h
@@ -0,0 +1,26 @@
+/* Parameters for hosting on an RS6000, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Contributed by IBM Corporation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "xm-aix4.h"
+
+/* AIX 4.x uses nonstandard "int *" as type of third argument to ptrace() */
+
+#define PTRACE_ARG3_TYPE int*
+
diff --git a/gdb/config/rs6000/xm-rs6000.h b/gdb/config/rs6000/xm-rs6000.h
new file mode 100644
index 0000000..44b8b24
--- /dev/null
+++ b/gdb/config/rs6000/xm-rs6000.h
@@ -0,0 +1,107 @@
+/* Parameters for hosting on an RS6000, for GDB, the GNU debugger.
+ Copyright 1986-87, 1989, 1991-96, 1998 Free Software Foundation, Inc.
+ Contributed by IBM Corporation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The following text is taken from config/rs6000.mh:
+ * # The IBM version of /usr/include/rpc/rpc.h has a bug -- it says
+ * # `extern fd_set svc_fdset;' without ever defining the type fd_set.
+ * # Unfortunately this occurs in the vx-share code, which is not configured
+ * # like the rest of GDB (e.g. it doesn't include "defs.h").
+ * # We circumvent this bug by #define-ing fd_set here, but undefining it in
+ * # the xm-rs6000.h file before ordinary modules try to use it. FIXME, IBM!
+ * MH_CFLAGS='-Dfd_set=int'
+ * So, here we do the undefine...which has to occur before we include
+ * <sys/select.h> below.
+ */
+#undef fd_set
+
+#include <sys/select.h>
+
+/* Big end is at the low address */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* At least as of AIX 3.2, we have termios. */
+#define HAVE_TERMIOS 1
+/* #define HAVE_TERMIO 1 */
+
+#define USG 1
+#define HAVE_SIGSETMASK 1
+
+#define FIVE_ARG_PTRACE
+
+/* This system requires that we open a terminal with O_NOCTTY for it to
+ not become our controlling terminal. */
+
+#define USE_O_NOCTTY
+
+/* Brain death inherited from PC's pervades. */
+#undef NULL
+#define NULL 0
+
+/* The IBM compiler requires this in order to properly compile alloca(). */
+#pragma alloca
+
+/* There is no vfork. */
+
+#define vfork fork
+
+/* Setpgrp() takes arguments, unlike ordinary Sys V's. */
+
+#define SETPGRP_ARGS 1
+
+/* AIX doesn't have strdup, so we need to declare it for libiberty */
+extern char *strdup PARAMS ((char *));
+
+/* Signal handler for SIGWINCH `window size changed'. */
+
+#define SIGWINCH_HANDLER aix_resizewindow
+extern void aix_resizewindow PARAMS ((int));
+
+/* This doesn't seem to be declared in any header file I can find. */
+char *termdef PARAMS ((int, int));
+
+/* `lines_per_page' and `chars_per_line' are local to utils.c. Rectify this. */
+
+#define SIGWINCH_HANDLER_BODY \
+ \
+/* Respond to SIGWINCH `window size changed' signal, and reset GDB's \
+ window settings appropriately. */ \
+ \
+void \
+aix_resizewindow (signo) \
+ int signo; \
+{ \
+ int fd = fileno (stdout); \
+ if (isatty (fd)) { \
+ int val; \
+ \
+ val = atoi (termdef (fd, 'l')); \
+ if (val > 0) \
+ lines_per_page = val; \
+ val = atoi (termdef (fd, 'c')); \
+ if (val > 0) \
+ chars_per_line = val; \
+ } \
+}
+
+/* setpgrp() messes up controling terminal. The other version of it
+ requires libbsd.a. */
+#define setpgrp(XX,YY) setpgid (XX, YY)
+
diff --git a/gdb/config/rs6000/xm-rs6000ly.h b/gdb/config/rs6000/xm-rs6000ly.h
new file mode 100644
index 0000000..f75cfab
--- /dev/null
+++ b/gdb/config/rs6000/xm-rs6000ly.h
@@ -0,0 +1,29 @@
+/* Host-dependent definitions for RS6000 running LynxOS, for GDB.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef XM_RS6000LYNX_H
+#define XM_RS6000LYNX_H
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Get generic LynxOS host definitions. */
+
+#include "xm-lynx.h"
+
+#endif /* XM_RS6000LYNX_H */
diff --git a/gdb/config/sh/sh.mt b/gdb/config/sh/sh.mt
new file mode 100644
index 0000000..a6604d4
--- /dev/null
+++ b/gdb/config/sh/sh.mt
@@ -0,0 +1,6 @@
+# Target: Hitachi Super-H with ICE and simulator
+TDEPFILES= sh-tdep.o monitor.o sh3-rom.o remote-e7000.o ser-e7kpc.o dsrec.o
+TM_FILE= tm-sh.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/sh/libsim.a
diff --git a/gdb/config/sh/tm-sh.h b/gdb/config/sh/tm-sh.h
new file mode 100644
index 0000000..2177909
--- /dev/null
+++ b/gdb/config/sh/tm-sh.h
@@ -0,0 +1,281 @@
+/* Target-specific definition for a Hitachi Super-H.
+ Copyright (C) 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+#endif
+
+#define GDB_TARGET_IS_SH
+
+#define IEEE_FLOAT 1
+
+/* Define the bit, byte, and word ordering of the machine. */
+
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+extern CORE_ADDR sh_skip_prologue ();
+#define SKIP_PROLOGUE(ip) \
+ {(ip) = sh_skip_prologue(ip);}
+
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions.
+
+ The return address is the value saved in the PR register + 4 */
+
+#define SAVED_PC_AFTER_CALL(frame) (ADDR_BITS_REMOVE(read_register(PR_REGNUM)))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Illegal instruction - used by the simulator for breakpoint
+ detection */
+
+#define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big
+ and little endian modes */
+
+#define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 }
+#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 }
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are. */
+#define REGISTER_TYPE long
+
+/* Say how much memory is needed to store a copy of the register set */
+#define REGISTER_BYTES (NUM_REGS*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \
+ || (N) == FPUL_REGNUM) \
+ ? builtin_type_float : builtin_type_int)
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+extern char **sh_register_names;
+#define REGISTER_NAME(i) sh_register_names[i]
+
+#define NUM_REGS 59
+
+/* Register numbers of various important registers. Note that some of
+ these values are "real" register numbers, and correspond to the
+ general registers of the machine, and some are "phony" register
+ numbers which are too large to be actual register numbers as far as
+ the user is concerned but do serve to get the desired values when
+ passed to read_register. */
+
+#define R0_REGNUM 0
+#define STRUCT_RETURN_REGNUM 2
+#define ARG0_REGNUM 4
+#define ARGLAST_REGNUM 7
+#define FP_REGNUM 14
+#define SP_REGNUM 15
+#define PC_REGNUM 16
+#define PR_REGNUM 17
+#define GBR_REGNUM 18
+#define VBR_REGNUM 19
+#define MACH_REGNUM 20
+#define MACL_REGNUM 21
+#define SR_REGNUM 22
+#define FPUL_REGNUM 23
+#define FPSCR_REGNUM 24
+#define FP0_REGNUM 25
+#define FP15_REGNUM 40
+#define SSR_REGNUM 41
+#define SPC_REGNUM 42
+#define R0B0_REGNUM 43
+#define R0B1_REGNUM 51
+
+#define NUM_REALREGS 59
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ We store structs through a pointer passed in R0 */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (STRUCT_RETURN_REGNUM, (ADDR)); }
+
+extern use_struct_convention_fn sh_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) sh_use_struct_convention (gcc_p, type)
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+extern void sh_extract_return_value PARAMS ((struct type *, void *, void *));
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ sh_extract_return_value (TYPE, REGBUF, VALBUF)
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format.
+
+ Things always get returned in R0/R1 */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE(0), VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF, REGISTER_RAW_SIZE (0))
+
+
+/* Define other aspects of the stack frame.
+ we keep a copy of the worked out return pc lying around, since it
+ is a useful bit of info */
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR return_pc; \
+ int leaf_function; \
+ int f_offset;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+ sh_init_extra_frame_info(fromleaf, fi)
+extern void sh_init_extra_frame_info PARAMS ((int, struct frame_info *));
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+extern void sh_frame_find_saved_regs PARAMS ((struct frame_info *fi,
+ struct frame_saved_regs *fsr));
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ sh_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+#define NAMES_HAVE_UNDERSCORE
+
+typedef unsigned short INSN_WORD;
+
+extern CORE_ADDR sh_push_arguments PARAMS ((int nargs,
+ struct value **args,
+ CORE_ADDR sp,
+ unsigned char struct_return,
+ CORE_ADDR struct_addr));
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_LENGTH (0)
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define FIX_CALL_DUMMY(DUMMY, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+extern CORE_ADDR sh_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+#define PUSH_RETURN_ADDRESS(PC, SP) sh_push_return_address (PC, SP)
+
+
+extern CORE_ADDR sh_frame_chain PARAMS ((struct frame_info *));
+#define FRAME_CHAIN(FRAME) sh_frame_chain(FRAME)
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+#define FRAME_CHAIN_VALID(FP, FRAME) generic_frame_chain_valid (FP, FRAME)
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = sh_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+/* override the standard get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+/* Discard from the stack the innermost frame, restoring all saved
+ registers. */
+
+extern void sh_pop_frame PARAMS ((void));
+#define POP_FRAME sh_pop_frame();
+
+#define NOP {0x20, 0x0b}
+
+#define REGISTER_SIZE 4
+
+#define COERCE_FLOAT_TO_DOUBLE 1
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Need this for WinGDB. See gdb/mswin/{regdoc.h, gdbwin.c, gui.cpp}. */
+#define TARGET_SH
diff --git a/gdb/config/sparc/linux.mh b/gdb/config/sparc/linux.mh
new file mode 100644
index 0000000..954398f
--- /dev/null
+++ b/gdb/config/sparc/linux.mh
@@ -0,0 +1,7 @@
+# Host: Sparcstation, running Linux
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-linux.h
+NAT_FILE= nm-linux.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
+GDBSERVER_DEPFILES= low-sparc.o
diff --git a/gdb/config/sparc/linux.mt b/gdb/config/sparc/linux.mt
new file mode 100644
index 0000000..ca422e9
--- /dev/null
+++ b/gdb/config/sparc/linux.mt
@@ -0,0 +1,3 @@
+# Target: Sparcstation, running Linux
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-linux.h
diff --git a/gdb/config/sparc/nbsd.mh b/gdb/config/sparc/nbsd.mh
new file mode 100644
index 0000000..310838d
--- /dev/null
+++ b/gdb/config/sparc/nbsd.mh
@@ -0,0 +1,6 @@
+# Host: Sun 4 or Sparcstation, running NetBSD
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/nbsd.mt b/gdb/config/sparc/nbsd.mt
new file mode 100644
index 0000000..be8a348
--- /dev/null
+++ b/gdb/config/sparc/nbsd.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running NetBSD
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/sparc/nm-linux.h b/gdb/config/sparc/nm-linux.h
new file mode 100644
index 0000000..b2b2a91
--- /dev/null
+++ b/gdb/config/sparc/nm-linux.h
@@ -0,0 +1,31 @@
+/* Macro definitions for running gdb on a Sparc running Linux.
+ Copyright (C) 1989, 1992, 1996, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include <nm-sysv4.h>
+#include "solib.h"
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
+
+/* Linux is svr4ish but not that much */
+#undef USE_PROC_FS
diff --git a/gdb/config/sparc/nm-nbsd.h b/gdb/config/sparc/nm-nbsd.h
new file mode 100644
index 0000000..016772a
--- /dev/null
+++ b/gdb/config/sparc/nm-nbsd.h
@@ -0,0 +1,57 @@
+/* Native-dependent definitions for Sparc running NetBSD, for GDB.
+ Copyright (C) 1986, 1987, 1989, 1992, 1995, 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+
+#include "nm-nbsd.h"
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Before storing, we need to read all the registers. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Make things match up with what is expected in sparc-nat.c. */
+
+#define regs trapframe
+#define fp_status fpstate
+
+#define r_g1 tf_global[1]
+#define r_ps tf_psr
+#define r_pc tf_pc
+#define r_npc tf_npc
+#define r_y tf_y
+
+#define fpu fpstate
+#define fpu_regs fs_regs
+#define fpu_fsr fs_fsr
+#define fpu_fr fs_regs
+#define Fpu_fsr fs_fsr
+#define FPU_FSR_TYPE int
+
+#define PTRACE_GETREGS PT_GETREGS
+#define PTRACE_GETFPREGS PT_GETFPREGS
+#define PTRACE_SETREGS PT_SETREGS
+#define PTRACE_SETFPREGS PT_SETFPREGS
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/sparc/nm-sparclynx.h b/gdb/config/sparc/nm-sparclynx.h
new file mode 100644
index 0000000..24011dc
--- /dev/null
+++ b/gdb/config/sparc/nm-sparclynx.h
@@ -0,0 +1,25 @@
+/* Native-dependent definitions for Sparc running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef NM_SPARCLYNX_H
+#define NM_SPARCLYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/nm-sun4os4.h b/gdb/config/sparc/nm-sun4os4.h
new file mode 100644
index 0000000..9da96be
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4os4.h
@@ -0,0 +1,35 @@
+/* Macro definitions for running gdb on a Sun 4 running sunos 4.
+ Copyright (C) 1989, 1992, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Do implement the attach and detach commands. */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c. */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Before storing, we need to read all the registers. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size PARAMS ((void));
diff --git a/gdb/config/sparc/nm-sun4sol2.h b/gdb/config/sparc/nm-sun4sol2.h
new file mode 100644
index 0000000..f6833f4
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4sol2.h
@@ -0,0 +1,45 @@
+/* Native-dependent definitions for Sparc running SVR4.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Include the generic SVR4 definitions. */
+
+#include <nm-sysv4.h>
+
+/* Before storing, we need to read all the registers. */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Solaris PSRVADDR support does not seem to include a place for nPC. */
+
+#define PRSVADDR_BROKEN
+
+#ifdef HAVE_THREAD_DB_LIB
+
+#ifdef __STDC__
+struct objfile;
+#endif
+
+#define target_new_objfile(OBJFILE) sol_thread_new_objfile (OBJFILE)
+
+void sol_thread_new_objfile PARAMS ((struct objfile *objfile));
+
+#define FIND_NEW_THREADS sol_find_new_threads
+void sol_find_new_threads PARAMS ((void));
+
+#endif
diff --git a/gdb/config/sparc/sp64.mt b/gdb/config/sparc/sp64.mt
new file mode 100644
index 0000000..8bb1e07
--- /dev/null
+++ b/gdb/config/sparc/sp64.mt
@@ -0,0 +1,9 @@
+# Target: SPARC64
+# solib.o and procfs.o taken out for now. We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
diff --git a/gdb/config/sparc/sp64sim.mt b/gdb/config/sparc/sp64sim.mt
new file mode 100644
index 0000000..a9c5ac9
--- /dev/null
+++ b/gdb/config/sparc/sp64sim.mt
@@ -0,0 +1,13 @@
+# Target: SPARC64 (with simulator)
+# solib.o and procfs.o taken out for now. We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
+
+MH_CFLAGS = -I${srcdir}/../sim/sp64
+SIM_OBS = remote-sim.o
+SIM = ../sim/sp64/libsim.a
diff --git a/gdb/config/sparc/sp64sol2.mt b/gdb/config/sparc/sp64sol2.mt
new file mode 100644
index 0000000..ce2f0d8
--- /dev/null
+++ b/gdb/config/sparc/sp64sol2.mt
@@ -0,0 +1,3 @@
+# Target: Ultrasparc, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/sparc-em.mt b/gdb/config/sparc/sparc-em.mt
new file mode 100644
index 0000000..13b0c6a
--- /dev/null
+++ b/gdb/config/sparc/sparc-em.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-spc-em.h
diff --git a/gdb/config/sparc/sparclet.mt b/gdb/config/sparc/sparclet.mt
new file mode 100644
index 0000000..f08cfd7
--- /dev/null
+++ b/gdb/config/sparc/sparclet.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded Sparclet monitor
+TDEPFILES= sparc-tdep.o monitor.o sparclet-rom.o dsrec.o
+TM_FILE= tm-sparclet.h
diff --git a/gdb/config/sparc/sparclite.mt b/gdb/config/sparc/sparclite.mt
new file mode 100644
index 0000000..43cb38c
--- /dev/null
+++ b/gdb/config/sparc/sparclite.mt
@@ -0,0 +1,5 @@
+# Target: Fujitsu SPARClite processor
+TDEPFILES= sparc-tdep.o sparcl-tdep.o
+TM_FILE= tm-sparclite.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/erc32/libsim.a
diff --git a/gdb/config/sparc/sparclynx.mh b/gdb/config/sparc/sparclynx.mh
new file mode 100644
index 0000000..6fddddd
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mh
@@ -0,0 +1,11 @@
+# Host: Sparc running LynxOS
+
+XM_FILE= xm-sparclynx.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-sparclynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
+
+GDBSERVER_LIBS= -lbsd
+GDBSERVER_DEPFILES= low-lynx.o
diff --git a/gdb/config/sparc/sparclynx.mt b/gdb/config/sparc/sparclynx.mt
new file mode 100644
index 0000000..5e61645
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mt
@@ -0,0 +1,3 @@
+# Target: Sparc running LynxOS
+TDEPFILES= coff-solib.o sparc-tdep.o
+TM_FILE= tm-sparclynx.h
diff --git a/gdb/config/sparc/sun4os4.mh b/gdb/config/sparc/sun4os4.mh
new file mode 100644
index 0000000..4047c5c
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mh
@@ -0,0 +1,11 @@
+# Host: Sun 4 or Sparcstation, running SunOS 4
+XDEPFILES= ser-tcp.o
+XM_FILE= xm-sun4os4.h
+NAT_FILE= nm-sun4os4.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
+GDBSERVER_DEPFILES= low-sparc.o
+# Setting XM_CLIBS=-lresolv would let us use the DNS, but that would screw
+# anyone who wants to use NIS, which includes at least one Cygnus customer
+# (PR 3593). So leave it this way until/unless we find a resolver which can
+# get names from either DNS or NIS from the same GDB binary.
diff --git a/gdb/config/sparc/sun4os4.mt b/gdb/config/sparc/sun4os4.mt
new file mode 100644
index 0000000..5a4ecb9
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running SunOS 4
+TDEPFILES= sparc-tdep.o solib.o
+TM_FILE= tm-sun4os4.h
diff --git a/gdb/config/sparc/sun4sol2.mh b/gdb/config/sparc/sun4sol2.mh
new file mode 100644
index 0000000..468b362
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mh
@@ -0,0 +1,18 @@
+# Host: Sun 4 or Sparcstation, running Solaris 2
+
+XM_FILE= xm-sun4sol2.h
+XDEPFILES= ser-tcp.o
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-sun4sol2.h
+NATDEPFILES= corelow.o core-sol2.o solib.o procfs.o fork-child.o
+
+# If you are compiling with Sun's compiler, add the -xs option to CC
+# (e.g. `make CC="cc -xs"').
+# Sun's compilers require the -xs option to produce debug information
+# in the final linked executable. Otherwise they leave it in the .o
+# files only, with undocumented pointers to it in the linked executable.
+# This is commented out because we don't assume that the Sun compiler
+# is in use.
+#MH_CFLAGS=-xs
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/sun4sol2.mt b/gdb/config/sparc/sun4sol2.mt
new file mode 100644
index 0000000..af70e9f
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/tm-linux.h b/gdb/config/sparc/tm-linux.h
new file mode 100644
index 0000000..2cc708a
--- /dev/null
+++ b/gdb/config/sparc/tm-linux.h
@@ -0,0 +1,29 @@
+/* Macro definitions for GDB for a Sparc running Linux.
+ Copyright 1989, 1992, 1994, 1995, 1998 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_SPARCLINUX_H
+#define TM_SPARCLINUX_H
+
+#include "sparc/tm-sparc.h"
+
+#define SIGCONTEXT_PC_OFFSET 12
+
+#include "tm-sysv4.h"
+
+#endif /* TM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/tm-nbsd.h b/gdb/config/sparc/tm-nbsd.h
new file mode 100644
index 0000000..1a31084
--- /dev/null
+++ b/gdb/config/sparc/tm-nbsd.h
@@ -0,0 +1,27 @@
+/* Macro definitions for Sparc running under NetBSD.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "sparc/tm-sparc.h"
+
+#include "tm-nbsd.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/sparc/tm-sp64.h b/gdb/config/sparc/tm-sp64.h
new file mode 100644
index 0000000..40a9a62
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64.h
@@ -0,0 +1,378 @@
+/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
+ This is included by other tm-*.h files to define SPARC64 cpu-related info.
+ Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
+ This is (obviously) based on the SPARC Vn (n<9) port.
+ Contributed by Doug Evans (dje@cygnus.com).
+ Further modified by Bob Manson (manson@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDB_TARGET_IS_SPARC64
+
+#ifdef __STDC__
+struct value;
+#endif
+
+/* Eeeew. Ok, we have to assume (for now) that the processor really is
+ in sparc64 mode. While this is the same instruction sequence as
+ on the Sparc, the stack frames are offset by +2047 (and the arguments
+ are 8 bytes instead of 4). */
+/* Instructions are:
+ std %f10, [ %fp + 0x7a7 ]
+ std %f8, [ %fp + 0x79f ]
+ std %f6, [ %fp + 0x797 ]
+ std %f4, [ %fp + 0x78f ]
+ std %f2, [ %fp + 0x787 ]
+ std %f0, [ %fp + 0x77f ]
+ std %g6, [ %fp + 0x777 ]
+ std %g4, [ %fp + 0x76f ]
+ std %g2, [ %fp + 0x767 ]
+ std %g0, [ %fp + 0x75f ]
+ std %fp, [ %fp + 0x757 ]
+ std %i4, [ %fp + 0x74f ]
+ std %i2, [ %fp + 0x747 ]
+ std %i0, [ %fp + 0x73f ]
+ nop
+ nop
+ nop
+ nop
+ rd %tbr, %o0
+ st %o0, [ %fp + 0x72b ]
+ rd %tpc, %o0
+ st %o0, [ %fp + 0x727 ]
+ rd %psr, %o0
+ st %o0, [ %fp + 0x723 ]
+ rd %y, %o0
+ st %o0, [ %fp + 0x71f ]
+ ldx [ %sp + 0x8a7 ], %o5
+ ldx [ %sp + 0x89f ], %o4
+ ldx [ %sp + 0x897 ], %o3
+ ldx [ %sp + 0x88f ], %o2
+ ldx [ %sp + 0x887 ], %o1
+ call %g0
+ ldx [ %sp + 0x87f ], %o0
+ nop
+ ta 1
+ nop
+ nop
+ */
+
+#define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
+ 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
+ 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
+ 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
+ 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
+ 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
+ 0xf03fa73f01000000LL, 0x0100000001000000LL,\
+ 0x0100000091580000LL, 0xd027a72b93500000LL,\
+ 0xd027a72791480000LL, 0xd027a72391400000LL,\
+ 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
+ 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
+ 0x0100000091d02001LL, 0x0100000001000000LL }
+
+
+/* 128 is to reserve space to write the %i/%l registers that will be restored
+ when we resume. */
+#define CALL_DUMMY_STACK_ADJUST 128
+
+#define CALL_DUMMY_LENGTH 192
+
+#define CALL_DUMMY_START_OFFSET 148
+
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
+
+#include "sparc/tm-sparc.h"
+
+/* Stack must be aligned on 128-bit boundaries when synthesizing
+ function calls. */
+
+#undef STACK_ALIGN
+#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
+
+/* Number of machine registers. */
+
+#undef NUM_REGS
+#define NUM_REGS 125
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+/* Some of these registers are only accessible from priviledged mode.
+ They are here for kernel debuggers, etc. */
+/* FIXME: icc and xcc are currently considered separate registers.
+ This may have to change and consider them as just one (ccr).
+ Let's postpone this as long as we can. It's nice to be able to set
+ them individually. */
+/* FIXME: fcc0-3 are currently separate, even though they are also part of
+ fsr. May have to remove them but let's postpone this as long as
+ possible. It's nice to be able to set them individually. */
+/* FIXME: Whether to include f33, f35, etc. here is not clear.
+ There are advantages and disadvantages. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
+ \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
+ "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
+ "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
+ \
+ "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
+ "ver", "tick", "pil", "pstate", \
+ "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
+ "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
+ "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
+ "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
+ "asr28", "asr29", "asr30", "asr31", \
+ /* These are here at the end to simplify removing them if we have to. */ \
+ "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
+}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#if 0 /* defined in tm-sparc.h, replicated for doc purposes */
+#define G0_REGNUM 0 /* %g0 */
+#define G1_REGNUM 1 /* %g1 */
+#define O0_REGNUM 8 /* %o0 */
+#define SP_REGNUM 14 /* Contains address of top of stack, \
+ which is also the bottom of the frame. */
+#define RP_REGNUM 15 /* Contains return address value, *before* \
+ any windows get switched. */
+#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
+#define L0_REGNUM 16 /* First local reg that's saved on stack frame
+ rather than in machine registers */
+#define I0_REGNUM 24 /* %i0 */
+#define FP_REGNUM 30 /* Contains address of executing stack frame */
+#define I7_REGNUM 31 /* Last local reg saved on stack frame */
+#define FP0_REGNUM 32 /* Floating point register 0 */
+#endif
+
+#define FP_MAX_REGNUM 80 /* 1 + last fp reg number */
+
+/* #undef v8 misc. regs */
+
+#undef Y_REGNUM
+#undef PS_REGNUM
+#undef WIM_REGNUM
+#undef TBR_REGNUM
+#undef PC_REGNUM
+#undef NPC_REGNUM
+#undef FPS_REGNUM
+#undef CPS_REGNUM
+
+/* v9 misc. and priv. regs */
+
+#define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */
+#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
+#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
+#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
+#define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
+#define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
+#define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
+#define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
+#define VER_REGNUM (C0_REGNUM + 7) /* Version register */
+#define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
+#define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
+#define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
+#define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
+#define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
+#define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
+#define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
+#define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
+#define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
+#define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
+#define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
+#define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
+#define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
+#define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
+#define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
+#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
+ (n = 16...31) */
+#define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
+#define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
+#define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
+#define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
+#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
+#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'.
+ Some of the registers aren't 64 bits, but it's a lot simpler just to assume
+ they all are (since most of them are). */
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (32*8+32*8+45*8)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+ ((N) < 32 ? (N)*8 \
+ : (N) < 64 ? 32*8 + ((N)-32)*4 \
+ : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
+ : 64*8 + ((N)-C0_REGNUM)*8)
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#undef REGISTER_SIZE
+#define REGISTER_SIZE 8
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+ ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#undef REGISTER_VIRTUAL_SIZE
+#define REGISTER_VIRTUAL_SIZE(N) \
+ ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+/* tm-sparc.h defines this as 8, but play it safe. */
+
+#undef MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+/* tm-sparc.h defines this as 8, but play it safe. */
+
+#undef MAX_REGISTER_VIRTUAL_SIZE
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < 32 ? builtin_type_long_long \
+ : (N) < 64 ? builtin_type_float \
+ : (N) < 80 ? builtin_type_double \
+ : builtin_type_long_long)
+
+/* We use to support both 32 bit and 64 bit pointers.
+ We can't anymore because TARGET_PTR_BIT must now be a constant. */
+#undef TARGET_PTR_BIT
+#define TARGET_PTR_BIT 64
+
+/* Longs are 64 bits. */
+#undef TARGET_LONG_BIT
+#define TARGET_LONG_BIT 64
+
+#undef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 64
+
+/* Does the specified function use the "struct returning" convention
+ or the "value returning" convention? The "value returning" convention
+ almost invariably returns the entire value in registers. The
+ "struct returning" convention often returns the entire value in
+ memory, and passes a pointer (out of or into the function) saying
+ where the value (is or should go).
+
+ Since this sometimes depends on whether it was compiled with GCC,
+ this is also an argument. This is used in call_function to build a
+ stack, and in value_being_returned to print return values.
+
+ On Sparc64, we only pass pointers to structs if they're larger then
+ 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
+ values go into %fp0-%fp3). */
+
+
+#undef USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
+
+#undef REG_STRUCT_HAS_ADDR
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+/* FIXME: V9 uses %o0 for this. */
+
+#undef STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#undef FRAME_ARGS_SKIP
+#define FRAME_ARGS_SKIP 136
+
+/* Offsets into jmp_buf.
+ FIXME: This was borrowed from the v8 stuff and will probably have to change
+ for v9. */
+
+#define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+extern CORE_ADDR sparc64_read_sp ();
+extern CORE_ADDR sparc64_read_fp ();
+extern void sparc64_write_sp PARAMS ((CORE_ADDR));
+extern void sparc64_write_fp PARAMS ((CORE_ADDR));
+
+#define TARGET_READ_SP() (sparc64_read_sp ())
+#define TARGET_READ_FP() (sparc64_read_fp ())
+#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
+#define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
+
+CORE_ADDR sp64_push_arguments PARAMS ((int, struct value **, CORE_ADDR, unsigned char, CORE_ADDR));
+#undef PUSH_ARGUMENTS
+#define PUSH_ARGUMENTS(A,B,C,D,E) (sp = sp64_push_arguments ((A), (B), (C), (D), (E)))
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
+extern void
+sparc64_extract_return_value PARAMS ((struct type *, char [], char *, int));
diff --git a/gdb/config/sparc/tm-sp64sim.h b/gdb/config/sparc/tm-sp64sim.h
new file mode 100644
index 0000000..4545f32
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64sim.h
@@ -0,0 +1,50 @@
+/* Macro definitions for GDB with the SPARC64 Simulator.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* ??? This file is based on tm-spc-em.h. Our contents are probably bogus
+ but it's a good start. */
+
+#include "sparc/tm-sp64.h"
+#include "tm-sunos.h"
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h
new file mode 100644
index 0000000..ecbe9e2
--- /dev/null
+++ b/gdb/config/sparc/tm-sparc.h
@@ -0,0 +1,584 @@
+/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
+ This is included by other tm-*.h files to define SPARC cpu-related info.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
+ Free Software Foundation, Inc.
+ Contributed by Michael Tiemann (tiemann@mcc.com)
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifdef __STDC__
+struct frame_info;
+struct type;
+struct value;
+#endif
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Floating point is IEEE compatible. */
+#define IEEE_FLOAT
+
+/* If an argument is declared "register", Sun cc will keep it in a register,
+ never saving it onto the stack. So we better not believe the "p" symbol
+ descriptor stab. */
+
+#define USE_REGISTER_NOT_ARG
+
+/* When passing a structure to a function, Sun cc passes the address
+ not the structure itself. It (under SunOS4) creates two symbols,
+ which we need to combine to a LOC_REGPARM. Gcc version two (as of
+ 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to
+ distinguish between Sun cc, gcc version 1 and gcc version 2. */
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (gcc_p != 1)
+
+/* Sun /bin/cc gets this right as of SunOS 4.1.x. We need to define
+ BELIEVE_PCC_PROMOTION to get this right now that the code which
+ detects gcc2_compiled. is broken. This loses for SunOS 4.0.x and
+ earlier. */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* For acc, there's no need to correct LBRAC entries by guessing how
+ they should work. In fact, this is harmful because the LBRAC
+ entries now all appear at the end of the function, not intermixed
+ with the SLINE entries. n_opt_found detects acc for Solaris binaries;
+ function_stab_type detects acc for SunOS4 binaries.
+
+ For binary from SunOS4 /bin/cc, need to correct LBRAC's.
+
+ For gcc, like acc, don't correct. */
+
+#define SUN_FIXED_LBRAC_BUG \
+ (n_opt_found \
+ || function_stab_type == N_STSYM \
+ || function_stab_type == N_GSYM \
+ || processing_gcc_compilation)
+
+/* Do variables in the debug stabs occur after the N_LBRAC or before it?
+ acc: after, gcc: before, SunOS4 /bin/cc: before. */
+
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
+ (!(gcc_p) \
+ && (n_opt_found \
+ || function_stab_type == N_STSYM \
+ || function_stab_type == N_GSYM))
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
+ the PC past some of the prologue, but stops as soon as it
+ knows that the function has a frame. Its result is equal
+ to its input PC if the function is frameless, unequal otherwise. */
+
+#define SKIP_PROLOGUE(pc) \
+ { pc = skip_prologue (pc, 0); }
+#define SKIP_PROLOGUE_FRAMELESS_P(pc) \
+ { pc = skip_prologue (pc, 1); }
+extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int));
+
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+/* On the Sun 4 under SunOS, the compile will leave a fake insn which
+ encodes the structure size being returned. If we detect such
+ a fake insn, step past it. */
+
+#define PC_ADJUST(pc) sparc_pc_adjust(pc)
+extern CORE_ADDR sparc_pc_adjust PARAMS ((CORE_ADDR));
+
+#define SAVED_PC_AFTER_CALL(frame) PC_ADJUST (read_register (RP_REGNUM))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls. */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 7) & -8)
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+
+#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 72
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
+ \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
+ \
+ "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" }
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define G0_REGNUM 0 /* %g0 */
+#define G1_REGNUM 1 /* %g1 */
+#define O0_REGNUM 8 /* %o0 */
+#define SP_REGNUM 14 /* Contains address of top of stack, \
+ which is also the bottom of the frame. */
+#define RP_REGNUM 15 /* Contains return address value, *before* \
+ any windows get switched. */
+#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
+#define L0_REGNUM 16 /* First local reg that's saved on stack frame
+ rather than in machine registers */
+#define I0_REGNUM 24 /* %i0 */
+#define FP_REGNUM 30 /* Contains address of executing stack frame */
+#define I7_REGNUM 31 /* Last local reg saved on stack frame */
+#define FP0_REGNUM 32 /* Floating point register 0 */
+#define Y_REGNUM 64 /* Temp register for multiplication, etc. */
+#define PS_REGNUM 65 /* Contains processor status */
+#define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
+#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
+#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
+#define PC_REGNUM 68 /* Contains program counter */
+#define NPC_REGNUM 69 /* Contains next PC */
+#define FPS_REGNUM 70 /* Floating point status register */
+#define CPS_REGNUM 71 /* Coprocessor status register */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. On the sparc, `registers'
+ contains the ins and locals, even though they are saved on the
+ stack rather than with the other registers, and this causes hair
+ and confusion in places like pop_frame. It might be
+ better to remove the ins and locals from `registers', make sure
+ that get_saved_register can get them from the stack (even in the
+ innermost frame), and make this the way to access them. For the
+ frame pointer we would do that via TARGET_READ_FP. On the other hand,
+ that is likely to be confusing or worse for flat frames. */
+
+#define REGISTER_BYTES (32*4+32*4+8*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+/* ?? */
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* We need to override GET_SAVED_REGISTER so that we can deal with the way
+ outs change into ins in different frames. HAVE_REGISTER_WINDOWS can't
+ deal with this case and also handle flat frames at the same time. */
+
+#define GET_SAVED_REGISTER 1
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+/* On the SPARC, all regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) (4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+/* On the SPARC, all regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) (4)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
+ builtin_type_int)
+
+/* Writing to %g0 is a noop (not an error or exception or anything like
+ that, however). */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function_by_hand.
+ The ultimate mystery is, tho, what is the value "16"? */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { char val[4]; \
+ store_unsigned_integer (val, 4, (ADDR)); \
+ write_memory ((SP)+(16*4), val, 4); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ sparc_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void
+sparc_extract_return_value PARAMS ((struct type *, char [], char *));
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ sparc_store_return_value(TYPE, VALBUF)
+extern void sparc_store_return_value PARAMS ((struct type *, char *));
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ (sparc_extract_struct_value_address (REGBUF))
+
+extern CORE_ADDR
+sparc_extract_struct_value_address PARAMS ((char [REGISTER_BYTES]));
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the Sun 4, the frame-chain's nominal address
+ is held in the frame pointer register.
+
+ On the Sun4, the frame (in %fp) is %sp for the previous frame.
+ From the previous frame's %sp, we can find the previous frame's
+ %fp: it is in the save area just above the previous frame's %sp.
+
+ If we are setting up an arbitrary frame, we'll need to know where
+ it ends. Hence the following. This part of the frame cache
+ structure should be checked before it is assumed that this frame's
+ bottom is in the stack pointer.
+
+ If there isn't a frame below this one, the bottom of this frame is
+ in the stack pointer.
+
+ If there is a frame below this one, and the frame pointers are
+ identical, it's a leaf frame and the bottoms are the same also.
+
+ Otherwise the bottom of this frame is the top of the next frame.
+
+ The bottom field is misnamed, since it might imply that memory from
+ bottom to frame contains this frame. That need not be true if
+ stack frames are allocated in different segments (e.g. some on a
+ stack, some on a heap in the data segment).
+
+ GCC 2.6 and later can generate ``flat register window'' code that
+ makes frames by explicitly saving those registers that need to be
+ saved. %i7 is used as the frame pointer, and the frame is laid out so
+ that flat and non-flat calls can be intermixed freely within a
+ program. Unfortunately for GDB, this means it must detect and record
+ the flatness of frames.
+
+ Since the prologue in a flat frame also tells us where fp and pc
+ have been stashed (the frame is of variable size, so their location
+ is not fixed), it's convenient to record them in the frame info. */
+
+#define EXTRA_FRAME_INFO \
+ CORE_ADDR bottom; \
+ int in_prologue; \
+ int flat; \
+ /* Following fields only relevant for flat frames. */ \
+ CORE_ADDR pc_addr; \
+ CORE_ADDR fp_addr; \
+ /* Add this to ->frame to get the value of the stack pointer at the */ \
+ /* time of the register saves. */ \
+ int sp_offset;
+
+#define FRAME_INIT_SAVED_REGS(fp) /*no-op*/
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
+ sparc_init_extra_frame_info (fromleaf, fci)
+extern void sparc_init_extra_frame_info PARAMS((int, struct frame_info *));
+
+#define PRINT_EXTRA_FRAME_INFO(fi) \
+ { \
+ if ((fi) && (fi)->flat) \
+ printf_filtered (" flat, pc saved at 0x%x, fp saved at 0x%x\n", \
+ (fi)->pc_addr, (fi)->fp_addr); \
+ }
+
+#define FRAME_CHAIN(thisframe) (sparc_frame_chain (thisframe))
+extern CORE_ADDR sparc_frame_chain PARAMS ((struct frame_info *));
+
+/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames. */
+
+#define INIT_FRAME_PC(fromleaf, prev) /* nothing */
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+ (prev)->pc = ((fromleaf) ? SAVED_PC_AFTER_CALL ((prev)->next) : \
+ (prev)->next ? FRAME_SAVED_PC ((prev)->next) : read_pc ());
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+/* The location of I0 w.r.t SP. This is actually dependent on how the system's
+ window overflow/underflow routines are written. Most vendors save the L regs
+ followed by the I regs (at the higher address). Some vendors get it wrong.
+ */
+
+#define FRAME_SAVED_L0 0
+#define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
+
+/* Where is the PC for a specific frame */
+
+#define FRAME_SAVED_PC(FRAME) sparc_frame_saved_pc (FRAME)
+extern CORE_ADDR sparc_frame_saved_pc PARAMS ((struct frame_info *));
+
+/* If the argument is on the stack, it will be here. */
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_STRUCT_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 68
+
+/* Things needed for making the inferior call functions. */
+/*
+ * First of all, let me give my opinion of what the DUMMY_FRAME
+ * actually looks like.
+ *
+ * | |
+ * | |
+ * + - - - - - - - - - - - - - - - - +<-- fp (level 0)
+ * | |
+ * | |
+ * | |
+ * | |
+ * | Frame of innermost program |
+ * | function |
+ * | |
+ * | |
+ * | |
+ * | |
+ * | |
+ * |---------------------------------|<-- sp (level 0), fp (c)
+ * | |
+ * DUMMY | fp0-31 |
+ * | |
+ * | ------ |<-- fp - 0x80
+ * FRAME | g0-7 |<-- fp - 0xa0
+ * | i0-7 |<-- fp - 0xc0
+ * | other |<-- fp - 0xe0
+ * | ? |
+ * | ? |
+ * |---------------------------------|<-- sp' = fp - 0x140
+ * | |
+ * xcution start | |
+ * sp' + 0x94 -->| CALL_DUMMY (x code) |
+ * | |
+ * | |
+ * |---------------------------------|<-- sp'' = fp - 0x200
+ * | align sp to 8 byte boundary |
+ * | ==> args to fn <== |
+ * Room for | |
+ * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
+ * |---------------------------------|<-- final sp (variable)
+ * | |
+ * | Where function called will |
+ * | build frame. |
+ * | |
+ * | |
+ *
+ * I understand everything in this picture except what the space
+ * between fp - 0xe0 and fp - 0x140 is used for. Oh, and I don't
+ * understand why there's a large chunk of CALL_DUMMY that never gets
+ * executed (its function is superceeded by PUSH_DUMMY_FRAME; they
+ * are designed to do the same thing).
+ *
+ * PUSH_DUMMY_FRAME saves the registers above sp' and pushes the
+ * register file stack down one.
+ *
+ * call_function then writes CALL_DUMMY, pushes the args onto the
+ * stack, and adjusts the stack pointer.
+ *
+ * run_stack_dummy then starts execution (in the middle of
+ * CALL_DUMMY, as directed by call_function).
+ */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME sparc_push_dummy_frame ()
+#define POP_FRAME sparc_pop_frame ()
+
+void sparc_push_dummy_frame PARAMS ((void)), sparc_pop_frame PARAMS ((void));
+
+#ifndef CALL_DUMMY
+/* This sequence of words is the instructions
+
+ 0: bc 10 00 01 mov %g1, %fp
+ 4: 9d e3 80 00 save %sp, %g0, %sp
+ 8: bc 10 00 02 mov %g2, %fp
+ c: be 10 00 03 mov %g3, %i7
+ 10: da 03 a0 58 ld [ %sp + 0x58 ], %o5
+ 14: d8 03 a0 54 ld [ %sp + 0x54 ], %o4
+ 18: d6 03 a0 50 ld [ %sp + 0x50 ], %o3
+ 1c: d4 03 a0 4c ld [ %sp + 0x4c ], %o2
+ 20: d2 03 a0 48 ld [ %sp + 0x48 ], %o1
+ 24: 40 00 00 00 call <fun>
+ 28: d0 03 a0 44 ld [ %sp + 0x44 ], %o0
+ 2c: 01 00 00 00 nop
+ 30: 91 d0 20 01 ta 1
+ 34: 01 00 00 00 nop
+
+ NOTES:
+ * the first four instructions are necessary only on the simulator.
+ * this is a multiple of 8 (not only 4) bytes.
+ * the `call' insn is a relative, not an absolute call.
+ * the `nop' at the end is needed to keep the trap from
+ clobbering things (if NPC pointed to garbage instead).
+*/
+
+#define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003, \
+ 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c, \
+ 0xd203a048, 0x40000000, 0xd003a044, 0x01000000, \
+ 0x91d02001, 0x01000000 }
+
+
+/* Size of the call dummy in bytes. */
+
+#define CALL_DUMMY_LENGTH 0x38
+
+/* Offset within call dummy of first instruction to execute. */
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
+
+/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
+
+#define CALL_DUMMY_STACK_ADJUST 68
+
+#endif
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
+void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+ struct type *value_type, int using_gcc));
+
+/* The Sparc returns long doubles on the stack. */
+
+#define RETURN_VALUE_ON_STACK(TYPE) \
+ (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
+ && TYPE_LENGTH(TYPE) > 8)
+
+/* Sparc has no reliable single step ptrace call */
+
+#define SOFTWARE_SINGLE_STEP_P 1
+extern void sparc_software_single_step PARAMS ((unsigned int, int));
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
+
+/* We need more arguments in a frame specification for the
+ "frame" or "info frame" command. */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
+
+/* To print every pair of float registers as a double, we use this hook.
+ We also print the condition code registers in a readable format
+ (FIXME: can expand this to all control regs). */
+
+#undef PRINT_REGISTER_HOOK
+#define PRINT_REGISTER_HOOK(regno) \
+ sparc_print_register_hook (regno)
+extern void sparc_print_register_hook PARAMS ((int regno));
+
+
+/* Optimization for storing registers to the inferior. The hook
+ DO_DEFERRED_STORES
+ actually executes any deferred stores. It is called any time
+ we are going to proceed the child, or read its registers.
+ The hook CLEAR_DEFERRED_STORES is called when we want to throw
+ away the inferior process, e.g. when it dies or we kill it.
+ FIXME, this does not handle remote debugging cleanly. */
+
+extern int deferred_stores;
+#define DO_DEFERRED_STORES \
+ if (deferred_stores) \
+ target_store_registers (-2);
+#define CLEAR_DEFERRED_STORES \
+ deferred_stores = 0;
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee. */
+
+#define COERCE_FLOAT_TO_DOUBLE 1
+
+/* Select the sparc disassembler */
+
+#define TM_PRINT_INSN_MACH bfd_mach_sparc
+
+/* Arguments smaller than an int must promoted to ints when synthesizing
+ function calls. */
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+ sp = sparc_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR
+sparc_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
diff --git a/gdb/config/sparc/tm-sparclet.h b/gdb/config/sparc/tm-sparclet.h
new file mode 100644
index 0000000..bc43083
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclet.h
@@ -0,0 +1,132 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+ Copyright 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "sparc/tm-sparc.h"
+
+#define TARGET_SPARCLET 1
+
+/* Select the sparclet disassembler. Slightly different instruction set from
+ the V8 sparc. */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+#undef BREAKPOINT
+#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
+
+#undef NUM_REGS /* formerly "72" */
+/* WIN FP CPU CCP ASR AWR APSR */
+#define NUM_REGS (32 + 32 + 8 + 8 + 8/*+ 32 + 1*/)
+
+#undef REGISTER_BYTES /* formerly "(32*4 + 32*4 + 8*4)" */
+#define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+/* Sparclet has no fp! */
+/* Compiler maps types for floats by number, so can't
+ change the numbers here. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7", \
+ \
+ "", "", "", "", "", "", "", "", /* no FPU regs */ \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ "", "", "", "", "", "", "", "", \
+ /* no CPSR, FPSR */ \
+ "y", "psr", "wim", "tbr", "pc", "npc", "", "", \
+ \
+ "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
+ \
+ /* ASR15 ASR19 (don't display them) */ \
+ "asr1", "", "asr17", "asr18", "", "asr20", "asr21", "asr22", \
+/* \
+ "awr0", "awr1", "awr2", "awr3", "awr4", "awr5", "awr6", "awr7", \
+ "awr8", "awr9", "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
+ "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
+ "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
+ "apsr", \
+ */ \
+}
+
+/* Remove FP dependant code which was defined in tm-sparc.h */
+#undef FP0_REGNUM /* Floating point register 0 */
+#undef FPS_REGNUM /* Floating point status register */
+#undef CPS_REGNUM /* Coprocessor status register */
+
+/* sparclet register numbers */
+#define CCSR_REGNUM 72
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ { \
+ memcpy ((VALBUF), \
+ (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 + \
+ (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM) \
+ ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
+ TYPE_LENGTH(TYPE)); \
+ }
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ { \
+ /* Other values are returned in register %o0. */ \
+ write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF), \
+ TYPE_LENGTH (TYPE)); \
+ }
+
+#undef PRINT_REGISTER_HOOK
+#define PRINT_REGISTER_HOOK(regno)
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparclite.h b/gdb/config/sparc/tm-sparclite.h
new file mode 100644
index 0000000..d841f89
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclite.h
@@ -0,0 +1,98 @@
+/* Macro definitions for GDB for a Fujitsu SPARClite.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_SPARCLITE 1
+
+#include "sparc/tm-sparc.h"
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+#define TARGET_BYTE_ORDER_SELECTABLE
+
+/* Select the sparclite disassembler. Slightly different instruction set from
+ the V8 sparc. */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclite
+
+/* Amount PC must be decremented by after a hardware instruction breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_HW_BREAK 4
+
+#define FRAME_CHAIN_VALID(fp,fi) alternate_frame_chain_valid (fp, fi)
+
+#undef NUM_REGS
+#define NUM_REGS 80
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (32*4+32*4+8*4+8*4)
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
+ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
+ \
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
+ \
+ "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr", \
+ "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr" }
+
+#define DIA1_REGNUM 72 /* debug instr address register 1 */
+#define DIA2_REGNUM 73 /* debug instr address register 2 */
+#define DDA1_REGNUM 74 /* debug data address register 1 */
+#define DDA2_REGNUM 75 /* debug data address register 2 */
+#define DDV1_REGNUM 76 /* debug data value register 1 */
+#define DDV2_REGNUM 77 /* debug data value register 2 */
+#define DCR_REGNUM 78 /* debug control register */
+#define DSR_REGNUM 79 /* debug status regsiter */
+
+#define TARGET_HW_BREAK_LIMIT 2
+#define TARGET_HW_WATCH_LIMIT 2
+
+/* Enable watchpoint macro's */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+ sparclite_check_watch_resources (type, cnt, ot)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+ instruction which caused the watchpoint. It will be necessary for
+ GDB to step over the watchpoint. ***
+
+#define STOPPED_BY_WATCHPOINT(W) \
+ ((W).kind == TARGET_WAITKIND_STOPPED \
+ && (W).value.sig == TARGET_SIGNAL_TRAP \
+ && ((int) read_register (IPSW_REGNUM) & 0x00100000))
+*/
+
+/* Use these macros for watchpoint insertion/deletion. */
+#define target_insert_watchpoint(addr, len, type) sparclite_insert_watchpoint (addr, len, type)
+#define target_remove_watchpoint(addr, len, type) sparclite_remove_watchpoint (addr, len, type)
+#define target_insert_hw_breakpoint(addr, len) sparclite_insert_hw_breakpoint (addr, len)
+#define target_remove_hw_breakpoint(addr, len) sparclite_remove_hw_breakpoint (addr, len)
+#define target_stopped_data_address() sparclite_stopped_data_address()
diff --git a/gdb/config/sparc/tm-sparclynx.h b/gdb/config/sparc/tm-sparclynx.h
new file mode 100644
index 0000000..5a0d908
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclynx.h
@@ -0,0 +1,36 @@
+/* Macro definitions for Sparc running under LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_SPARCLYNX_H
+#define TM_SPARCLYNX_H
+
+#include "tm-lynx.h"
+
+/* Use generic Sparc definitions. */
+#include "sparc/tm-sparc.h"
+
+/* Lynx does this backwards from everybody else */
+
+#undef FRAME_SAVED_I0
+#undef FRAME_SAVED_L0
+
+#define FRAME_SAVED_I0 0
+#define FRAME_SAVED_L0 (8 * REGISTER_RAW_SIZE (I0_REGNUM))
+
+#endif /* TM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/tm-spc-em.h b/gdb/config/sparc/tm-spc-em.h
new file mode 100644
index 0000000..3a9b457
--- /dev/null
+++ b/gdb/config/sparc/tm-spc-em.h
@@ -0,0 +1,46 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+ Copyright 1989, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "sparc/tm-sparc.h"
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sun4os4.h b/gdb/config/sparc/tm-sun4os4.h
new file mode 100644
index 0000000..985e18c
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4os4.h
@@ -0,0 +1,58 @@
+/* Macro definitions for GDB for a Sun 4 running sunos 4.
+ Copyright 1989, 1992, 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "sparc/tm-sparc.h"
+#include "tm-sunos.h"
+
+/* Redefine SKIP_TRAMPOLINE_CODE to handle PIC compiled modules
+ in main executables. */
+
+#undef SKIP_TRAMPOLINE_CODE
+#define SKIP_TRAMPOLINE_CODE(pc) sunos4_skip_trampoline_code (pc)
+extern CORE_ADDR sunos4_skip_trampoline_code PARAMS ((CORE_ADDR));
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
diff --git a/gdb/config/sparc/tm-sun4sol2.h b/gdb/config/sparc/tm-sun4sol2.h
new file mode 100644
index 0000000..7bab6e6
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4sol2.h
@@ -0,0 +1,94 @@
+/* Macro definitions for GDB for a Sun 4 running Solaris 2
+ Copyright 1989, 1992, 1993, 1994, 1995, 1997, 1998
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "sparc/tm-sparc.h"
+#include "tm-sysv4.h"
+
+/* There are two different signal handler trampolines in Solaris2. */
+#define IN_SIGTRAMP(pc, name) \
+ ((name) \
+ && (STREQ ("sigacthandler", name) || STREQ ("ucbsigvechandler", name)))
+
+/* The signal handler gets a pointer to an ucontext as third argument
+ if it is called from sigacthandler. This is the offset to the saved
+ PC within it. sparc_frame_saved_pc knows how to deal with
+ ucbsigvechandler. */
+#define SIGCONTEXT_PC_OFFSET 44
+
+#if 0 /* FIXME Setjmp/longjmp are not as well doc'd in SunOS 5.x yet */
+
+/* Offsets into jmp_buf. Not defined by Sun, but at least documented in a
+ comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4 /* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land. We expect that we have just entered
+ longjmp and haven't yet setup the stack frame, so the args are still in the
+ output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+ extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
+ This routine returns true on success */
+
+extern int
+get_longjmp_target PARAMS ((CORE_ADDR *));
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+#endif /* 0 */
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+ and for SunPRO 3.0, N_FUN symbols too. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+extern char *sunpro_static_transform_name PARAMS ((char *));
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
+
+#define FAULTED_USE_SIGINFO
+
+/* Enable handling of shared libraries for a.out executables. */
+#define HANDLE_SVR4_EXEC_EMULATORS
+
+/* Macros to extract process id and thread id from a composite pid/tid */
+#define PIDGET(pid) ((pid) & 0xffff)
+#define TIDGET(pid) (((pid) >> 16) & 0xffff)
+
+/* Macro to extract carry from given regset. */
+#define PROCFS_GET_CARRY(regset) ((regset)[R_PSR] & PS_FLAG_CARRY)
+
+#ifdef HAVE_THREAD_DB_LIB
+
+extern char *solaris_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) solaris_pid_to_str (PID)
+
+#else
+
+extern char *procfs_pid_to_str PARAMS ((int pid));
+#define target_pid_to_str(PID) procfs_pid_to_str (PID)
+
+#endif
diff --git a/gdb/config/sparc/tm-vxsparc.h b/gdb/config/sparc/tm-vxsparc.h
new file mode 100644
index 0000000..6612943
--- /dev/null
+++ b/gdb/config/sparc/tm-vxsparc.h
@@ -0,0 +1,36 @@
+/* Target machine description for VxWorks sparc's, for GDB, the GNU debugger.
+ Copyright 1993 Free Software Foundation, Inc.
+ Contributed by Cygnus Support.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define GDBINIT_FILENAME ".vxgdbinit"
+
+#define DEFAULT_PROMPT "(vxgdb) "
+
+#include "sparc/tm-spc-em.h"
+
+/* FIXME: These are almost certainly wrong. */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+/* #define VX_SIZE_FPREGS (don't know how many) */
+
diff --git a/gdb/config/sparc/vxsparc.mt b/gdb/config/sparc/vxsparc.mt
new file mode 100644
index 0000000..9eadd17
--- /dev/null
+++ b/gdb/config/sparc/vxsparc.mt
@@ -0,0 +1,3 @@
+# Target: SPARC running VxWorks
+TDEPFILES= sparc-tdep.o remote-vx.o remote-vxsparc.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vxsparc.h
diff --git a/gdb/config/sparc/xm-linux.h b/gdb/config/sparc/xm-linux.h
new file mode 100644
index 0000000..7d68b63
--- /dev/null
+++ b/gdb/config/sparc/xm-linux.h
@@ -0,0 +1,48 @@
+/* Macro definitions for running gdb on a Sparc running Linux.
+ Copyright (C) 1989, 1993, 1994, 1995, 1996, 1998
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef XM_SPARCLINUX_H
+#define XM_SPARCLINUX_H
+
+#include "sparc/xm-sparc.h"
+
+#define HAVE_TERMIOS
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+#define KERNEL_U_ADDR 0x0
+
+#define U_REGS_OFFSET 0
+
+#define NEED_POSIX_SETPGID
+
+/* Need R_OK etc, but USG isn't defined. */
+#include <unistd.h>
+
+/* If you expect to use the mmalloc package to obtain mapped symbol files,
+ for now you have to specify some parameters that determine how gdb places
+ the mappings in it's address space. See the comments in map_to_address()
+ for details. This is expected to only be a short term solution. Yes it
+ is a kludge.
+ FIXME: Make this more automatic. */
+
+#define MMAP_BASE_ADDRESS 0xE0000000 /* First mapping here */
+#define MMAP_INCREMENT 0x01000000 /* Increment to next mapping */
+
+#endif /* _XM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/xm-nbsd.h b/gdb/config/sparc/xm-nbsd.h
new file mode 100644
index 0000000..95fe846
--- /dev/null
+++ b/gdb/config/sparc/xm-nbsd.h
@@ -0,0 +1,21 @@
+/* Parameters for execution on a Sparc running NetBSD, for GDB.
+ Copyright 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/sparc/xm-sparc.h b/gdb/config/sparc/xm-sparc.h
new file mode 100644
index 0000000..06c247e
--- /dev/null
+++ b/gdb/config/sparc/xm-sparc.h
@@ -0,0 +1,22 @@
+/* Host definitions for a Sun 4, for GDB, the GNU debugger.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1996
+ Free Software Foundation, Inc.
+ Contributed by Michael Tiemann (tiemann@mcc.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
diff --git a/gdb/config/sparc/xm-sparclynx.h b/gdb/config/sparc/xm-sparclynx.h
new file mode 100644
index 0000000..7e62628
--- /dev/null
+++ b/gdb/config/sparc/xm-sparclynx.h
@@ -0,0 +1,24 @@
+/* Host-dependent definitions for Sparc running LynxOS, for GDB.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* Get generic LynxOS host definitions. */
+
+#include "xm-lynx.h"
diff --git a/gdb/config/sparc/xm-sun4os4.h b/gdb/config/sparc/xm-sun4os4.h
new file mode 100644
index 0000000..e50a213
--- /dev/null
+++ b/gdb/config/sparc/xm-sun4os4.h
@@ -0,0 +1,34 @@
+/* Macro definitions for running gdb on a Sun 4 running sunos 4.
+ Copyright (C) 1989, 1993, 1994, 1995, 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "sparc/xm-sparc.h"
+
+#define FPU
+
+/* /usr/include/malloc.h is included by vx-share/xdr_ld, and might
+ declare these using char * not void *. The following should work with
+ acc, gcc, or /bin/cc. */
+
+#define MALLOC_INCOMPATIBLE
+#include <malloc.h>
+
+/* SunOS 4.x uses nonstandard "char *" as type of third argument to ptrace() */
+
+#define PTRACE_ARG3_TYPE char*
diff --git a/gdb/config/sparc/xm-sun4sol2.h b/gdb/config/sparc/xm-sun4sol2.h
new file mode 100644
index 0000000..bc49ce4
--- /dev/null
+++ b/gdb/config/sparc/xm-sun4sol2.h
@@ -0,0 +1,49 @@
+/* Macro definitions for running gdb on a Sun 4 running Solaris 2.
+ Copyright 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Most of what we know is generic to SPARC hosts. */
+
+#include "sparc/xm-sparc.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
+
+/* gdb wants to use the prgregset_t interface rather than
+ the gregset_t interface, partly because that's what's
+ used in core-sol2.c */
+
+#define GDB_GREGSET_TYPE prgregset_t
+#define GDB_FPREGSET_TYPE prfpregset_t
+
+/* These are not currently used in SVR4 (but should be, FIXME!). */
+#undef DO_DEFERRED_STORES
+#undef CLEAR_DEFERRED_STORES
+
+/* May be needed, may be not? From Pace Willisson's port. FIXME. */
+#define NEED_POSIX_SETPGID
+
+/* solaris doesn't have siginterrupt, though it has sigaction; however,
+ in this case siginterrupt would just be setting the default. */
+#define NO_SIGINTERRUPT
+
+/* On sol2.7, <curses.h> emits a bunch of 'macro redefined'
+ warnings, which makes autoconf think curses.h doesn't
+ exist. Compensate fot that here. */
+#define HAVE_CURSES_H 1
diff --git a/gdb/config/tahoe/tahoe.mh b/gdb/config/tahoe/tahoe.mh
new file mode 100644
index 0000000..0814c01
--- /dev/null
+++ b/gdb/config/tahoe/tahoe.mh
@@ -0,0 +1,4 @@
+# Host: CCI or Harris Tahoe running BSD Unix
+
+XM_FILE= xm-tahoe.h
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/tahoe/tahoe.mt b/gdb/config/tahoe/tahoe.mt
new file mode 100644
index 0000000..b91a77e
--- /dev/null
+++ b/gdb/config/tahoe/tahoe.mt
@@ -0,0 +1,3 @@
+# Target: CCI or Harris Tahoe running BSD Unix
+TDEPFILES= tahoe-tdep.o
+TM_FILE= tm-tahoe.h
diff --git a/gdb/config/tahoe/tm-tahoe.h b/gdb/config/tahoe/tm-tahoe.h
new file mode 100644
index 0000000..a9df374
--- /dev/null
+++ b/gdb/config/tahoe/tm-tahoe.h
@@ -0,0 +1,289 @@
+/* Definitions to make GDB target for a tahoe running 4.3-Reno.
+ Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * Ported by the State University of New York at Buffalo by the Distributed
+ * Computer Systems Lab, Department of Computer Science, 1991.
+ */
+
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+#define BITS_BIG_ENDIAN 0
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 2
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+{ register int op = (unsigned char) read_memory_integer (pc, 1); \
+ if (op == 0x11) pc += 2; /* skip brb */ \
+ if (op == 0x13) pc += 3; /* skip brw */ \
+ if (op == 0x2c && \
+ ((unsigned char) read_memory_integer (pc+2, 1)) == 0x5e) \
+ pc += 3; /* skip subl2 */ \
+ if (op == 0xe9 && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xae && \
+ ((unsigned char) read_memory_integer(pc+3, 1)) == 0x5e) \
+ pc += 4; /* skip movab */ \
+ if (op == 0xe9 && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xce && \
+ ((unsigned char) read_memory_integer(pc+4, 1)) == 0x5e) \
+ pc += 5; /* skip movab */ \
+ if (op == 0xe9 && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xee && \
+ ((unsigned char) read_memory_integer(pc+6, 1)) == 0x5e) \
+ pc += 7; /* skip movab */ \
+}
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) FRAME_SAVED_PC(frame)
+
+/* Wrong for cross-debugging. I don't know the real values. */
+#include <machine/param.h>
+#define TARGET_UPAGES UPAGES
+#define TARGET_NBPG NBPG
+
+/* Address of end of stack space. */
+
+#define STACK_END_ADDR (0xc0000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+/* On BSD, sigtramp is in the u area. Can't check the exact
+ addresses because for cross-debugging we don't have target include
+ files around. This should be close enough. */
+#define IN_SIGTRAMP(pc, name) ((pc) >= STACK_END_ADDR && (pc < 0xc0000000))
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0x30}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Return 1 if P points to an invalid floating point value.
+ LEN is the length in bytes -- not relevant on the Tahoe. */
+
+#define INVALID_FLOAT(p, len) ((*(short *) p & 0xff80) == 0x8000)
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 19
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "fp", "sp", "pc", "ps", "al", "ah"}
+
+#define FP_REGNUM 13 /* Contains address of executing stack frame */
+#define SP_REGNUM 14 /* Contains address of top of stack */
+#define PC_REGNUM 15 /* Contains program counter */
+#define PS_REGNUM 16 /* Contains processor status */
+
+#define AL_REGNUM 17 /* Contains accumulator */
+#define AH_REGNUM 18
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+
+#define REGISTER_BYTES (19*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the tahoe, all regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the tahoe, all regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) builtin_type_int
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (1, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller).
+
+ FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the Tahoe, the frame's nominal address is the FP value,
+ and it points to the old FP */
+
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+/* Saved PC */
+
+#define FRAME_SAVED_PC(FRAME) (read_memory_integer ((FRAME)->frame - 8, 4))
+
+/* In most of GDB, getting the args address is too important to
+ just say "I don't know". */
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+/* Address to use as an anchor for finding local variables */
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) \
+{ numargs = ((0xffff & read_memory_integer(((fi)->frame-4),4)) - 4) >> 2; }
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ register int regnum; \
+ register int rmask = read_memory_integer ((frame_info)->frame-4, 4) >> 16;\
+ register CORE_ADDR next_addr; \
+ memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \
+ next_addr = (frame_info)->frame - 8; \
+ for (regnum = 12; regnum >= 0; regnum--, rmask <<= 1) \
+ (frame_saved_regs).regs[regnum] = (rmask & 0x1000) ? (next_addr -= 4) : 0;\
+ (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame + 4; \
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame - 8; \
+ (frame_saved_regs).regs[FP_REGNUM] = (frame_info)->frame; \
+}
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM); \
+ register int regnum; \
+printf("PUSH_DUMMY_FRAME\n"); \
+ sp = push_word (sp, read_register (FP_REGNUM)); \
+ write_register (FP_REGNUM, sp); \
+ sp = push_word (sp, 0x1fff0004); /*SAVE MASK*/ \
+ sp = push_word (sp, read_register (PC_REGNUM)); \
+ for (regnum = 12; regnum >= 0; regnum--) \
+ sp = push_word (sp, read_register (regnum)); \
+ write_register (SP_REGNUM, sp); \
+}
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+{ register CORE_ADDR fp = read_register (FP_REGNUM); \
+ register int regnum; \
+ register int regmask = read_memory_integer (fp-4, 4); \
+printf("POP_FRAME\n"); \
+ regmask >>= 16; \
+ write_register (SP_REGNUM, fp+4); \
+ write_register (PC_REGNUM, read_memory_integer(fp-8, 4)); \
+ write_register (FP_REGNUM, read_memory_integer(fp, 4)); \
+ fp -= 8; \
+ for (regnum = 12; regnum >= 0; regnum--, regmask <<= 1) \
+ if (regmask & 0x1000) \
+ write_register (regnum, read_memory_integer (fp-=4, 4)); \
+ flush_cached_frames (); \
+}
+
+/* This sequence of words is the instructions
+ calls #69, @#32323232
+ bpt
+ Note this is 8 bytes. */
+
+#define CALL_DUMMY {0xbf699f32, 0x32323230}
+
+/* Start execution at beginning of dummy */
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, valtype, using_gcc) \
+{ int temp = (int) fun; \
+ *((char *) dummyname + 1) = nargs; \
+ memcpy((char *)dummyname+3,&temp,4); }
+
diff --git a/gdb/config/tahoe/xm-tahoe.h b/gdb/config/tahoe/xm-tahoe.h
new file mode 100644
index 0000000..99af344
--- /dev/null
+++ b/gdb/config/tahoe/xm-tahoe.h
@@ -0,0 +1,136 @@
+/* Definitions to make GDB hosted on a tahoe running 4.3-Reno
+ Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
+ Contributed by the State University of New York at Buffalo, by the
+ Distributed Computer Systems Lab, Department of Computer Science, 1991.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Make sure the system include files define BIG_ENDIAN, UINT_MAX, const,
+ etc, rather than GDB's files. */
+#include <stdio.h>
+#include <sys/param.h>
+
+/* Host is big-endian */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0xc0000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = blockend - 100 + regno * 4; \
+ if (regno == PC_REGNUM) addr = blockend - 8; \
+ if (regno == PS_REGNUM) addr = blockend - 4; \
+ if (regno == FP_REGNUM) addr = blockend - 40; \
+ if (regno == SP_REGNUM) addr = blockend - 36; \
+ if (regno == AL_REGNUM) addr = blockend - 20; \
+ if (regno == AH_REGNUM) addr = blockend - 24;}
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
+ 0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0}
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movl $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+
+#define PUSH_FRAME_PTR \
+ asm ("pushl fp");
+
+/* Copy the top-of-stack to the frame pointer register. */
+
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("pushl 8(sp)"); \
+ asm ("pushl 8(sp)"); \
+ asm ("pushal 0x41(sp)"); \
+ asm ("pushl r0" ); \
+ asm ("pushl r1" ); \
+ asm ("pushl r2" ); \
+ asm ("pushl r3" ); \
+ asm ("pushl r4" ); \
+ asm ("pushl r5" ); \
+ asm ("pushl r6" ); \
+ asm ("pushl r7" ); \
+ asm ("pushl r8" ); \
+ asm ("pushl r9" ); \
+ asm ("pushl r10" ); \
+ asm ("pushl r11" ); \
+ asm ("pushl r12" ); \
+ asm ("pushl fp" ); \
+ asm ("pushl sp" ); \
+ asm ("pushl pc" ); \
+ asm ("pushl ps" ); \
+ asm ("pushl aclo" ); \
+ asm ("pushl achi" ); \
+}
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ \
+ asm ("movl (sp)+, achi"); \
+ asm ("movl (sp)+, aclo"); \
+ asm ("movl (sp)+, ps"); \
+ asm ("movl (sp)+, pc"); \
+ asm ("movl (sp)+, sp"); \
+ asm ("movl (sp)+, fp"); \
+ asm ("movl (sp)+, r12"); \
+ asm ("movl (sp)+, r11"); \
+ asm ("movl (sp)+, r10"); \
+ asm ("movl (sp)+, r9"); \
+ asm ("movl (sp)+, r8"); \
+ asm ("movl (sp)+, r7"); \
+ asm ("movl (sp)+, r6"); \
+ asm ("movl (sp)+, r5"); \
+ asm ("movl (sp)+, r4"); \
+ asm ("movl (sp)+, r3"); \
+ asm ("movl (sp)+, r2"); \
+ asm ("movl (sp)+, r1"); \
+ asm ("movl (sp)+, r0"); \
+ asm ("subl2 $8,(sp)"); \
+ asm ("movl (sp),sp"); \
+ asm ("rei"); }
diff --git a/gdb/config/tm-lynx.h b/gdb/config/tm-lynx.h
new file mode 100644
index 0000000..7107241
--- /dev/null
+++ b/gdb/config/tm-lynx.h
@@ -0,0 +1,34 @@
+/* Macro definitions for LynxOS targets.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef TM_LYNX_H
+#define TM_LYNX_H
+
+/* Override number of expected traps from sysv. */
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+#include "coff-solib.h" /* COFF shared library support */
+
+/* Lynx's signal.h doesn't seem to have any macros for what signal numbers
+ the real-time events are. */
+#define REALTIME_LO 33
+/* One more than the last one. */
+#define REALTIME_HI 64
+
+#endif /* TM_LYNX_H */
diff --git a/gdb/config/tm-nbsd.h b/gdb/config/tm-nbsd.h
new file mode 100644
index 0000000..e295d85
--- /dev/null
+++ b/gdb/config/tm-nbsd.h
@@ -0,0 +1,19 @@
+/* Target machine sub-description for NetBSD.
+ This is included by other tm-*.h files to specify NetBSD-specific stuff.
+ Copyright 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
diff --git a/gdb/config/tm-sunos.h b/gdb/config/tm-sunos.h
new file mode 100644
index 0000000..26ec3cf
--- /dev/null
+++ b/gdb/config/tm-sunos.h
@@ -0,0 +1,31 @@
+/* Target machine sub-description for SunOS version 4.
+ This is included by other tm-*.h files to specify SunOS-specific stuff.
+ Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "solib.h" /* Support for shared libraries. */
+
+/* Return non-zero if we are in a shared library trampoline code stub. */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+ lookup_solib_trampoline_symbol_by_pc (pc)
+
+/* If PC is in a shared library trampoline code, return the PC
+ where the function itself actually starts. If not, return 0. */
+
+#define SKIP_TRAMPOLINE_CODE(pc) find_solib_trampoline_target (pc)
diff --git a/gdb/config/tm-sysv4.h b/gdb/config/tm-sysv4.h
new file mode 100644
index 0000000..2c08541
--- /dev/null
+++ b/gdb/config/tm-sysv4.h
@@ -0,0 +1,45 @@
+/* Macro definitions for GDB on all SVR4 target systems.
+ Copyright 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* For SVR4 shared libraries, each call to a library routine goes through
+ a small piece of trampoline code in the ".plt" section.
+ The horribly ugly wait_for_inferior() routine uses this macro to detect
+ when we have stepped into one of these fragments.
+ We do not use lookup_solib_trampoline_symbol_by_pc, because
+ we cannot always find the shared library trampoline symbols
+ (e.g. on Irix5). */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) in_plt_section((pc), (name))
+extern int in_plt_section PARAMS ((CORE_ADDR, char *));
+
+/* If PC is in a shared library trampoline code, return the PC
+ where the function itself actually starts. If not, return 0. */
+
+#define SKIP_TRAMPOLINE_CODE(pc) find_solib_trampoline_target (pc)
+
+/* It is unknown which, if any, SVR4 assemblers do not accept dollar signs
+ in identifiers. The default in G++ is to use dots instead, for all SVR4
+ systems, so we make that our default also. FIXME: There should be some
+ way to get G++ to tell us what CPLUS_MARKER it is using, perhaps by
+ stashing it in the debugging information as part of the name of an
+ invented symbol ("gcc_cplus_marker$" for example). */
+
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
diff --git a/gdb/config/v850/tm-v850.h b/gdb/config/v850/tm-v850.h
new file mode 100644
index 0000000..14dd7f0
--- /dev/null
+++ b/gdb/config/v850/tm-v850.h
@@ -0,0 +1,174 @@
+/* Parameters for execution on an NEC V850 processor.
+ Copyright 1996
+ Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+#define NUM_REGS 66
+
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
+ \
+ "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", \
+ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", \
+ "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23", \
+ "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", \
+ \
+ "pc", "fp" }
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+extern char **v850_register_names;
+#define REGISTER_NAME(i) v850_register_names[i]
+
+
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+#define REGISTER_SIZE 4
+#define MAX_REGISTER_RAW_SIZE 4
+
+#define R0_REGNUM 0
+#define R1_REGNUM 1
+#define SAVE1_START_REGNUM 2
+#define SAVE1_END_REGNUM 2
+#define SP_REGNUM 3
+#define ARG0_REGNUM 6
+#define ARGLAST_REGNUM 9
+#define V0_REGNUM 10
+#define V1_REGNUM 11
+#define R12_REGNUM 12
+#define SAVE2_START_REGNUM 20
+#define SAVE2_END_REGNUM 29
+#define EP_REGNUM 30
+#define SAVE3_START_REGNUM 31
+#define SAVE3_END_REGNUM 31
+#define RP_REGNUM 31
+#define SR0_REGNUM 32
+#define PS_REGNUM (SR0_REGNUM+5)
+#define CTBP_REGNUM (SR0_REGNUM+20)
+#define PC_REGNUM 64
+#define FP_REGNUM 65
+#define FP_RAW_REGNUM 29
+
+#define TARGET_READ_FP() read_register (FP_RAW_REGNUM)
+#define TARGET_WRITE_FP(VAL) write_register (FP_REGNUM, (VAL))
+
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+#define REGISTER_BYTE(REG) ((REG) * 4)
+#define REGISTER_VIRTUAL_SIZE(REG) 4
+#define REGISTER_RAW_SIZE(REG) 4
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+#define BREAKPOINT {0x40, 0xF8} /* little-ended */
+
+#define FUNCTION_START_OFFSET 0
+
+#define DECR_PC_AFTER_BREAK 0
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
+
+#ifdef __STDC__
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+#endif
+
+#define EXTRA_FRAME_INFO struct frame_saved_regs fsr;
+
+extern void v850_init_extra_frame_info PARAMS ((struct frame_info *fi));
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) v850_init_extra_frame_info (fi)
+#define INIT_FRAME_PC /* Not necessary */
+
+extern void v850_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *regaddr));
+#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
+
+extern CORE_ADDR v850_frame_chain PARAMS ((struct frame_info *fi));
+#define FRAME_CHAIN(fi) v850_frame_chain (fi)
+#define FRAME_CHAIN_VALID(FP, FI) generic_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR v850_find_callers_reg PARAMS ((struct frame_info *fi, int regnum));
+extern CORE_ADDR v850_frame_saved_pc PARAMS ((struct frame_info *));
+#define FRAME_SAVED_PC(FI) (v850_frame_saved_pc (FI))
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+ memcpy (VALBUF, REGBUF + REGISTER_BYTE (V0_REGNUM), TYPE_LENGTH (TYPE))
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+ extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+ REGISTER_RAW_SIZE (V0_REGNUM))
+
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+ write_register_bytes(REGISTER_BYTE (V0_REGNUM), VALBUF, TYPE_LENGTH (TYPE));
+
+extern CORE_ADDR v850_skip_prologue PARAMS ((CORE_ADDR pc));
+#define SKIP_PROLOGUE(pc) pc = v850_skip_prologue (pc)
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_NUM_ARGS(val, fi) ((val) = -1)
+
+extern void v850_pop_frame PARAMS ((struct frame_info *frame));
+#define POP_FRAME v850_pop_frame (get_current_frame ())
+
+#define USE_GENERIC_DUMMY_FRAMES
+#define CALL_DUMMY {0}
+#define CALL_DUMMY_START_OFFSET (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS() entry_point_address ()
+extern CORE_ADDR v850_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
+#define PUSH_RETURN_ADDRESS(PC, SP) v850_push_return_address (PC, SP)
+
+
+#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
+
+extern CORE_ADDR
+v850_push_arguments PARAMS ((int nargs, struct value **args, CORE_ADDR sp,
+ unsigned char struct_return,
+ CORE_ADDR struct_addr));
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+ (SP) = v850_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP)
+
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP)
+
+extern use_struct_convention_fn v850_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) v850_use_struct_convention (GCC_P, TYPE);
+
+/* override the default get_saved_register function with
+ one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER
+
+/* Define this for Wingdb */
+
+#define TARGET_V850
diff --git a/gdb/config/v850/v850.mt b/gdb/config/v850/v850.mt
new file mode 100644
index 0000000..848bc8d
--- /dev/null
+++ b/gdb/config/v850/v850.mt
@@ -0,0 +1,5 @@
+# Target: NEC V850 processor
+TDEPFILES= v850-tdep.o
+TM_FILE= tm-v850.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/v850/libsim.a
diff --git a/gdb/config/vax/nm-vax.h b/gdb/config/vax/nm-vax.h
new file mode 100644
index 0000000..11f7dc9
--- /dev/null
+++ b/gdb/config/vax/nm-vax.h
@@ -0,0 +1,28 @@
+/* Common definitions for GDB native support on Vaxen under 4.2bsd and Ultrix.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ addr = blockend - 0110 + regno * 4; \
+ if (regno == PC_REGNUM) addr = blockend - 8; \
+ if (regno == PS_REGNUM) addr = blockend - 4; \
+ if (regno == FP_REGNUM) addr = blockend - 0120; \
+ if (regno == AP_REGNUM) addr = blockend - 0124; \
+ if (regno == SP_REGNUM) addr = blockend - 20; }
+
+
diff --git a/gdb/config/vax/tm-vax.h b/gdb/config/vax/tm-vax.h
new file mode 100644
index 0000000..ad10fb7
--- /dev/null
+++ b/gdb/config/vax/tm-vax.h
@@ -0,0 +1,330 @@
+/* Definitions to make GDB run on a vax under 4.2bsd.
+ Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 2
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(pc) \
+{ register int op = (unsigned char) read_memory_integer (pc, 1); \
+ if (op == 0x11) pc += 2; /* skip brb */ \
+ if (op == 0x31) pc += 3; /* skip brw */ \
+ if (op == 0xC2 && \
+ ((unsigned char) read_memory_integer (pc+2, 1)) == 0x5E) \
+ pc += 3; /* skip subl2 */ \
+ if (op == 0x9E && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xAE && \
+ ((unsigned char) read_memory_integer(pc+3, 1)) == 0x5E) \
+ pc += 4; /* skip movab */ \
+ if (op == 0x9E && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xCE && \
+ ((unsigned char) read_memory_integer(pc+4, 1)) == 0x5E) \
+ pc += 5; /* skip movab */ \
+ if (op == 0x9E && \
+ ((unsigned char) read_memory_integer (pc+1, 1)) == 0xEE && \
+ ((unsigned char) read_memory_integer(pc+6, 1)) == 0x5E) \
+ pc += 7; /* skip movab */ \
+}
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) FRAME_SAVED_PC(frame)
+
+#define TARGET_UPAGES 14
+#define TARGET_NBPG 512
+#define STACK_END_ADDR (0x80000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+/* On the VAX, sigtramp is in the u area. Can't check the exact
+ addresses because for cross-debugging we don't have VAX include
+ files around. This should be close enough. */
+#define SIGTRAMP_START(pc) STACK_END_ADDR
+#define SIGTRAMP_END(pc) 0x80000000
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {3}
+
+/* Amount PC must be decremented by after a breakpoint.
+ This is often the number of bytes in BREAKPOINT
+ but not always. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Return 1 if P points to an invalid floating point value.
+ LEN is the length in bytes -- not relevant on the Vax. */
+
+#define INVALID_FLOAT(p, len) ((*(short *) p & 0xff80) == 0x8000)
+
+/* Say how long (ordinary) registers are. This is a piece of bogosity
+ used in push_word and a few other places; REGISTER_RAW_SIZE is the
+ real way to know how big a register is. */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 17
+
+/* Initializer for an array of names of registers.
+ There should be NUM_REGS strings in this initializer. */
+
+#define REGISTER_NAMES {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc", "ps"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define AP_REGNUM 12
+#define FP_REGNUM 13 /* Contains address of executing stack frame */
+#define SP_REGNUM 14 /* Contains address of top of stack */
+#define PC_REGNUM 15 /* Contains program counter */
+#define PS_REGNUM 16 /* Contains processor status */
+
+/* Total amount of space needed to store our copies of the machine's
+ register state, the array `registers'. */
+#define REGISTER_BYTES (17*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the vax, all regs are 4 bytes. */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Number of bytes of storage in the program's representation
+ for register N. On the vax, all regs are 4 bytes. */
+
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) builtin_type_int
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (1, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE))
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the Vax, the frame's nominal address is the FP value,
+ and 12 bytes later comes the saved previous FP value as a 4-byte word. */
+
+#define FRAME_CHAIN(thisframe) \
+ (!inside_entry_file ((thisframe)->pc) ? \
+ read_memory_integer ((thisframe)->frame + 12, 4) :\
+ 0)
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+/* On the vax, all functions have frames. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;}
+
+/* Saved Pc. Get it from sigcontext if within sigtramp. */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>. */
+#define SIGCONTEXT_PC_OFFSET 12
+
+#define FRAME_SAVED_PC(FRAME) \
+ (((FRAME)->signal_handler_caller \
+ ? sigtramp_saved_pc (FRAME) \
+ : read_memory_integer ((FRAME)->frame + 16, 4)) \
+ )
+
+/* Cannot find the AP register value directly from the FP value. Must
+ find it saved in the frame called by this one, or in the AP
+ register for the innermost frame. However, there is no way to tell
+ the difference between the innermost frame and a frame for which we
+ just don't know the frame that it called (e.g. "info frame
+ 0x7ffec789"). For the sake of argument suppose that the stack is
+ somewhat trashed (which is one reason that "info frame" exists).
+ So return 0 (indicating we don't know the address of
+ the arglist) if we don't know what frame this frame calls. */
+#define FRAME_ARGS_ADDRESS_CORRECT(fi) \
+ (((fi)->next \
+ ? read_memory_integer ((fi)->next->frame + 8, 4) \
+ : /* read_register (AP_REGNUM) */ 0))
+
+/* In most of GDB, getting the args address is too important to
+ just say "I don't know". This is sometimes wrong for functions
+ that aren't on top of the stack, but c'est la vie. */
+#define FRAME_ARGS_ADDRESS(fi) \
+ (((fi)->next \
+ ? read_memory_integer ((fi)->next->frame + 8, 4) \
+ : read_register (AP_REGNUM) /* 0 */))
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+ Can return -1, meaning no way to tell. */
+
+#define FRAME_NUM_ARGS(numargs, fi) \
+{ numargs = (0xff & read_memory_integer (FRAME_ARGS_ADDRESS (fi), 1)); }
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 4
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+{ register int regnum; \
+ register int regmask = read_memory_integer ((frame_info)->frame+4, 4) >> 16; \
+ register CORE_ADDR next_addr; \
+ memset (&frame_saved_regs, '\0', sizeof frame_saved_regs); \
+ next_addr = (frame_info)->frame + 16; \
+ /* Regmask's low bit is for register 0, \
+ which is the first one that would be pushed. */ \
+ for (regnum = 0; regnum < 12; regnum++, regmask >>= 1) \
+ (frame_saved_regs).regs[regnum] = (regmask & 1) ? (next_addr += 4) : 0; \
+ (frame_saved_regs).regs[SP_REGNUM] = next_addr + 4; \
+ if (read_memory_integer ((frame_info)->frame + 4, 4) & 0x20000000) \
+ (frame_saved_regs).regs[SP_REGNUM] += 4 + 4 * read_memory_integer (next_addr + 4, 4); \
+ (frame_saved_regs).regs[PC_REGNUM] = (frame_info)->frame + 16; \
+ (frame_saved_regs).regs[FP_REGNUM] = (frame_info)->frame + 12; \
+ (frame_saved_regs).regs[AP_REGNUM] = (frame_info)->frame + 8; \
+ (frame_saved_regs).regs[PS_REGNUM] = (frame_info)->frame + 4; \
+}
+
+/* Things needed for making the inferior call functions. */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME \
+{ register CORE_ADDR sp = read_register (SP_REGNUM);\
+ register int regnum; \
+ sp = push_word (sp, 0); /* arglist */ \
+ for (regnum = 11; regnum >= 0; regnum--) \
+ sp = push_word (sp, read_register (regnum)); \
+ sp = push_word (sp, read_register (PC_REGNUM)); \
+ sp = push_word (sp, read_register (FP_REGNUM)); \
+ sp = push_word (sp, read_register (AP_REGNUM)); \
+ sp = push_word (sp, (read_register (PS_REGNUM) & 0xffef) \
+ + 0x2fff0000); \
+ sp = push_word (sp, 0); \
+ write_register (SP_REGNUM, sp); \
+ write_register (FP_REGNUM, sp); \
+ write_register (AP_REGNUM, sp + 17 * sizeof (int)); }
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME \
+{ register CORE_ADDR fp = read_register (FP_REGNUM); \
+ register int regnum; \
+ register int regmask = read_memory_integer (fp + 4, 4); \
+ write_register (PS_REGNUM, \
+ (regmask & 0xffff) \
+ | (read_register (PS_REGNUM) & 0xffff0000)); \
+ write_register (PC_REGNUM, read_memory_integer (fp + 16, 4)); \
+ write_register (FP_REGNUM, read_memory_integer (fp + 12, 4)); \
+ write_register (AP_REGNUM, read_memory_integer (fp + 8, 4)); \
+ fp += 16; \
+ for (regnum = 0; regnum < 12; regnum++) \
+ if (regmask & (0x10000 << regnum)) \
+ write_register (regnum, read_memory_integer (fp += 4, 4)); \
+ fp = fp + 4 + ((regmask >> 30) & 3); \
+ if (regmask & 0x20000000) \
+ { regnum = read_memory_integer (fp, 4); \
+ fp += (regnum + 1) * 4; } \
+ write_register (SP_REGNUM, fp); \
+ flush_cached_frames (); \
+}
+
+/* This sequence of words is the instructions
+ calls #69, @#32323232
+ bpt
+ Note this is 8 bytes. */
+
+#define CALL_DUMMY {0x329f69fb, 0x03323232}
+
+#define CALL_DUMMY_START_OFFSET 0 /* Start execution at beginning of dummy */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET 7
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ *((char *) dummyname + 1) = nargs; \
+ *(int *)((char *) dummyname + 3) = fun; }
+
+/* If vax pcc says CHAR or SHORT, it provides the correct address. */
+
+#define BELIEVE_PCC_PROMOTION 1
diff --git a/gdb/config/vax/vax.mt b/gdb/config/vax/vax.mt
new file mode 100644
index 0000000..ebdf942
--- /dev/null
+++ b/gdb/config/vax/vax.mt
@@ -0,0 +1,3 @@
+# Target: DEC VAX running BSD or Ultrix
+TDEPFILES= vax-tdep.o
+TM_FILE= tm-vax.h
diff --git a/gdb/config/vax/vaxbsd.mh b/gdb/config/vax/vaxbsd.mh
new file mode 100644
index 0000000..078687d
--- /dev/null
+++ b/gdb/config/vax/vaxbsd.mh
@@ -0,0 +1,13 @@
+# Host: DEC VAX running BSD
+
+# The following types of /bin/cc failures have been observed:
+# 1. Something in readline.c which I have never seen
+# 2. ``"values.c", line 816: compiler error: schain botch''
+#msg /bin/cc has been known to fail on VAXen running BSD4.3
+#msg If this occurs, use gcc
+#msg (but see comments in Makefile.dist about compiling with gcc).
+
+XM_FILE= xm-vaxbsd.h
+XDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+
+NAT_FILE= nm-vax.h
diff --git a/gdb/config/vax/vaxult.mh b/gdb/config/vax/vaxult.mh
new file mode 100644
index 0000000..4afcbc8
--- /dev/null
+++ b/gdb/config/vax/vaxult.mh
@@ -0,0 +1,7 @@
+# Host: DEC VAX running Ultrix
+
+XM_FILE= xm-vaxult.h
+XDEPFILES=
+
+NAT_FILE= nm-vax.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/vax/vaxult2.mh b/gdb/config/vax/vaxult2.mh
new file mode 100644
index 0000000..dac73d6
--- /dev/null
+++ b/gdb/config/vax/vaxult2.mh
@@ -0,0 +1,7 @@
+# Host: DEC VAX running Ultrix
+
+XM_FILE= xm-vaxult2.h
+XDEPFILES=
+
+NAT_FILE= nm-vax.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/vax/xm-vax.h b/gdb/config/vax/xm-vax.h
new file mode 100644
index 0000000..fea11c7
--- /dev/null
+++ b/gdb/config/vax/xm-vax.h
@@ -0,0 +1,81 @@
+/* Common definitions to make GDB run on Vaxen under 4.2bsd and Ultrix.
+ Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+
+/* This is the amount to subtract from u.u_ar0
+ to get the offset in the core file of the register values. */
+
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts. */
+#define ONE_PROCESS_WRITETEXT
+
+/* Interface definitions for kernel debugger KDB. */
+
+/* Map machine fault codes into signal numbers.
+ First subtract 0, divide by 4, then index in a table.
+ Faults for which the entry in this table is 0
+ are not handled by KDB; the program's own trap handler
+ gets to handle then. */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE \
+{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
+ 0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0}
+
+/* Start running with a stack stretching from BEG to END.
+ BEG and END should be symbols meaningful to the assembler.
+ This is used only for kdb. */
+
+#define INIT_STACK(beg, end) \
+{ asm (".globl end"); \
+ asm ("movl $ end, sp"); \
+ asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack. */
+#define PUSH_FRAME_PTR \
+ asm ("pushl fp");
+
+/* Copy the top-of-stack to the frame pointer register. */
+#define POP_FRAME_PTR \
+ asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+ that GDB thinks about (all NUM_REGS of them),
+ so that they appear in order of ascending GDB register number.
+ The fault code will be on the stack beyond the last register. */
+
+#define PUSH_REGISTERS \
+{ asm ("pushl 8(sp)"); \
+ asm ("pushl 8(sp)"); \
+ asm ("pushal 0x14(sp)"); \
+ asm ("pushr $037777"); }
+
+/* Assuming the registers (including processor status) have been
+ pushed on the stack in order of ascending GDB register number,
+ restore them and return to the address in the saved PC register. */
+
+#define POP_REGISTERS \
+{ asm ("popr $037777"); \
+ asm ("subl2 $8,(sp)"); \
+ asm ("movl (sp),sp"); \
+ asm ("rei"); }
diff --git a/gdb/config/vax/xm-vaxbsd.h b/gdb/config/vax/xm-vaxbsd.h
new file mode 100644
index 0000000..b42bd70
--- /dev/null
+++ b/gdb/config/vax/xm-vaxbsd.h
@@ -0,0 +1,10 @@
+/* Definitions to make GDB run on a vax under BSD, 4.3 or 4.4. */
+
+/* We have to include these files now, so that GDB will not make
+ competing definitions in defs.h. */
+#include <machine/endian.h>
+/* This should exist on either 4.3 or 4.4. 4.3 doesn't have limits.h
+ or machine/limits.h. */
+#include <sys/param.h>
+
+#include "vax/xm-vax.h"
diff --git a/gdb/config/vax/xm-vaxult.h b/gdb/config/vax/xm-vaxult.h
new file mode 100644
index 0000000..24c6437
--- /dev/null
+++ b/gdb/config/vax/xm-vaxult.h
@@ -0,0 +1,12 @@
+/* Definitions to make GDB run on a vax under Ultrix. */
+
+#include "vax/xm-vax.h"
+extern char *strdup();
+
+/* This is required for Ultrix 3.1b, not for later versions. Ultrix
+ 3.1b can't just use xm-vaxult2.h because Ultrix 3.1b does define
+ FD_SET. Sure, we could have separate configurations for vaxult2,
+ vaxult3, and vaxult, but why bother? Defining the ptrace constants
+ in infptrace.c isn't going to do any harm; it's not like they are
+ going to change. */
+#define NO_PTRACE_H
diff --git a/gdb/config/vax/xm-vaxult2.h b/gdb/config/vax/xm-vaxult2.h
new file mode 100644
index 0000000..d0d3d62
--- /dev/null
+++ b/gdb/config/vax/xm-vaxult2.h
@@ -0,0 +1,11 @@
+/* Definitions to make GDB run on a vax under Ultrix. */
+
+#include "vax/xm-vax.h"
+extern char *strdup();
+
+#define NO_PTRACE_H
+
+/* Old versions of ultrix have fd_set but not the FD_* macros. */
+
+#define FD_SET(bit,fdsetp) ((fdsetp)->fds_bits[(n) / 32] |= (1 << ((n) % 32)))
+#define FD_ZERO(fdsetp) memset (fdsetp, 0, sizeof (*fdsetp))
diff --git a/gdb/config/w65/tm-w65.h b/gdb/config/w65/tm-w65.h
new file mode 100644
index 0000000..2e354bb
--- /dev/null
+++ b/gdb/config/w65/tm-w65.h
@@ -0,0 +1,213 @@
+/* Parameters for execution on a WDC 65816 machine.
+ Copyright (C) 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#define GDB_TARGET_IS_W65
+
+#define IEEE_FLOAT 1
+
+/* Define the bit, byte, and word ordering of the machine. */
+
+#define TARGET_BYTE_ORDER LITTLE_ENDIAN
+
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+extern CORE_ADDR w65_skip_prologue ();
+
+#define SKIP_PROLOGUE(ip) \
+ {(ip) = w65_skip_prologue(ip);}
+
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions.
+
+ The return address is the value saved in the PR register + 4 */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+ saved_pc_after_call(frame)
+
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Illegal instruction - used by the simulator for breakpoint
+ detection */
+
+#define BREAKPOINT {0xcb} /* WAI */
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+#define DECR_PC_AFTER_BREAK 0
+
+/* Return 1 if P points to an invalid floating point value. */
+
+#define INVALID_FLOAT(p, len) 0 /* Just a first guess; not checked */
+
+/* Say how long registers are. */
+/*#define REGISTER_TYPE int*/
+
+/* Say how much memory is needed to store a copy of the register set */
+#define REGISTER_BYTES (NUM_REGS*4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. */
+
+#define REGISTER_RAW_SIZE(N) (((N) < 16) ? 2 : 4)
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (REGISTER_VIRTUAL_SIZE(N) == 2 ? builtin_type_unsigned_short : builtin_type_unsigned_long)
+
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+#define REGISTER_NAMES \
+ {"r0","r1","r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8","r9","r10","r11","r12","r13","r14","r15", \
+ "pc","a", "x", "y", "dbr","d", "s", "p", \
+ "ticks","cycles","insts"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define SP_REGNUM 22
+#define FP_REGNUM 15
+#define NUM_REGS 27
+#define PC_REGNUM 16
+#define P_REGNUM 23
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ We store structs through a pointer passed in R4 */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+ { write_register (4, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE))
+
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format.
+
+ Things always get returned in R4/R5 */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+ write_register_bytes (REGISTER_BYTE(4), VALBUF, TYPE_LENGTH (TYPE))
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#define FRAME_CHAIN(FRAME) w65_frame_chain(FRAME)
+#define FRAME_SAVED_PC(FRAME) (w65_frame_saved_pc(FRAME))
+#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are */
+
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+ frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+#define NAMES_HAVE_UNDERSCORE
+
+typedef unsigned short INSN_WORD;
+
+extern CORE_ADDR w65_addr_bits_remove PARAMS ((CORE_ADDR));
+#define ADDR_BITS_REMOVE(addr) w65_addr_bits_remove (addr)
+
+#define CALL_DUMMY_LENGTH 10
+
+/* Discard from the stack the innermost frame,
+ restoring all saved registers. */
+
+#define POP_FRAME pop_frame();
+
+
+#define NOP {0xea}
+
+#define REGISTER_SIZE 4
+
+#define PRINT_REGISTER_HOOK(regno) print_register_hook(regno)
+
+#define TARGET_INT_BIT 16
+#define TARGET_LONG_BIT 32
+#define TARGET_PTR_BIT 32
diff --git a/gdb/config/w65/w65.mt b/gdb/config/w65/w65.mt
new file mode 100644
index 0000000..06d2325
--- /dev/null
+++ b/gdb/config/w65/w65.mt
@@ -0,0 +1,8 @@
+# Target: WDC 65816 with simulator
+TDEPFILES= w65-tdep.o
+TM_FILE= tm-w65.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/w65/libsim.a
+
+
diff --git a/gdb/config/xm-aix4.h b/gdb/config/xm-aix4.h
new file mode 100644
index 0000000..87062f7
--- /dev/null
+++ b/gdb/config/xm-aix4.h
@@ -0,0 +1,99 @@
+/* Parameters for hosting on an PowerPC, for GDB, the GNU debugger.
+ Copyright 1995, 1998 Free Software Foundation, Inc.
+ Contributed by Cygnus Corporation.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* The following text is taken from config/rs6000.mh:
+ * # The IBM version of /usr/include/rpc/rpc.h has a bug -- it says
+ * # `extern fd_set svc_fdset;' without ever defining the type fd_set.
+ * # Unfortunately this occurs in the vx-share code, which is not configured
+ * # like the rest of GDB (e.g. it doesn't include "defs.h").
+ * # We circumvent this bug by #define-ing fd_set here, but undefining it in
+ * # the xm-rs6000.h file before ordinary modules try to use it. FIXME, IBM!
+ * MH_CFLAGS='-Dfd_set=int'
+ * So, here we do the undefine...which has to occur before we include
+ * <sys/select.h> below.
+ */
+#undef fd_set
+
+#include <sys/select.h>
+
+/* Big end is at the low address */
+
+#define HOST_BYTE_ORDER BIG_ENDIAN
+
+/* At least as of AIX 3.2, we have termios. */
+#define HAVE_TERMIOS 1
+/* #define HAVE_TERMIO 1 */
+
+#define USG 1
+#define HAVE_SIGSETMASK 1
+
+#define FIVE_ARG_PTRACE
+
+/* AIX declares the mem functions differently than defs.h does. AIX is
+ right, but defs.h works on more old systems. For now, override it. */
+
+#define MEM_FNS_DECLARED 1
+
+/* This system requires that we open a terminal with O_NOCTTY for it to
+ not become our controlling terminal. */
+
+#define USE_O_NOCTTY
+
+/* Brain death inherited from PC's pervades. */
+#undef NULL
+#define NULL 0
+
+/* The IBM compiler requires this in order to properly compile alloca(). */
+#pragma alloca
+
+/* There is no vfork. */
+
+#define vfork fork
+
+char *termdef();
+
+/* Signal handler for SIGWINCH `window size changed'. */
+
+#define SIGWINCH_HANDLER aix_resizewindow
+extern void aix_resizewindow PARAMS ((int));
+
+/* `lines_per_page' and `chars_per_line' are local to utils.c. Rectify this. */
+
+#define SIGWINCH_HANDLER_BODY \
+ \
+/* Respond to SIGWINCH `window size changed' signal, and reset GDB's \
+ window settings appropriately. */ \
+ \
+void \
+aix_resizewindow (signo) \
+ int signo; \
+{ \
+ int fd = fileno (stdout); \
+ if (isatty (fd)) { \
+ int val; \
+ \
+ val = atoi (termdef (fd, 'l')); \
+ if (val > 0) \
+ lines_per_page = val; \
+ val = atoi (termdef (fd, 'c')); \
+ if (val > 0) \
+ chars_per_line = val; \
+ } \
+}
diff --git a/gdb/config/xm-lynx.h b/gdb/config/xm-lynx.h
new file mode 100644
index 0000000..d73e2c1
--- /dev/null
+++ b/gdb/config/xm-lynx.h
@@ -0,0 +1,20 @@
+/* Host-dependent definitions for any CPU running LynxOS.
+ Copyright 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include <limits.h> /* for INT_MIN */
diff --git a/gdb/config/xm-mpw.h b/gdb/config/xm-mpw.h
new file mode 100644
index 0000000..0c473d7
--- /dev/null
+++ b/gdb/config/xm-mpw.h
@@ -0,0 +1,81 @@
+/* Macro definitions for running GDB on Apple Macintoshes.
+ Copyright (C) 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "mpw.h"
+
+#include "fopen-bin.h"
+
+#include "spin.h"
+
+#define CANT_FORK
+
+/* Map these standard functions to versions that can do I/O in a console
+ window. */
+
+#define printf hacked_printf
+#define fprintf hacked_fprintf
+#define vprintf hacked_vfprintf
+#define fputs hacked_fputs
+#define fputc hacked_fputc
+#undef putc
+#define putc hacked_putc
+#define fflush hacked_fflush
+
+#define fgetc hacked_fgetc
+
+#define POSIX_UTIME
+
+/* No declaration of strdup in MPW's string.h, oddly enough. */
+
+char *strdup (char *s1);
+
+/* '.' indicates drivers on the Mac, so we need a different filename. */
+
+#define GDBINIT_FILENAME "_gdbinit"
+
+/* Commas are more common to separate dirnames in a path on Macs. */
+
+#define DIRNAME_SEPARATOR ','
+
+/* This is a real crufty hack. */
+
+#define HAVE_TERMIO
+
+/* Addons to the basic MPW-supported signal list. */
+
+#ifndef SIGQUIT
+#define SIGQUIT (1<<6)
+#endif
+#ifndef SIGHUP
+#define SIGHUP (1<<7)
+#endif
+
+/* If __STDC__ is on, then this definition will be missing. */
+
+#ifndef fileno
+#define fileno(p) (p)->_file
+#endif
+
+#ifndef R_OK
+#define R_OK 4
+#endif
+
+extern int StandAlone;
+
+extern int mac_app;
diff --git a/gdb/config/xm-nbsd.h b/gdb/config/xm-nbsd.h
new file mode 100644
index 0000000..2332bb5
--- /dev/null
+++ b/gdb/config/xm-nbsd.h
@@ -0,0 +1,32 @@
+/* Host-dependent definitions for any CPU running NetBSD.
+ Copyright 1993, 1994, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* We have to include these files now, so that GDB will not make
+ competing definitions in defs.h. */
+#include <limits.h>
+
+#include <machine/endian.h>
+#if BYTE_ORDER == BIG_ENDIAN
+#define HOST_BYTE_ORDER BIG_ENDIAN
+#else
+#define HOST_BYTE_ORDER LITTLE_ENDIAN
+#endif
+
+/* NetBSD has termios facilities. */
+#define HAVE_TERMIOS
diff --git a/gdb/config/xm-sysv4.h b/gdb/config/xm-sysv4.h
new file mode 100644
index 0000000..06215e6
--- /dev/null
+++ b/gdb/config/xm-sysv4.h
@@ -0,0 +1,39 @@
+/* Definitions for running gdb on a host machine running any flavor of SVR4.
+ Copyright 1991, 1992 Free Software Foundation, Inc.
+ Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* SVR4 has termios facilities. */
+
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* SVR4 is a derivative of System V Release 3 (USG) */
+
+#define USG
+
+/* Use setpgid(0,0) to run inferior in a separate process group */
+
+#define NEED_POSIX_SETPGID
+
+/* SVR4 has sigsetjmp and siglongjmp */
+#define HAVE_SIGSETJMP
+
+/* We have to include these files now, so that GDB will not make
+ competing definitions in defs.h. */
+#include <limits.h>
diff --git a/gdb/config/z8k/tm-z8k.h b/gdb/config/z8k/tm-z8k.h
new file mode 100644
index 0000000..babde90
--- /dev/null
+++ b/gdb/config/z8k/tm-z8k.h
@@ -0,0 +1,287 @@
+/* Parameters for execution on a z8000 series machine.
+ Copyright 1992, 1993 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#define IEEE_FLOAT 1
+
+#undef TARGET_INT_BIT
+#undef TARGET_LONG_BIT
+#undef TARGET_SHORT_BIT
+#undef TARGET_PTR_BIT
+
+#define TARGET_SHORT_BIT 16
+#define TARGET_INT_BIT 16
+#define TARGET_LONG_BIT 32
+#define TARGET_PTR_BIT (BIG ? 32: 16)
+
+/* Define the bit, byte, and word ordering of the machine. */
+#define TARGET_BYTE_ORDER BIG_ENDIAN
+
+/* Offset from address of function to start of its code.
+ Zero on most machines. */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+ to reach some "real" code. */
+
+#define SKIP_PROLOGUE(ip) {(ip) = z8k_skip_prologue(ip);}
+extern CORE_ADDR mz8k_skip_prologue PARAMS ((CORE_ADDR ip));
+
+
+/* Immediately after a function call, return the saved pc.
+ Can't always go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call(frame)
+
+/* Stack grows downward. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0x36,0x00}
+
+/* If your kernel resets the pc after the trap happens you may need to
+ define this before including this file. */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are. */
+
+#define REGISTER_TYPE unsigned int
+
+#define NUM_REGS 23 /* 16 registers + 1 ccr + 1 pc + 3 debug
+ regs + fake fp + fake sp*/
+#define REGISTER_BYTES (NUM_REGS *4)
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+#define REGISTER_BYTE(N) ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+ for register N. On the z8k, all but the pc are 2 bytes, but we
+ keep them all as 4 bytes and trim them on I/O */
+
+
+#define REGISTER_RAW_SIZE(N) (((N) < 16)? 2:4)
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have. */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have. */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (REGISTER_VIRTUAL_SIZE(N) == 2? builtin_type_unsigned_int : builtin_type_long)
+
+/*#define INIT_FRAME_PC(x,y) init_frame_pc(x,y)*/
+/* Initializer for an array of names of registers.
+ Entries beyond the first NUM_REGS are ignored. */
+
+#define REGISTER_NAMES \
+ {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+ "ccr", "pc", "cycles","insts","time","fp","sp"}
+
+/* Register numbers of various important registers.
+ Note that some of these values are "real" register numbers,
+ and correspond to the general registers of the machine,
+ and some are "phony" register numbers which are too large
+ to be actual register numbers as far as the user is concerned
+ but do serve to get the desired values when passed to read_register. */
+
+#define CCR_REGNUM 16 /* Contains processor status */
+#define PC_REGNUM 17 /* Contains program counter */
+#define CYCLES_REGNUM 18
+#define INSTS_REGNUM 19
+#define TIME_REGNUM 20
+#define FP_REGNUM 21 /* Contains fp, whatever memory model */
+#define SP_REGNUM 22 /* Conatins sp, whatever memory model */
+
+
+
+#define PTR_SIZE (BIG ? 4: 2)
+#define PTR_MASK (BIG ? 0xff00ffff : 0x0000ffff)
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) abort();
+
+/* Extract from an array REGBUF containing the (raw) register state
+ a function return value of type TYPE, and copy that, in virtual format,
+ into VALBUF. This is assuming that floating point values are returned
+ as doubles in d0/d1. */
+
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+ memcpy(VALBUF, REGBUF + REGISTER_BYTE(2), TYPE_LENGTH(TYPE));
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) abort();
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+ chain-pointer.
+ In the case of the Z8000, the frame's nominal address
+ is the address of a ptr sized byte word containing the calling
+ frame's address. */
+
+#define FRAME_CHAIN(thisframe) frame_chain(thisframe);
+
+
+
+/* Define other aspects of the stack frame. */
+
+/* A macro that tells us whether the function invocation represented
+ by FI does not have a frame on the stack associated with it. If it
+ does not, FRAMELESS is set to 1, else 0. */
+#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
+ (FRAMELESS) = frameless_look_for_prologue(FI)
+
+#define FRAME_SAVED_PC(FRAME) frame_saved_pc(FRAME)
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+ Can set VAL to -1, meaning no way to tell. */
+
+/* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+#if !defined (FRAME_NUM_ARGS)
+#define FRAME_NUM_ARGS(val,fi) (val = -1)
+#endif
+
+/* Return number of bytes at start of arglist that are not really args. */
+
+#define FRAME_ARGS_SKIP 8
+
+#ifdef __STDC__
+struct frame_info;
+#endif
+extern void z8k_frame_init_saved_regs PARAMS ((struct frame_info *));
+#define FRAME_INIT_SAVED_REGS(fi) z8k_frame_init_saved_regs (fi)
+
+
+/* Things needed for making the inferior call functions.
+ It seems like every m68k based machine has almost identical definitions
+ in the individual machine's configuration files. Most other cpu types
+ (mips, i386, etc) have routines in their *-tdep.c files to handle this
+ for most configurations. The m68k family should be able to do this as
+ well. These macros can still be overridden when necessary. */
+
+/* The CALL_DUMMY macro is the sequence of instructions, as disassembled
+ by gdb itself:
+
+ fmovemx fp0-fp7,sp@- 0xf227 0xe0ff
+ moveml d0-a5,sp@- 0x48e7 0xfffc
+ clrw sp@- 0x4267
+ movew ccr,sp@- 0x42e7
+
+ /..* The arguments are pushed at this point by GDB;
+ no code is needed in the dummy for this.
+ The CALL_DUMMY_START_OFFSET gives the position of
+ the following jsr instruction. *../
+
+ jsr @#0x32323232 0x4eb9 0x3232 0x3232
+ addal #0x69696969,sp 0xdffc 0x6969 0x6969
+ trap #<your BPT_VECTOR number here> 0x4e4?
+ nop 0x4e71
+
+ Note this is CALL_DUMMY_LENGTH bytes (28 for the above example).
+ We actually start executing at the jsr, since the pushing of the
+ registers is done by PUSH_DUMMY_FRAME. If this were real code,
+ the arguments for the function called by the jsr would be pushed
+ between the moveml and the jsr, and we could allow it to execute through.
+ But the arguments have to be pushed by GDB after the PUSH_DUMMY_FRAME is
+ done, and we cannot allow the moveml to push the registers again lest
+ they be taken for the arguments. */
+
+
+#define CALL_DUMMY { 0 }
+#define CALL_DUMMY_LENGTH 24 /* Size of CALL_DUMMY */
+#define CALL_DUMMY_START_OFFSET 8 /* Offset to jsr instruction*/
+
+
+/* Insert the specified number of args and function address
+ into a call sequence of the above form stored at DUMMYNAME.
+ We use the BFD routines to store a big-endian value of known size. */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ bfd_putb32 (fun, (char *) dummyname + CALL_DUMMY_START_OFFSET + 2); \
+ bfd_putb32 (nargs*4, (char *) dummyname + CALL_DUMMY_START_OFFSET + 8); }
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME { z8k_push_dummy_frame (); }
+
+extern void z8k_push_dummy_frame PARAMS ((void));
+
+extern void z8k_pop_frame PARAMS ((void));
+
+/* Discard from the stack the innermost frame, restoring all registers. */
+
+#define POP_FRAME { z8k_pop_frame (); }
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+extern CORE_ADDR z8k_addr_bits_remove PARAMS ((CORE_ADDR));
+#define ADDR_BITS_REMOVE(addr) z8k_addr_bits_remove (addr)
+int sim_z8001_mode;
+#define BIG (sim_z8001_mode)
+
+#define read_memory_short(x) (read_memory_integer(x,2) & 0xffff)
+
+#define NO_STD_REGS
+
+#define PRINT_REGISTER_HOOK(regno) print_register_hook(regno)
+
+
+#define INIT_EXTRA_SYMTAB_INFO \
+ z8k_set_pointer_size(objfile->obfd->arch_info->bits_per_address);
+
+#define REGISTER_SIZE 4
+
diff --git a/gdb/config/z8k/z8k.mt b/gdb/config/z8k/z8k.mt
new file mode 100644
index 0000000..cb8d043
--- /dev/null
+++ b/gdb/config/z8k/z8k.mt
@@ -0,0 +1,7 @@
+# Target: Z8000 with simulator
+TDEPFILES= z8k-tdep.o
+TM_FILE= tm-z8k.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/z8k/libsim.a
+