diff options
| author | Mark Alexander <marka@cygnus> | 1997-06-17 02:11:42 +0000 |
|---|---|---|
| committer | Mark Alexander <marka@cygnus> | 1997-06-17 02:11:42 +0000 |
| commit | f781fe93a6bf9062af5770cb94af5c52b29c584b (patch) | |
| tree | bd7d46b71369d1e76667ffeb614bdc65f6584d8a /gdb/config/mips/tm-mips.h | |
| parent | 77f3ac77b541865ccd33567adb0c3c988cb60625 (diff) | |
| download | gdb-f781fe93a6bf9062af5770cb94af5c52b29c584b.zip gdb-f781fe93a6bf9062af5770cb94af5c52b29c584b.tar.gz gdb-f781fe93a6bf9062af5770cb94af5c52b29c584b.tar.bz2 | |
* infrun.c (wait_for_inferior): Mark registers as invalid when
stepping over an instruction that triggered a watchpoint.
* remote-mips.c: Numerous changes to support hardware breakpoints
and watchpoints on LSI MiniRISC and TinyRISC boards.
* mips-tdep.c: Move MIPS16-related macros to config/mips/tm-mips.h.
(mips_breakpoint_from_pc): Account for different breakpoint
instructions used by PMON and IDT monitor.
* config/mips/tm-embed.h: Enable hardware breakpoints on embedded
MIPS targets.
* config/mips/tm-mips.h: Define breakpoint instructions for
PMON and IDT monitor. Move MIPS16-related macros here from
mips-tdep.c.
Diffstat (limited to 'gdb/config/mips/tm-mips.h')
| -rw-r--r-- | gdb/config/mips/tm-mips.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h index e052810..70bf2e4 100644 --- a/gdb/config/mips/tm-mips.h +++ b/gdb/config/mips/tm-mips.h @@ -115,10 +115,16 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *)); #define BIG_ENDIAN 4321 -/* Old-style breakpoint macros. */ +/* Old-style breakpoint macros. + The IDT board uses an unusual breakpoint value, and sometimes gets + confused when it sees the usual MIPS breakpoint instruction. */ #define BIG_BREAKPOINT {0, 0x5, 0, 0xd} #define LITTLE_BREAKPOINT {0xd, 0, 0x5, 0} +#define PMON_BIG_BREAKPOINT {0, 0, 0, 0xd} +#define PMON_LITTLE_BREAKPOINT {0xd, 0, 0, 0} +#define IDT_BIG_BREAKPOINT {0, 0, 0x0a, 0xd} +#define IDT_LITTLE_BREAKPOINT {0xd, 0x0a, 0, 0} #define MIPS16_BIG_BREAKPOINT {0xe8, 0xa5} #define MIPS16_LITTLE_BREAKPOINT {0xa5, 0xe8} @@ -519,4 +525,16 @@ extern int mips_ignore_helper PARAMS ((CORE_ADDR pc)); #define TARGET_MIPS #endif +/* Definitions and declarations used by mips-tdep.c and remote-mips.c */ +#define MIPS_INSTLEN 4 /* Length of an instruction */ +#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16*/ +#define MIPS_NUMREGS 32 /* Number of integer or float registers */ +typedef unsigned long t_inst; /* Integer big enough to hold an instruction */ + +/* MIPS16 function addresses are odd (bit 0 is set). Here are some + macros to test, set, or clear bit 0 of addresses. */ +#define IS_MIPS16_ADDR(addr) ((addr) & 1) +#define MAKE_MIPS16_ADDR(addr) ((addr) | 1) +#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1) + #endif /* TM_MIPS_H */ |