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| author | Luis Machado <luis.machado@arm.com> | 2023-04-04 17:20:46 +0100 |
|---|---|---|
| committer | Luis Machado <luis.machado@arm.com> | 2023-10-04 16:23:40 +0100 |
| commit | 42019af621005a274d1a658f4c752a98fe5bab8e (patch) | |
| tree | e1ffbb608ef942726edb6a813fde7c2b5f4ac384 /gdb/arch/aarch64.c | |
| parent | 6762e153a9e4e450b1a9904f9c96ec9f9b4cbc31 (diff) | |
| download | gdb-42019af621005a274d1a658f4c752a98fe5bab8e.zip gdb-42019af621005a274d1a658f4c752a98fe5bab8e.tar.gz gdb-42019af621005a274d1a658f4c752a98fe5bab8e.tar.bz2 | |
sme2: Enable SME2 for AArch64 gdb on Linux
SME2 defines a new 512-bit register named ZT0, and it is only available
if SME is also supported. The ZT0 state is valid only if the SVCR ZA bit
is enabled. Otherwise its contents are empty (0).
The target description is dynamic and gets generated at runtime based on the
availability of the feature.
Validated under Fast Models.
Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Diffstat (limited to 'gdb/arch/aarch64.c')
| -rw-r--r-- | gdb/arch/aarch64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gdb/arch/aarch64.c b/gdb/arch/aarch64.c index e1f4948..c93d602 100644 --- a/gdb/arch/aarch64.c +++ b/gdb/arch/aarch64.c @@ -25,6 +25,7 @@ #include "../features/aarch64-pauth.c" #include "../features/aarch64-mte.c" #include "../features/aarch64-sme.c" +#include "../features/aarch64-sme2.c" #include "../features/aarch64-tls.c" /* See arch/aarch64.h. */ @@ -62,6 +63,9 @@ aarch64_create_target_description (const aarch64_features &features) regnum = create_feature_aarch64_sme (tdesc.get (), regnum, sve_vl_from_vq (features.svq)); + if (features.sme2) + regnum = create_feature_aarch64_sme2 (tdesc.get (), regnum); + return tdesc.release (); } |