arc: Add hardware loop detection

For ARC there are registers that are not part of a required set in XML
target descriptions by default, but are almost always present on ARC
targets and are universally exposed by the ptrace interface.  Hardware
loop registers being one of them.

LP_START and LP_END auxiliary registers are hardware loop start and end.
Formally, they are optional, but it is hard to find an ARC configuration
that doesn't have them.  They are always present in processors that can
run GNU/Linux.  GDB needs to know about those registers to implement
proper software single stepping, since they affect  what instruction
will be next.

This commit adds the code to check for the existance of "lp_start" and
"lp_end" in XML target descriptions. If they exist, then the function
reports that the target supports hardware loops.

gdb/ChangeLog:

	* arc-tdep.c (arc_check_for_hardware_loop): New.
	* arc-tdep.h (gdbarch_tdep): New field has_hw_loops.

gdb/doc/ChangeLog:

	* gdb.texinfo (Synopsys ARC): Document LP_START, LP_END and BTA.

1 files changed, 3 insertions, 0 deletions

diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h
index 5968abd..e752348 100644
--- a/gdb/arc-tdep.h
+++ b/gdb/arc-tdep.h
@@ -111,6 +111,9 @@ struct gdbarch_tdep
   /* Offset to PC value in jump buffer.  If this is negative, longjmp
      support will be disabled.  */
   int jb_pc;
+
+  /* Whether target has hardware (aka zero-delay) loops.  */
+  bool has_hw_loops;
 };
 
 /* Utility functions used by other ARC-specific modules.  */