diff options
| author | Anton Kolesov <Anton.Kolesov@synopsys.com> | 2017-02-10 14:11:46 +0300 |
|---|---|---|
| committer | Anton Kolesov <Anton.Kolesov@synopsys.com> | 2017-03-28 21:01:44 +0300 |
| commit | 296ec4fa2afb14abc400fa0109d7288eb958c544 (patch) | |
| tree | ce9fc3e1ff489b27ee5293448ce89a1cf2231aa1 /gdb/arc-tdep.h | |
| parent | 081c108e3688d67f257d4b98c9012ef2677b3b18 (diff) | |
| download | gdb-296ec4fa2afb14abc400fa0109d7288eb958c544.zip gdb-296ec4fa2afb14abc400fa0109d7288eb958c544.tar.gz gdb-296ec4fa2afb14abc400fa0109d7288eb958c544.tar.bz2 | |
arc: Align internal regnums with architectural regnums
Add ARC_LIMM_REGNUM to arc_regnum enumeration and assign a number 62 to it.
This ensures that for core registers internal register numbers in this enum are
the same as architectural numbers. This allows to use internal register
numbers in the contexts where architectural number is implied, for example when
disassembling instruction during prologue analysis.
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* arc-tdep.c (core_v2_register_names, core_arcompact_register_names)
Add "limm" and "reserved".
(arc_cannot_fetch_register, arc_cannot_store_register): Add
ARC_RESERVED_REGNUM and ARC_LIMM_REGNUM.
* arc-tdep.h (arc_regnum): Likewise.
Diffstat (limited to 'gdb/arc-tdep.h')
| -rw-r--r-- | gdb/arc-tdep.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h index 422db46..326f486 100644 --- a/gdb/arc-tdep.h +++ b/gdb/arc-tdep.h @@ -24,6 +24,12 @@ /* Need disassemble_info. */ #include "dis-asm.h" +/* To simplify GDB code this enum assumes that internal regnums should be same + as architectural register numbers, i.e. PCL regnum is 63. This allows to + use internal GDB regnums as architectural numbers when dealing with + instruction encodings, for example when analyzing what are the registers + saved in function prologue. */ + enum arc_regnum { /* Core registers. */ @@ -49,6 +55,16 @@ enum arc_regnum ARC_BLINK_REGNUM, /* Zero-delay loop counter. */ ARC_LP_COUNT_REGNUM = 60, + /* Reserved register number. There should never be a register with such + number, this name is needed only for a sanity check in + arc_cannot_(fetch|store)_register. */ + ARC_RESERVED_REGNUM, + /* Long-immediate value. This is not a physical register - if instruction + has register 62 as an operand, then this operand is a literal value + stored in the instruction memory right after the instruction itself. + This value is required in this enumeration as an architectural number + for instruction analysis. */ + ARC_LIMM_REGNUM, /* Program counter, aligned to 4-bytes, read-only. */ ARC_PCL_REGNUM, ARC_LAST_CORE_REGNUM = ARC_PCL_REGNUM, |