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| author | Tom Tromey <tom@tromey.com> | 2023-10-18 20:44:11 -0600 |
|---|---|---|
| committer | Tom Tromey <tom@tromey.com> | 2023-11-29 14:29:44 -0700 |
| commit | 69f6730df3d18216126283864246eaf538bdf91d (patch) | |
| tree | e17002e214e8d6d2ea423575e29b56f90005b778 /gdb/aarch64-linux-nat.c | |
| parent | d02f31bb130fd54fa2891cbc28fbc01f603eca6c (diff) | |
| download | gdb-69f6730df3d18216126283864246eaf538bdf91d.zip gdb-69f6730df3d18216126283864246eaf538bdf91d.tar.gz gdb-69f6730df3d18216126283864246eaf538bdf91d.tar.bz2 | |
Remove gdb_static_assert
C++17 makes the second parameter to static_assert optional, so we can
remove gdb_static_assert now.
Diffstat (limited to 'gdb/aarch64-linux-nat.c')
| -rw-r--r-- | gdb/aarch64-linux-nat.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 0e87aaa..5b4e3c2 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -137,7 +137,7 @@ fetch_gregs_from_thread (struct regcache *regcache) /* Make sure REGS can hold all registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof (regs) >= 18 * 4); + static_assert (sizeof (regs) >= 18 * 4); tid = regcache->ptid ().lwp (); @@ -175,7 +175,7 @@ store_gregs_to_thread (const struct regcache *regcache) /* Make sure REGS can hold all registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof (regs) >= 18 * 4); + static_assert (sizeof (regs) >= 18 * 4); tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; @@ -217,7 +217,7 @@ fetch_fpregs_from_thread (struct regcache *regcache) /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); + static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); tid = regcache->ptid ().lwp (); @@ -264,7 +264,7 @@ store_fpregs_to_thread (const struct regcache *regcache) /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); + static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; |