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author | Jan Beulich <jbeulich@suse.com> | 2021-07-22 13:02:08 +0200 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2021-07-22 13:02:08 +0200 |
commit | be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8 (patch) | |
tree | e1c5643331999a38a19673f39b70b19d505df876 /gas/testsuite | |
parent | d0579d4d1c724b524da43ad164ce140218497ead (diff) | |
download | gdb-be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8.zip gdb-be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8.tar.gz gdb-be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8.tar.bz2 |
x86: correct VCVT{,U}SI2SD rounding mode handling
With EVEX.W clear the instruction doesn't ignore the rounding mode, but
(like for other insns without rounding semantics) EVEX.b set causes #UD.
Hence the handling of EVEX.W needs to be done when processing
evex_rounding_64_mode, not at the decode stages.
Derive a new 64-bit testcase from the 32-bit one to cover the different
EVEX.W treatment in both cases.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/i386/evex.d | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/evex.s | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-evex.d | 20 |
4 files changed, 28 insertions, 1 deletions
diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d index 2fbe295..b02bca3 100644 --- a/gas/testsuite/gas/i386/evex.d +++ b/gas/testsuite/gas/i386/evex.d @@ -1,5 +1,5 @@ #objdump: -dw -Msuffix -#name: i386 EVX insns +#name: i386 EVEX insns .*: +file format .* @@ -8,9 +8,12 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6 #pass diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s index a64cc57..90c635a 100644 --- a/gas/testsuite/gas/i386/evex.s +++ b/gas/testsuite/gas/i386/evex.s @@ -4,8 +4,11 @@ .text _start: .byte 0x62, 0xf1, 0xd6, 0x38, 0x2a, 0xf0 + .byte 0x62, 0xf1, 0x57, 0x38, 0x2a, 0xf0 .byte 0x62, 0xf1, 0xd7, 0x38, 0x2a, 0xf0 .byte 0x62, 0xf1, 0xd6, 0x08, 0x7b, 0xf0 + .byte 0x62, 0xf1, 0x57, 0x08, 0x7b, 0xf0 .byte 0x62, 0xf1, 0xd7, 0x08, 0x7b, 0xf0 .byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0 + .byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0 .byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 1e0a363..6f9543e 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -929,6 +929,7 @@ if [gas_64_check] then { run_dump_test "x86-64-avx512er-intel" run_dump_test "x86-64-avx512pf" run_dump_test "x86-64-avx512pf-intel" + run_dump_test "x86-64-evex" run_dump_test "x86-64-evex-lig256" run_dump_test "x86-64-evex-lig512" run_dump_test "x86-64-evex-lig256-intel" diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d new file mode 100644 index 0000000..b360aa7 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-evex.d @@ -0,0 +1,20 @@ +#objdump: -dw +#name: x86-64 EVEX insns +#source: evex.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: + +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\(bad\),%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\(bad\),%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6 +#pass |