diff options
author | Hu, Lin1 <lin1.hu@intel.com> | 2025-01-14 10:30:36 +0800 |
---|---|---|
committer | Haochen Jiang <haochen.jiang@intel.com> | 2025-01-14 10:30:36 +0800 |
commit | b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1 (patch) | |
tree | a53b0cd91d3e61c0e87e35c90f84e8f0fdc9b098 /gas/testsuite | |
parent | 9421775ba4c7ec94d64a366a96f059e0195a105c (diff) | |
download | gdb-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.zip gdb-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.tar.gz gdb-b41ab42df1ed8cfda4f3dd83f001dd693ede7ec1.tar.bz2 |
Support Intel MOVRS
This patch focus on supporting MOVRS ISA. We could take this full ISA
as four part: PREFETCHRST2, MOVRS, MOVRS APX_F extension and MOVRS AVX10.2
extension.
The APX_F extension for MOVRS will be:
- EVEX.LLZ.NP.MAP4.WIG 8A !(11):rrr:bbb for r8/m8 with NF=0 and
ND=0
- EVEX.LLZ.NP/66.MAP4.SCALABLE 8B !(11):rrr:bbb for rv/mv with NF=0
and ND=0
We did not merge the table together for APX_F since there is an explicit
x64 for movrs insn. The current APX_F() did not support the combination
between CPUIDs. Also, the space is different for legacy and apx_f forms.
gas/ChangeLog:
* NEWS: Support Intel MOVRS.
* config/tc-i386.c: Add MOVRS.
* doc/c-i386.texi: Document .movrs.
* testsuite/gas/i386/i386.exp: Run MOVRS tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d: Add MOVRS
tests.
* testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted.d: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted.s: Ditto.
* testsuite/gas/i386/lfence-load.d: Add prefetchrst2.
* testsuite/gas/i386/lfence-load.s: Ditto.
* testsuite/gas/i386/nops-8.d: Ditto.
* testsuite/gas/i386/prefetch-intel.d: Ditto.
* testsuite/gas/i386/prefetch.d: Ditto.
* testsuite/gas/i386/x86-64-lfence-load.d: Ditto.
* testsuite/gas/i386/x86-64-lfence-load.s: Ditto.
* testsuite/gas/i386/x86-64-prefetch-intel.d: Ditto.
* testsuite/gas/i386/x86-64-prefetch.d: Ditto.
* testsuite/gas/i386/movrs-intel.d: New test.
* testsuite/gas/i386/movrs-inval.l: Ditto.
* testsuite/gas/i386/movrs-inval.s: Ditto.
* testsuite/gas/i386/movrs.d: Ditto.
* testsuite/gas/i386/movrs.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-256.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-avx10_2-512.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-movrs.d: Ditto.
* testsuite/gas/i386/x86-64-movrs.s: Ditto.
* testsuite/gas/i386/x86-64-movrs-intel-suffix.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-suffix.d: Ditto.
* testsuite/gas/i386/x86-64-movrs-suffix.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_MAP5_6F_X86_64.
* i386-dis-evex-x86.h: Add X86_64_EVEX_MAP5_6F.
* i386-dis-evex.h (evex_table): New entry for movrs.
* i386-dis.c (MOD_0F18_REG_4): New.
(PREFIX_EVEX_MAP5_6F_X86_64): Ditto.
(X86_64_0F388A): Ditto.
(X86_64_0F388B): Ditto.
(X86_64_EVEX_MAP5_6F): Ditto.
(three_byte_table): New entry for MOVRS.
(reg_table): Ditto.
(mod_table): Ditto.
(x86_64_table): Ditto. Also include i386-dis-evex-x86.h.
* i386-gen.c (cpu_flags): Add MOVRS.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (i386_cpu_flags): Add cpumovrs.
* i386-opc.tbl: Add MOVRS instrctions.
* i386-tbl.h: Regenerated.
Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
Co-authored-by: Lili Cui <lili.cui@intel.com>
Diffstat (limited to 'gas/testsuite')
32 files changed, 453 insertions, 8 deletions
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index fed9283..e6e10f0 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -542,6 +542,9 @@ if [gas_32_check] then { run_dump_test "avx10_2-512-sm4" run_dump_test "avx10_2-512-sm4-intel" run_list_test "avx10_2-sm4-inval" + run_dump_test "movrs" + run_dump_test "movrs-intel" + run_list_test "movrs-inval" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/lfence-load.d b/gas/testsuite/gas/i386/lfence-load.d index a315be7..4bed600 100644 --- a/gas/testsuite/gas/i386/lfence-load.d +++ b/gas/testsuite/gas/i386/lfence-load.d @@ -33,6 +33,7 @@ Disassembly of section .text: +[a-f0-9]+: 0f 18 55 00 prefetcht1 0x0\(%ebp\) +[a-f0-9]+: 0f 18 5d 00 prefetcht2 0x0\(%ebp\) +[a-f0-9]+: 0f 0d 4d 00 prefetchw 0x0\(%ebp\) + +[a-f0-9]+: 0f 18 65 00 prefetchrst2 0x0\(%ebp\) +[a-f0-9]+: 1f pop %ds +[a-f0-9]+: 0f ae e8 lfence +[a-f0-9]+: 9d popf diff --git a/gas/testsuite/gas/i386/lfence-load.s b/gas/testsuite/gas/i386/lfence-load.s index 4b4aa16..157ee28 100644 --- a/gas/testsuite/gas/i386/lfence-load.s +++ b/gas/testsuite/gas/i386/lfence-load.s @@ -20,6 +20,7 @@ _start: prefetcht1 (%ebp) prefetcht2 (%ebp) prefetchw (%ebp) + prefetchrst2 (%ebp) pop %ds popf popa diff --git a/gas/testsuite/gas/i386/movrs-intel.d b/gas/testsuite/gas/i386/movrs-intel.d new file mode 100644 index 0000000..ae7f750 --- /dev/null +++ b/gas/testsuite/gas/i386/movrs-intel.d @@ -0,0 +1,15 @@ +#objdump: -dw -Mintel +#name: i386 MOVRS insns (Intel disassembly) +#source: movrs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*0f 18 a4 f4 00 00 00 10\s+prefetchrst2 BYTE PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*0f 18 21\s+prefetchrst2 BYTE PTR \[ecx\] +\s*[a-f0-9]+:\s*0f 18 61 7f\s+prefetchrst2 BYTE PTR \[ecx\+0x7f\] +\s*[a-f0-9]+:\s*0f 18 62 80\s+prefetchrst2 BYTE PTR \[edx-0x80\] +#pass diff --git a/gas/testsuite/gas/i386/movrs-inval.l b/gas/testsuite/gas/i386/movrs-inval.l new file mode 100644 index 0000000..43af5a1 --- /dev/null +++ b/gas/testsuite/gas/i386/movrs-inval.l @@ -0,0 +1,9 @@ +.* Assembler messages: +.*:5: Error: `movrs' is only supported in 64-bit mode +.*:6: Error: `movrs' is only supported in 64-bit mode +.*:7: Error: `movrs' is only supported in 64-bit mode +.*:8: Error: `movrs' is only supported in 64-bit mode +.*:9: Error: `vmovrsb' is only supported in 64-bit mode +.*:10: Error: `vmovrsd' is only supported in 64-bit mode +.*:11: Error: `vmovrsq' is only supported in 64-bit mode +.*:12: Error: `vmovrsw' is only supported in 64-bit mode diff --git a/gas/testsuite/gas/i386/movrs-inval.s b/gas/testsuite/gas/i386/movrs-inval.s new file mode 100644 index 0000000..9236bf3 --- /dev/null +++ b/gas/testsuite/gas/i386/movrs-inval.s @@ -0,0 +1,12 @@ +# Check Illegal 32bit MOVRS instructions + + .text +_start: + movrs 0x10000000(%esp, %esi, 8), %dx + movrs 0x10000000(%esp, %esi, 8), %edx + movrs 0x10000000(%esp, %esi, 8), %r12 + movrs 0x10000000(%esp, %esi, 8), %bl + vmovrsb 0x10000000(%esp, %esi, 8), %zmm6{%k7} + vmovrsd 0x10000000(%esp, %esi, 8), %zmm6{%k7} + vmovrsq 0x10000000(%esp, %esi, 8), %zmm6{%k7} + vmovrsw 0x10000000(%esp, %esi, 8), %zmm6{%k7} diff --git a/gas/testsuite/gas/i386/movrs.d b/gas/testsuite/gas/i386/movrs.d new file mode 100644 index 0000000..5b2bb45 --- /dev/null +++ b/gas/testsuite/gas/i386/movrs.d @@ -0,0 +1,13 @@ +#objdump: -dw +#name: i386 MOVRS insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 18 a4 f4 00 00 00 10\s+prefetchrst2 0x10000000\(%esp,%esi,8\) +\s*[a-f0-9]+:\s*0f 18 21\s+prefetchrst2 \(%ecx\) +\s*[a-f0-9]+:\s*0f 18 61 7f\s+prefetchrst2 0x7f\(%ecx\) +\s*[a-f0-9]+:\s*0f 18 62 80\s+prefetchrst2 -0x80\(%edx\) +#pass diff --git a/gas/testsuite/gas/i386/movrs.s b/gas/testsuite/gas/i386/movrs.s new file mode 100644 index 0000000..e959283 --- /dev/null +++ b/gas/testsuite/gas/i386/movrs.s @@ -0,0 +1,15 @@ +# Check 32bit MOVRS instructions + + .text +_start: + prefetchrst2 0x10000000(%esp, %esi, 8) + prefetchrst2 (%ecx) + prefetchrst2 127(%ecx) + prefetchrst2 -128(%edx) + +_intel: + .intel_syntax noprefix + prefetchrst2 BYTE PTR [esp+esi*8+0x10000000] + prefetchrst2 BYTE PTR [ecx] + prefetchrst2 BYTE PTR [ecx+127] + prefetchrst2 BYTE PTR [edx-128] diff --git a/gas/testsuite/gas/i386/nops-8.d b/gas/testsuite/gas/i386/nops-8.d index 2d99ac7..d0be54d 100644 --- a/gas/testsuite/gas/i386/nops-8.d +++ b/gas/testsuite/gas/i386/nops-8.d @@ -74,7 +74,7 @@ Disassembly of section .text: +[a-f0-9]+: 0f 18 08 prefetcht0 \(%eax\) +[a-f0-9]+: 0f 18 10 prefetcht1 \(%eax\) +[a-f0-9]+: 0f 18 18 prefetcht2 \(%eax\) - +[a-f0-9]+: 0f 18 20 nopl \(%eax\) + +[a-f0-9]+: 0f 18 20 prefetchrst2 \(%eax\) +[a-f0-9]+: 0f 18 28 nopl \(%eax\) +[a-f0-9]+: 0f 18 30 nopl \(%eax\) +[a-f0-9]+: 0f 18 38 nopl \(%eax\) @@ -146,7 +146,7 @@ Disassembly of section .text: +[a-f0-9]+: 66 0f 18 08 data16 prefetcht0 \(%eax\) +[a-f0-9]+: 66 0f 18 10 data16 prefetcht1 \(%eax\) +[a-f0-9]+: 66 0f 18 18 data16 prefetcht2 \(%eax\) - +[a-f0-9]+: 66 0f 18 20 nopw \(%eax\) + +[a-f0-9]+: 66 0f 18 20 data16 prefetchrst2 \(%eax\) +[a-f0-9]+: 66 0f 18 28 nopw \(%eax\) +[a-f0-9]+: 66 0f 18 30 nopw \(%eax\) +[a-f0-9]+: 66 0f 18 38 nopw \(%eax\) @@ -218,7 +218,7 @@ Disassembly of section .text: +[a-f0-9]+: f3 0f 18 08 repz prefetcht0 \(%eax\) +[a-f0-9]+: f3 0f 18 10 repz prefetcht1 \(%eax\) +[a-f0-9]+: f3 0f 18 18 repz prefetcht2 \(%eax\) - +[a-f0-9]+: f3 0f 18 20 repz nopl \(%eax\) + +[a-f0-9]+: f3 0f 18 20 repz prefetchrst2 \(%eax\) +[a-f0-9]+: f3 0f 18 28 repz nopl \(%eax\) +[a-f0-9]+: f3 0f 18 30 repz nopl \(%eax\) +[a-f0-9]+: f3 0f 18 38 repz nopl \(%eax\) @@ -290,7 +290,7 @@ Disassembly of section .text: +[a-f0-9]+: f2 0f 18 08 repnz prefetcht0 \(%eax\) +[a-f0-9]+: f2 0f 18 10 repnz prefetcht1 \(%eax\) +[a-f0-9]+: f2 0f 18 18 repnz prefetcht2 \(%eax\) - +[a-f0-9]+: f2 0f 18 20 repnz nopl \(%eax\) + +[a-f0-9]+: f2 0f 18 20 repnz prefetchrst2 \(%eax\) +[a-f0-9]+: f2 0f 18 28 repnz nopl \(%eax\) +[a-f0-9]+: f2 0f 18 30 repnz nopl \(%eax\) +[a-f0-9]+: f2 0f 18 38 repnz nopl \(%eax\) diff --git a/gas/testsuite/gas/i386/prefetch-intel.d b/gas/testsuite/gas/i386/prefetch-intel.d index ca0fd91..1a6fad1 100644 --- a/gas/testsuite/gas/i386/prefetch-intel.d +++ b/gas/testsuite/gas/i386/prefetch-intel.d @@ -22,7 +22,7 @@ Disassembly of section .text: \s*[a-f0-9]+: 0f 18 08 prefetcht0 BYTE PTR \[eax\] \s*[a-f0-9]+: 0f 18 10 prefetcht1 BYTE PTR \[eax\] \s*[a-f0-9]+: 0f 18 18 prefetcht2 BYTE PTR \[eax\] -\s*[a-f0-9]+: 0f 18 20 nop DWORD PTR \[eax\] +\s*[a-f0-9]+: 0f 18 20 prefetchrst2 BYTE PTR \[eax\] \s*[a-f0-9]+: 0f 18 28 nop DWORD PTR \[eax\] \s*[a-f0-9]+: 0f 18 30 nop DWORD PTR \[eax\] \s*[a-f0-9]+: 0f 18 38 nop DWORD PTR \[eax\] diff --git a/gas/testsuite/gas/i386/prefetch.d b/gas/testsuite/gas/i386/prefetch.d index 2850778..f46c141 100644 --- a/gas/testsuite/gas/i386/prefetch.d +++ b/gas/testsuite/gas/i386/prefetch.d @@ -21,7 +21,7 @@ Disassembly of section .text: \s*[a-f0-9]+: 0f 18 08 prefetcht0 \(%eax\) \s*[a-f0-9]+: 0f 18 10 prefetcht1 \(%eax\) \s*[a-f0-9]+: 0f 18 18 prefetcht2 \(%eax\) -\s*[a-f0-9]+: 0f 18 20 nopl \(%eax\) +\s*[a-f0-9]+: 0f 18 20 prefetchrst2 \(%eax\) \s*[a-f0-9]+: 0f 18 28 nopl \(%eax\) \s*[a-f0-9]+: 0f 18 30 nopl \(%eax\) \s*[a-f0-9]+: 0f 18 38 nopl \(%eax\) diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d index d45167e..a782cd3 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d @@ -118,6 +118,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+r31,\[r31\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+r16b,BYTE PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+r18w,WORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+r10d,edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+r11,r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] @@ -253,6 +257,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+r31,\[r31\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+r16b,BYTE PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+r18w,WORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+r10d,edx,r25d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+r11,r15,r31 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d index fa6d66b..ac98dfc 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d @@ -118,6 +118,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c .d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r16b +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx @@ -253,6 +257,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c .d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r16b +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d index ba684c1..6aad9b3 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d @@ -118,6 +118,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r16b +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx @@ -253,6 +257,10 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) [ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 8a 84 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r16b +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 8b 94 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 8b 8c 87 23 01 00 00[ ]+movrs[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 8b bc 80 23 01 00 00[ ]+movrs[ ]+0x123\(%r16,%rax,4\),%r31 [ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d [ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s index 3fc9832..83bc940 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s @@ -112,6 +112,10 @@ _start: movdir64b 0x123(%r31,%rax,4),%r31 movdiri %r25d,0x123(%r31,%rax,4) movdiri %r31,0x123(%r31,%rax,4) + movrs 0x123(%r31,%rax,4),%r16b + movrs 0x123(%r16,%rax,4),%r18w + movrs 0x123(%r31,%rax,4),%r25d + movrs 0x123(%r16,%rax,4),%r31 pdep %r25d,%edx,%r10d pdep %r31,%r15,%r11 pdep 0x123(%r31,%rax,4),%r25d,%edx @@ -249,6 +253,10 @@ _start: movdir64b r31,[r31+rax*4+0x123] movdiri DWORD PTR [r31+rax*4+0x123],r25d movdiri QWORD PTR [r31+rax*4+0x123],r31 + movrs r16b,BYTE PTR [r31+rax*4+0x123] + movrs r18w,WORD PTR [r16+rax*4+0x123] + movrs r25d,DWORD PTR [r31+rax*4+0x123] + movrs r31,QWORD PTR [r16+rax*4+0x123] pdep r10d,edx,r25d pdep r11,r15,r31 pdep edx,r25d,DWORD PTR [r31+rax*4+0x123] diff --git a/gas/testsuite/gas/i386/x86-64-lfence-load.d b/gas/testsuite/gas/i386/x86-64-lfence-load.d index dcfa810..c86155e 100644 --- a/gas/testsuite/gas/i386/x86-64-lfence-load.d +++ b/gas/testsuite/gas/i386/x86-64-lfence-load.d @@ -35,6 +35,7 @@ Disassembly of section .text: +[a-f0-9]+: 0f 0d 4d 00 prefetchw 0x0\(%rbp\) +[a-f0-9]+: 0f 18 3d 78 56 34 12 prefetchit0 0x12345678\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+> +[a-f0-9]+: 0f 18 35 78 56 34 12 prefetchit1 0x12345678\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+> + +[a-f0-9]+: 0f 18 65 00 prefetchrst2 0x0\(%rbp\) +[a-f0-9]+: 0f a1 pop %fs +[a-f0-9]+: 0f ae e8 lfence +[a-f0-9]+: 9d popf diff --git a/gas/testsuite/gas/i386/x86-64-lfence-load.s b/gas/testsuite/gas/i386/x86-64-lfence-load.s index 05c07ad..e30b9a4 100644 --- a/gas/testsuite/gas/i386/x86-64-lfence-load.s +++ b/gas/testsuite/gas/i386/x86-64-lfence-load.s @@ -22,6 +22,7 @@ _start: prefetchw (%rbp) prefetchit0 0x12345678(%rip) prefetchit1 0x12345678(%rip) + prefetchrst2 (%rbp) pop %fs popf xlatb (%rbx) diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d new file mode 100644 index 0000000..fbbc85f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d @@ -0,0 +1,27 @@ +#objdump: -dw -Mintel +#name: x86_64 MOVRS, AVX10.2/256 insns (Intel disassembly) +#source: x86-64-movrs-avx10_2-256.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 25 7f 0f 6f b4 f5 00 00 00 10\s+vmovrsb xmm30\{k7\},XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7f 08 6f 31\s+vmovrsb xmm30,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7f 08 6f 71 7f\s+vmovrsb xmm30,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 65 7f 8f 6f 72 80\s+vmovrsb xmm30\{k7\}\{z\},XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 25 7e 0f 6f b4 f5 00 00 00 10\s+vmovrsd xmm30\{k7\},XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7e 08 6f 31\s+vmovrsd xmm30,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7e 08 6f 71 7f\s+vmovrsd xmm30,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 65 7e 8f 6f 72 80\s+vmovrsd xmm30\{k7\}\{z\},XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 25 fe 0f 6f b4 f5 00 00 00 10\s+vmovrsq xmm30\{k7\},XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 fe 08 6f 31\s+vmovrsq xmm30,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 fe 08 6f 71 7f\s+vmovrsq xmm30,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 65 fe 8f 6f 72 80\s+vmovrsq xmm30\{k7\}\{z\},XMMWORD PTR \[rdx-0x800\] +\s*[a-f0-9]+:\s*62 25 ff 0f 6f b4 f5 00 00 00 10\s+vmovrsw xmm30\{k7\},XMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 ff 08 6f 31\s+vmovrsw xmm30,XMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 ff 08 6f 71 7f\s+vmovrsw xmm30,XMMWORD PTR \[rcx\+0x7f0\] +\s*[a-f0-9]+:\s*62 65 ff 8f 6f 72 80\s+vmovrsw xmm30\{k7\}\{z\},XMMWORD PTR \[rdx-0x800\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.d b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.d new file mode 100644 index 0000000..68b38be --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.d @@ -0,0 +1,25 @@ +#objdump: -dw +#name: x86_64 MOVRS, AVX10.2/256 insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 25 7f 0f 6f b4 f5 00 00 00 10\s+vmovrsb 0x10000000\(%rbp,%r14,8\),%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 7f 08 6f 31\s+vmovrsb \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7f 08 6f 71 7f\s+vmovrsb 0x7f0\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7f 8f 6f 72 80\s+vmovrsb -0x800\(%rdx\),%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 7e 0f 6f b4 f5 00 00 00 10\s+vmovrsd 0x10000000\(%rbp,%r14,8\),%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 7e 08 6f 31\s+vmovrsd \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 08 6f 71 7f\s+vmovrsd 0x7f0\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 8f 6f 72 80\s+vmovrsd -0x800\(%rdx\),%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 fe 0f 6f b4 f5 00 00 00 10\s+vmovrsq 0x10000000\(%rbp,%r14,8\),%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 fe 08 6f 31\s+vmovrsq \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 fe 08 6f 71 7f\s+vmovrsq 0x7f0\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 fe 8f 6f 72 80\s+vmovrsq -0x800\(%rdx\),%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 ff 0f 6f b4 f5 00 00 00 10\s+vmovrsw 0x10000000\(%rbp,%r14,8\),%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 ff 08 6f 31\s+vmovrsw \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 ff 08 6f 71 7f\s+vmovrsw 0x7f0\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 ff 8f 6f 72 80\s+vmovrsw -0x800\(%rdx\),%xmm30\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.s b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.s new file mode 100644 index 0000000..c699d8e --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-256.s @@ -0,0 +1,41 @@ +# Check 64bit MOVRS, AVX10.2/256 instructions + + .arch generic64 + .arch .avx10.2/256 + .arch .movrs +_start: + vmovrsb 0x10000000(%rbp, %r14, 8), %xmm30{%k7} + vmovrsb (%r9), %xmm30 + vmovrsb 2032(%rcx), %xmm30 + vmovrsb -2048(%rdx), %xmm30{%k7}{z} + vmovrsd 0x10000000(%rbp, %r14, 8), %xmm30{%k7} + vmovrsd (%r9), %xmm30 + vmovrsd 2032(%rcx), %xmm30 + vmovrsd -2048(%rdx), %xmm30{%k7}{z} + vmovrsq 0x10000000(%rbp, %r14, 8), %xmm30{%k7} + vmovrsq (%r9), %xmm30 + vmovrsq 2032(%rcx), %xmm30 + vmovrsq -2048(%rdx), %xmm30{%k7}{z} + vmovrsw 0x10000000(%rbp, %r14, 8), %xmm30{%k7} + vmovrsw (%r9), %xmm30 + vmovrsw 2032(%rcx), %xmm30 + vmovrsw -2048(%rdx), %xmm30{%k7}{z} + +_intel: + .intel_syntax noprefix + vmovrsb xmm30{k7}, XMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsb xmm30, XMMWORD PTR [r9] + vmovrsb xmm30, XMMWORD PTR [rcx+2032] + vmovrsb xmm30{k7}{z}, XMMWORD PTR [rdx-2048] + vmovrsd xmm30{k7}, XMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsd xmm30, XMMWORD PTR [r9] + vmovrsd xmm30, XMMWORD PTR [rcx+2032] + vmovrsd xmm30{k7}{z}, XMMWORD PTR [rdx-2048] + vmovrsq xmm30{k7}, XMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsq xmm30, XMMWORD PTR [r9] + vmovrsq xmm30, XMMWORD PTR [rcx+2032] + vmovrsq xmm30{k7}{z}, XMMWORD PTR [rdx-2048] + vmovrsw xmm30{k7}, XMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsw xmm30, XMMWORD PTR [r9] + vmovrsw xmm30, XMMWORD PTR [rcx+2032] + vmovrsw xmm30{k7}{z}, XMMWORD PTR [rdx-2048] diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d new file mode 100644 index 0000000..e2f5847 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d @@ -0,0 +1,27 @@ +#objdump: -dw -Mintel +#name: x86_64 MOVRS, AVX10.2/512 insns (Intel disassembly) +#source: x86-64-movrs-avx10_2-512.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 25 7f 4f 6f b4 f5 00 00 00 10\s+vmovrsb zmm30\{k7\},ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7f 48 6f 31\s+vmovrsb zmm30,ZMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7f 48 6f 71 7f\s+vmovrsb zmm30,ZMMWORD PTR \[rcx\+0x1fc0\] +\s*[a-f0-9]+:\s*62 65 7f cf 6f 72 80\s+vmovrsb zmm30\{k7\}\{z\},ZMMWORD PTR \[rdx-0x2000\] +\s*[a-f0-9]+:\s*62 25 7e 4f 6f b4 f5 00 00 00 10\s+vmovrsd zmm30\{k7\},ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7e 48 6f 31\s+vmovrsd zmm30,ZMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7e 48 6f 71 7f\s+vmovrsd zmm30,ZMMWORD PTR \[rcx\+0x1fc0\] +\s*[a-f0-9]+:\s*62 65 7e cf 6f 72 80\s+vmovrsd zmm30\{k7\}\{z\},ZMMWORD PTR \[rdx-0x2000\] +\s*[a-f0-9]+:\s*62 25 fe 4f 6f b4 f5 00 00 00 10\s+vmovrsq zmm30\{k7\},ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 fe 48 6f 31\s+vmovrsq zmm30,ZMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 fe 48 6f 71 7f\s+vmovrsq zmm30,ZMMWORD PTR \[rcx\+0x1fc0\] +\s*[a-f0-9]+:\s*62 65 fe cf 6f 72 80\s+vmovrsq zmm30\{k7\}\{z\},ZMMWORD PTR \[rdx-0x2000\] +\s*[a-f0-9]+:\s*62 25 ff 4f 6f b4 f5 00 00 00 10\s+vmovrsw zmm30\{k7\},ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 ff 48 6f 31\s+vmovrsw zmm30,ZMMWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 ff 48 6f 71 7f\s+vmovrsw zmm30,ZMMWORD PTR \[rcx\+0x1fc0\] +\s*[a-f0-9]+:\s*62 65 ff cf 6f 72 80\s+vmovrsw zmm30\{k7\}\{z\},ZMMWORD PTR \[rdx-0x2000\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.d b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.d new file mode 100644 index 0000000..af32491 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.d @@ -0,0 +1,25 @@ +#objdump: -dw +#name: x86_64 MOVRS, AVX10.2/512 insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 25 7f 4f 6f b4 f5 00 00 00 10\s+vmovrsb 0x10000000\(%rbp,%r14,8\),%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 7f 48 6f 31\s+vmovrsb \(%r9\),%zmm30 +\s*[a-f0-9]+:\s*62 65 7f 48 6f 71 7f\s+vmovrsb 0x1fc0\(%rcx\),%zmm30 +\s*[a-f0-9]+:\s*62 65 7f cf 6f 72 80\s+vmovrsb -0x2000\(%rdx\),%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 7e 4f 6f b4 f5 00 00 00 10\s+vmovrsd 0x10000000\(%rbp,%r14,8\),%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 7e 48 6f 31\s+vmovrsd \(%r9\),%zmm30 +\s*[a-f0-9]+:\s*62 65 7e 48 6f 71 7f\s+vmovrsd 0x1fc0\(%rcx\),%zmm30 +\s*[a-f0-9]+:\s*62 65 7e cf 6f 72 80\s+vmovrsd -0x2000\(%rdx\),%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 fe 4f 6f b4 f5 00 00 00 10\s+vmovrsq 0x10000000\(%rbp,%r14,8\),%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 fe 48 6f 31\s+vmovrsq \(%r9\),%zmm30 +\s*[a-f0-9]+:\s*62 65 fe 48 6f 71 7f\s+vmovrsq 0x1fc0\(%rcx\),%zmm30 +\s*[a-f0-9]+:\s*62 65 fe cf 6f 72 80\s+vmovrsq -0x2000\(%rdx\),%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 25 ff 4f 6f b4 f5 00 00 00 10\s+vmovrsw 0x10000000\(%rbp,%r14,8\),%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 45 ff 48 6f 31\s+vmovrsw \(%r9\),%zmm30 +\s*[a-f0-9]+:\s*62 65 ff 48 6f 71 7f\s+vmovrsw 0x1fc0\(%rcx\),%zmm30 +\s*[a-f0-9]+:\s*62 65 ff cf 6f 72 80\s+vmovrsw -0x2000\(%rdx\),%zmm30\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.s b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.s new file mode 100644 index 0000000..5caaf4f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-avx10_2-512.s @@ -0,0 +1,41 @@ +# Check 64bit MOVRS, AVX10.2/512 instructions + + .arch generic64 + .arch .avx10.2/512 + .arch .movrs +_start: + vmovrsb 0x10000000(%rbp, %r14, 8), %zmm30{%k7} + vmovrsb (%r9), %zmm30 + vmovrsb 8128(%rcx), %zmm30 + vmovrsb -8192(%rdx), %zmm30{%k7}{z} + vmovrsd 0x10000000(%rbp, %r14, 8), %zmm30{%k7} + vmovrsd (%r9), %zmm30 + vmovrsd 8128(%rcx), %zmm30 + vmovrsd -8192(%rdx), %zmm30{%k7}{z} + vmovrsq 0x10000000(%rbp, %r14, 8), %zmm30{%k7} + vmovrsq (%r9), %zmm30 + vmovrsq 8128(%rcx), %zmm30 + vmovrsq -8192(%rdx), %zmm30{%k7}{z} + vmovrsw 0x10000000(%rbp, %r14, 8), %zmm30{%k7} + vmovrsw (%r9), %zmm30 + vmovrsw 8128(%rcx), %zmm30 + vmovrsw -8192(%rdx), %zmm30{%k7}{z} + +_intel: + .intel_syntax noprefix + vmovrsb zmm30{k7}, ZMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsb zmm30, ZMMWORD PTR [r9] + vmovrsb zmm30, ZMMWORD PTR [rcx+8128] + vmovrsb zmm30{k7}{z}, ZMMWORD PTR [rdx-8192] + vmovrsd zmm30{k7}, ZMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsd zmm30, ZMMWORD PTR [r9] + vmovrsd zmm30, ZMMWORD PTR [rcx+8128] + vmovrsd zmm30{k7}{z}, ZMMWORD PTR [rdx-8192] + vmovrsq zmm30{k7}, ZMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsq zmm30, ZMMWORD PTR [r9] + vmovrsq zmm30, ZMMWORD PTR [rcx+8128] + vmovrsq zmm30{k7}{z}, ZMMWORD PTR [rdx-8192] + vmovrsw zmm30{k7}, ZMMWORD PTR [rbp+r14*8+0x10000000] + vmovrsw zmm30, ZMMWORD PTR [r9] + vmovrsw zmm30, ZMMWORD PTR [rcx+8128] + vmovrsw zmm30{k7}{z}, ZMMWORD PTR [rdx-8192] diff --git a/gas/testsuite/gas/i386/x86-64-movrs-intel.d b/gas/testsuite/gas/i386/x86-64-movrs-intel.d new file mode 100644 index 0000000..145644f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-intel.d @@ -0,0 +1,31 @@ +#objdump: -dw -Mintel +#name: x86_64 MOVRS insns (Intel disassembly) +#source: x86-64-movrs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*66 42 0f 38 8b 94 f5 00 00 00 10\s+movrs dx,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*66 41 0f 38 8b 11\s+movrs dx,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*66 0f 38 8b 91 fe 00 00 00\s+movrs dx,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*66 0f 38 8b 92 00 ff ff ff\s+movrs dx,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*42 0f 38 8b 94 f5 00 00 00 10\s+movrs edx,DWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*41 0f 38 8b 11\s+movrs edx,DWORD PTR \[r9\] +\s*[a-f0-9]+:\s*0f 38 8b 91 fc 01 00 00\s+movrs edx,DWORD PTR \[rcx\+0x1fc\] +\s*[a-f0-9]+:\s*0f 38 8b 92 00 fe ff ff\s+movrs edx,DWORD PTR \[rdx-0x200\] +\s*[a-f0-9]+:\s*4e 0f 38 8b a4 f5 00 00 00 10\s+movrs r12,QWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*4d 0f 38 8b 21\s+movrs r12,QWORD PTR \[r9\] +\s*[a-f0-9]+:\s*4c 0f 38 8b a1 f8 03 00 00\s+movrs r12,QWORD PTR \[rcx\+0x3f8\] +\s*[a-f0-9]+:\s*4c 0f 38 8b a2 00 fc ff ff\s+movrs r12,QWORD PTR \[rdx-0x400\] +\s*[a-f0-9]+:\s*42 0f 38 8a 9c f5 00 00 00 10\s+movrs bl,BYTE PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*41 0f 38 8a 19\s+movrs bl,BYTE PTR \[r9\] +\s*[a-f0-9]+:\s*0f 38 8a 59 7f\s+movrs bl,BYTE PTR \[rcx\+0x7f\] +\s*[a-f0-9]+:\s*0f 38 8a 5a 80\s+movrs bl,BYTE PTR \[rdx-0x80\] +\s*[a-f0-9]+:\s*42 0f 18 a4 f5 00 00 00 10\s+prefetchrst2 BYTE PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*41 0f 18 21\s+prefetchrst2 BYTE PTR \[r9\] +\s*[a-f0-9]+:\s*0f 18 61 7f\s+prefetchrst2 BYTE PTR \[rcx\+0x7f\] +\s*[a-f0-9]+:\s*0f 18 62 80\s+prefetchrst2 BYTE PTR \[rdx-0x80\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-suffix-intel.d b/gas/testsuite/gas/i386/x86-64-movrs-suffix-intel.d new file mode 100644 index 0000000..b1dcb2d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-suffix-intel.d @@ -0,0 +1,15 @@ +#objdump: -dwMsuffix -Mintel +#name: x86_64 MOVRS insns +#source: x86-64-movrs-suffix.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*66 0f 38 8b 92 00 ff ff ff\s+movrsw -0x100\(%rdx\),%dx +\s*[a-f0-9]+:\s*0f 38 8b 92 00 fe ff ff\s+movrsl -0x200\(%rdx\),%edx +\s*[a-f0-9]+:\s*4c 0f 38 8b a2 00 fc ff ff\s+movrsq -0x400\(%rdx\),%r12 +\s*[a-f0-9]+:\s*0f 38 8a 5a 80\s+movrsb -0x80\(%rdx\),%bl +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-suffix.d b/gas/testsuite/gas/i386/x86-64-movrs-suffix.d new file mode 100644 index 0000000..7f71b1d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-suffix.d @@ -0,0 +1,13 @@ +#objdump: -dwMsuffix +#name: x86_64 MOVRS insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*66 0f 38 8b 92 00 ff ff ff\s+movrsw -0x100\(%rdx\),%dx +\s*[a-f0-9]+:\s*0f 38 8b 92 00 fe ff ff\s+movrsl -0x200\(%rdx\),%edx +\s*[a-f0-9]+:\s*4c 0f 38 8b a2 00 fc ff ff\s+movrsq -0x400\(%rdx\),%r12 +\s*[a-f0-9]+:\s*0f 38 8a 5a 80\s+movrsb -0x80\(%rdx\),%bl +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs-suffix.s b/gas/testsuite/gas/i386/x86-64-movrs-suffix.s new file mode 100644 index 0000000..6120b76 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs-suffix.s @@ -0,0 +1,15 @@ +# Check 64bit MOVRS instructions + + .text +_start: + movrsw -256(%rdx), %dx + movrsl -512(%rdx), %edx + movrsq -1024(%rdx), %r12 + movrsb -128(%rdx), %bl + +_intel: + .intel_syntax noprefix + movrsw dx, WORD PTR [rdx-256] + movrsl edx, DWORD PTR [rdx-512] + movrsq r12, QWORD PTR [rdx-1024] + movrsb bl, BYTE PTR [rdx-128] diff --git a/gas/testsuite/gas/i386/x86-64-movrs.d b/gas/testsuite/gas/i386/x86-64-movrs.d new file mode 100644 index 0000000..b5d48cd --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs.d @@ -0,0 +1,29 @@ +#objdump: -dw +#name: x86_64 MOVRS insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*66 42 0f 38 8b 94 f5 00 00 00 10\s+movrs 0x10000000\(%rbp,%r14,8\),%dx +\s*[a-f0-9]+:\s*66 41 0f 38 8b 11\s+movrs \(%r9\),%dx +\s*[a-f0-9]+:\s*66 0f 38 8b 91 fe 00 00 00\s+movrs 0xfe\(%rcx\),%dx +\s*[a-f0-9]+:\s*66 0f 38 8b 92 00 ff ff ff\s+movrs -0x100\(%rdx\),%dx +\s*[a-f0-9]+:\s*42 0f 38 8b 94 f5 00 00 00 10\s+movrs 0x10000000\(%rbp,%r14,8\),%edx +\s*[a-f0-9]+:\s*41 0f 38 8b 11\s+movrs \(%r9\),%edx +\s*[a-f0-9]+:\s*0f 38 8b 91 fc 01 00 00\s+movrs 0x1fc\(%rcx\),%edx +\s*[a-f0-9]+:\s*0f 38 8b 92 00 fe ff ff\s+movrs -0x200\(%rdx\),%edx +\s*[a-f0-9]+:\s*4e 0f 38 8b a4 f5 00 00 00 10\s+movrs 0x10000000\(%rbp,%r14,8\),%r12 +\s*[a-f0-9]+:\s*4d 0f 38 8b 21\s+movrs \(%r9\),%r12 +\s*[a-f0-9]+:\s*4c 0f 38 8b a1 f8 03 00 00\s+movrs 0x3f8\(%rcx\),%r12 +\s*[a-f0-9]+:\s*4c 0f 38 8b a2 00 fc ff ff\s+movrs -0x400\(%rdx\),%r12 +\s*[a-f0-9]+:\s*42 0f 38 8a 9c f5 00 00 00 10\s+movrs 0x10000000\(%rbp,%r14,8\),%bl +\s*[a-f0-9]+:\s*41 0f 38 8a 19\s+movrs \(%r9\),%bl +\s*[a-f0-9]+:\s*0f 38 8a 59 7f\s+movrs 0x7f\(%rcx\),%bl +\s*[a-f0-9]+:\s*0f 38 8a 5a 80\s+movrs -0x80\(%rdx\),%bl +\s*[a-f0-9]+:\s*42 0f 18 a4 f5 00 00 00 10\s+prefetchrst2 0x10000000\(%rbp,%r14,8\) +\s*[a-f0-9]+:\s*41 0f 18 21\s+prefetchrst2 \(%r9\) +\s*[a-f0-9]+:\s*0f 18 61 7f\s+prefetchrst2 0x7f\(%rcx\) +\s*[a-f0-9]+:\s*0f 18 62 80\s+prefetchrst2 -0x80\(%rdx\) +#pass diff --git a/gas/testsuite/gas/i386/x86-64-movrs.s b/gas/testsuite/gas/i386/x86-64-movrs.s new file mode 100644 index 0000000..e15269a --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-movrs.s @@ -0,0 +1,47 @@ +# Check 64bit MOVRS instructions + + .text +_start: + movrs 0x10000000(%rbp, %r14, 8), %dx + movrs (%r9), %dx + movrs 254(%rcx), %dx + movrs -256(%rdx), %dx + movrs 0x10000000(%rbp, %r14, 8), %edx + movrs (%r9), %edx + movrs 508(%rcx), %edx + movrs -512(%rdx), %edx + movrs 0x10000000(%rbp, %r14, 8), %r12 + movrs (%r9), %r12 + movrs 1016(%rcx), %r12 + movrs -1024(%rdx), %r12 + movrs 0x10000000(%rbp, %r14, 8), %bl + movrs (%r9), %bl + movrs 127(%rcx), %bl + movrs -128(%rdx), %bl + prefetchrst2 0x10000000(%rbp, %r14, 8) + prefetchrst2 (%r9) + prefetchrst2 127(%rcx) + prefetchrst2 -128(%rdx) + +_intel: + .intel_syntax noprefix + movrs dx, WORD PTR [rbp+r14*8+0x10000000] + movrs dx, WORD PTR [r9] + movrs dx, WORD PTR [rcx+254] + movrs dx, WORD PTR [rdx-256] + movrs edx, DWORD PTR [rbp+r14*8+0x10000000] + movrs edx, DWORD PTR [r9] + movrs edx, DWORD PTR [rcx+508] + movrs edx, DWORD PTR [rdx-512] + movrs r12, QWORD PTR [rbp+r14*8+0x10000000] + movrs r12, QWORD PTR [r9] + movrs r12, QWORD PTR [rcx+1016] + movrs r12, QWORD PTR [rdx-1024] + movrs bl, BYTE PTR [rbp+r14*8+0x10000000] + movrs bl, BYTE PTR [r9] + movrs bl, BYTE PTR [rcx+127] + movrs bl, BYTE PTR [rdx-128] + prefetchrst2 BYTE PTR [rbp+r14*8+0x10000000] + prefetchrst2 BYTE PTR [r9] + prefetchrst2 BYTE PTR [rcx+127] + prefetchrst2 BYTE PTR [rdx-128] diff --git a/gas/testsuite/gas/i386/x86-64-prefetch-intel.d b/gas/testsuite/gas/i386/x86-64-prefetch-intel.d index b0f9556..29c5253 100644 --- a/gas/testsuite/gas/i386/x86-64-prefetch-intel.d +++ b/gas/testsuite/gas/i386/x86-64-prefetch-intel.d @@ -22,7 +22,7 @@ Disassembly of section .text: \s*[a-f0-9]+: 0f 18 08 prefetcht0 BYTE PTR \[rax\] \s*[a-f0-9]+: 0f 18 10 prefetcht1 BYTE PTR \[rax\] \s*[a-f0-9]+: 0f 18 18 prefetcht2 BYTE PTR \[rax\] -\s*[a-f0-9]+: 0f 18 20 nop DWORD PTR \[rax\] +\s*[a-f0-9]+: 0f 18 20 prefetchrst2 BYTE PTR \[rax\] \s*[a-f0-9]+: 0f 18 28 nop DWORD PTR \[rax\] \s*[a-f0-9]+: 0f 18 30 nop DWORD PTR \[rax\] \s*[a-f0-9]+: 0f 18 38 nop DWORD PTR \[rax\] diff --git a/gas/testsuite/gas/i386/x86-64-prefetch.d b/gas/testsuite/gas/i386/x86-64-prefetch.d index 3e83ef5..18205c2 100644 --- a/gas/testsuite/gas/i386/x86-64-prefetch.d +++ b/gas/testsuite/gas/i386/x86-64-prefetch.d @@ -22,7 +22,7 @@ Disassembly of section .text: \s*[a-f0-9]+: 0f 18 08 prefetcht0 \(%rax\) \s*[a-f0-9]+: 0f 18 10 prefetcht1 \(%rax\) \s*[a-f0-9]+: 0f 18 18 prefetcht2 \(%rax\) -\s*[a-f0-9]+: 0f 18 20 nopl \(%rax\) +\s*[a-f0-9]+: 0f 18 20 prefetchrst2 \(%rax\) \s*[a-f0-9]+: 0f 18 28 nopl \(%rax\) \s*[a-f0-9]+: 0f 18 30 nopl \(%rax\) \s*[a-f0-9]+: 0f 18 38 nopl \(%rax\) diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index fe50367..265bd0b 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -535,6 +535,12 @@ run_dump_test "x86-64-amx-fp8" run_dump_test "x86-64-amx-fp8-intel" run_list_test "x86-64-amx-fp8-inval" run_dump_test "x86-64-amx-fp8-bad" +run_dump_test "x86-64-movrs" +run_dump_test "x86-64-movrs-intel" +run_dump_test "x86-64-movrs-avx10_2-512" +run_dump_test "x86-64-movrs-avx10_2-512-intel" +run_dump_test "x86-64-movrs-avx10_2-256" +run_dump_test "x86-64-movrs-avx10_2-256-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" |