diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:14 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:14 +0100 |
| commit | a8cb21aa06e99bc75829ad08beca67c7de683a21 (patch) | |
| tree | 0da97be64fb8f2843b6720d9bf435c37f50f3a75 /gas/testsuite | |
| parent | ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a (diff) | |
| download | gdb-a8cb21aa06e99bc75829ad08beca67c7de683a21.zip gdb-a8cb21aa06e99bc75829ad08beca67c7de683a21.tar.gz gdb-a8cb21aa06e99bc75829ad08beca67c7de683a21.tar.bz2 | |
aarch64: Add the SME2 MLALL and MLSLL instructions
SMLALL, SMLSLL, UMLALL and UMLSLL have the same format.
USMLALL and SUMLALL allow the same operand types as those
instructions, except that SUMLALL does not have the multi-vector
x multi-vector forms (which would be redundant with USMLALL).
Diffstat (limited to 'gas/testsuite')
21 files changed, 2312 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.d b/gas/testsuite/gas/aarch64/sme2-13-invalid.d new file mode 100644 index 0000000..8980695 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-13-invalid.s +#error_output: sme2-13-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.l b/gas/testsuite/gas/aarch64/sme2-13-invalid.l new file mode 100644 index 0000000..88a74ac --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.l @@ -0,0 +1,80 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `smlall 0,z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `smlall za\.s\[w8,0:3\],0,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,0' +[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0,vgx4\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[16\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.s,z0\.s\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{z0\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z1\.b-z4\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z3\.b-z6\.b}' diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.s b/gas/testsuite/gas/aarch64/sme2-13-invalid.s new file mode 100644 index 0000000..5e17714 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.s @@ -0,0 +1,83 @@ + smlall 0, z0.b, z0.b[0] + smlall za.s[w8, 0:3], 0, z0.b[0] + smlall za.s[w8, 0:3], z0.b, 0 + + smlall za0.s[w8, 0:3], z0.b, z0.b[0] + smlall za0h.s[w8, 0:3], z0.b, z0.b[0] + smlall za.s[w7, 0:3], z0.b, z0.b[0] + smlall za.s[w12, 0:3], z0.b, z0.b[0] + smlall za.s[w8, 0], z0.b, z0.b[0] + smlall za.s[w8, 0:1], z0.b, z0.b[0] + smlall za.s[w8, 0:2], z0.b, z0.b[0] + smlall za.s[w8, 0, vgx4], z0.b, z0.b[0] + smlall za.s[w8, 0:3, vgx2], z0.b, z0.b[0] + smlall za.s[w8, 0:3, vgx4], z0.b, z0.b[0] + smlall za.s[w8, 1:4], z0.b, z0.b[0] + smlall za.s[w8, 2:5], z0.b, z0.b[0] + smlall za.s[w8, 3:6], z0.b, z0.b[0] + smlall za.s[w8, 16:19], z0.b, z0.b[0] + smlall za.s[w8, 0:3], z0.b, z16.b[0] + smlall za.s[w8, 0:3], z0.b, z0.b[-1] + smlall za.s[w8, 0:3], z0.b, z0.b[16] + smlall za.s[w8, 0:3], z0.h, z0.h[0] + smlall za.s[w8, 0:3], z0.s, z0.s[0] + + smlall za.s[w7, 0:3], { z0.b - z1.b }, z0.b[0] + smlall za.s[w12, 0:3], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:1], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:2], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 1:4], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 2:5], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 3:6], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:3], { z1.b - z2.b }, z0.b[0] + smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b[0] + smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[-1] + smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[16] + + smlall za.s[w7, 0:3], { z0.b - z3.b }, z0.b[0] + smlall za.s[w12, 0:3], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:1], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:2], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 1:4], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 2:5], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 3:6], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:3], { z1.b - z4.b }, z0.b[0] + smlall za.s[w8, 0:3], { z2.b - z5.b }, z0.b[0] + smlall za.s[w8, 0:3], { z3.b - z6.b }, z0.b[0] + smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b[0] + smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[-1] + smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[16] + + smlall za.s[w8, 0:3, vgx2], z0.b, z0.b + smlall za.s[w8, 0:3, vgx4], z0.b, z0.b + smlall za.s[w8, 16:19], z0.b, z0.b + smlall za.s[w8, 0:3], z0.b, z16.b + + smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b + smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b + smlall za.s[w8, 0:3], { z0.b - z2.b }, z0.b + smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b + + smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b + smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b + smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b + + smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w8, 8:11], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w8, 0:3], { z1.b - z2.b }, { z0.b - z1.b } + smlall za.s[w8, 0:3], { z0.b - z1.b }, { z1.b - z2.b } + + smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w8, 8:11], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z1.b - z4.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z2.b - z5.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z3.b - z6.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z0.b - z3.b }, { z1.b - z4.b } + smlall za.s[w8, 0:3], { z0.b - z3.b }, { z2.b - z5.b } + smlall za.s[w8, 0:3], { z0.b - z3.b }, { z3.b - z6.b } diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.d b/gas/testsuite/gas/aarch64/sme2-13-noarch.d new file mode 100644 index 0000000..6df837f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-13.s +#error_output: sme2-13-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.l b/gas/testsuite/gas/aarch64/sme2-13-noarch.l new file mode 100644 index 0000000..3d55aaa --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.l @@ -0,0 +1,253 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],z25\.b,z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],z25\.b,z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],z25\.b,z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],z25\.b,z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' diff --git a/gas/testsuite/gas/aarch64/sme2-13.d b/gas/testsuite/gas/aarch64/sme2-13.d new file mode 100644 index 0000000..b8f00d1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13.d @@ -0,0 +1,261 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c1000000 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006000 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1000003 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0000 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c00 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6a2 smlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c06 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e41 smlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c06 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec704 smlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200400 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b +[^:]+: c1206400 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b +[^:]+: c1200403 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b +[^:]+: c12007e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b +[^:]+: c12f0400 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b +[^:]+: c1274721 smlall za\.s\[w10, 4:7\], z25\.b, z7\.b +[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2261 smlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003a0 smlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003e0 smlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2320 smlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a06000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b} +[^:]+: c1be0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b} +[^:]+: c1b242c1 smlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b} +[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a16000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b} +[^:]+: c1bd0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b} +[^:]+: c1b96200 smlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b} +[^:]+: c1000008 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006008 smlsll za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c100000b smlsll za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003e8 smlsll za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0008 smlsll za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c08 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6aa smlsll za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c0e smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e49 smlsll za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c0e smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec70c smlsll za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200408 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b +[^:]+: c1206408 smlsll za\.s\[w11, 0:3\], z0\.b, z0\.b +[^:]+: c120040b smlsll za\.s\[w8, 12:15\], z0\.b, z0\.b +[^:]+: c12007e8 smlsll za\.s\[w8, 0:3\], z31\.b, z0\.b +[^:]+: c12f0408 smlsll za\.s\[w8, 0:3\], z0\.b, z15\.b +[^:]+: c1274729 smlsll za\.s\[w10, 4:7\], z25\.b, z7\.b +[^:]+: c1200008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003e8 smlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003e8 smlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2269 smlsll za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003a8 smlsll za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003c8 smlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003c8 smlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003e8 smlsll za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2328 smlsll za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1a00008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a06008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b} +[^:]+: c1be0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b} +[^:]+: c1b242c9 smlsll za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b} +[^:]+: c1a10008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a16008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b} +[^:]+: c1bd0008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b} +[^:]+: c1b96208 smlsll za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b} +[^:]+: c1000010 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006010 umlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1000013 umlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003f0 umlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0010 umlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c10 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6b2 umlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c16 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e51 umlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c16 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec714 umlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200410 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b +[^:]+: c1206410 umlall za\.s\[w11, 0:3\], z0\.b, z0\.b +[^:]+: c1200413 umlall za\.s\[w8, 12:15\], z0\.b, z0\.b +[^:]+: c12007f0 umlall za\.s\[w8, 0:3\], z31\.b, z0\.b +[^:]+: c12f0410 umlall za\.s\[w8, 0:3\], z0\.b, z15\.b +[^:]+: c1274731 umlall za\.s\[w10, 4:7\], z25\.b, z7\.b +[^:]+: c1200010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003f0 umlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003f0 umlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2271 umlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003b0 umlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003d0 umlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003d0 umlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003f0 umlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2330 umlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1a00010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a06010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b} +[^:]+: c1be0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b} +[^:]+: c1b242d1 umlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b} +[^:]+: c1a10010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a16010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b} +[^:]+: c1bd0010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b} +[^:]+: c1b96210 umlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b} +[^:]+: c1000018 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006018 umlsll za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c100001b umlsll za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003f8 umlsll za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0018 umlsll za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c18 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6ba umlsll za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c1e umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e59 umlsll za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c1e umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec71c umlsll za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200418 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b +[^:]+: c1206418 umlsll za\.s\[w11, 0:3\], z0\.b, z0\.b +[^:]+: c120041b umlsll za\.s\[w8, 12:15\], z0\.b, z0\.b +[^:]+: c12007f8 umlsll za\.s\[w8, 0:3\], z31\.b, z0\.b +[^:]+: c12f0418 umlsll za\.s\[w8, 0:3\], z0\.b, z15\.b +[^:]+: c1274739 umlsll za\.s\[w10, 4:7\], z25\.b, z7\.b +[^:]+: c1200018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003f8 umlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003f8 umlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2279 umlsll za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003b8 umlsll za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003d8 umlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003d8 umlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003f8 umlsll za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2338 umlsll za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1a00018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a06018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b} +[^:]+: c1be0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b} +[^:]+: c1b242d9 umlsll za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b} +[^:]+: c1a10018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a16018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b} +[^:]+: c1bd0018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b} +[^:]+: c1b96218 umlsll za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b} diff --git a/gas/testsuite/gas/aarch64/sme2-13.s b/gas/testsuite/gas/aarch64/sme2-13.s new file mode 100644 index 0000000..3881461 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-13.s @@ -0,0 +1,283 @@ + smlall za.s[w8, 0:3], z0.b, z0.b[0] + smlall za.s[w11, 0:3], z0.b, z0.b[0] + smlall za.s[w8, 12:15], z0.b, z0.b[0] + smlall za.s[w8, 0:3], z31.b, z0.b[0] + smlall za.s[w8, 0:3], z0.b, z15.b[0] + smlall za.s[w8, 0:3], z0.b, z0.b[15] + smlall za.s[w9, 8:11], z21.b, z9.b[9] + + smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + smlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + smlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + smlall za.s[w8, 0:3], z0.b, z0.b + smlall za.s[w11, 0:3], z0.b, z0.b + smlall za.s[w8, 12:15], z0.b, z0.b + smlall za.s[w8, 0:3], z31.b, z0.b + smlall za.s[w8, 0:3], z0.b, z15.b + smlall za.s[w10, 4:7], z25.b, z7.b + + smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b + smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b + smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b + smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b + smlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b + smlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b + smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b + smlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b + smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b + smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b + smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b + smlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b + smlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + smlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b + smlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b + smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b + smlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + smlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b } + smlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b } + smlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b } + smlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b } + + smlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b } + smlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b } + smlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b } + + smlsll za.s[w8, 0:3], z0.b, z0.b[0] + smlsll za.s[w11, 0:3], z0.b, z0.b[0] + smlsll za.s[w8, 12:15], z0.b, z0.b[0] + smlsll za.s[w8, 0:3], z31.b, z0.b[0] + smlsll za.s[w8, 0:3], z0.b, z15.b[0] + smlsll za.s[w8, 0:3], z0.b, z0.b[15] + smlsll za.s[w9, 8:11], z21.b, z9.b[9] + + smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + smlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + smlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + smlsll za.s[w8, 0:3], z0.b, z0.b + smlsll za.s[w11, 0:3], z0.b, z0.b + smlsll za.s[w8, 12:15], z0.b, z0.b + smlsll za.s[w8, 0:3], z31.b, z0.b + smlsll za.s[w8, 0:3], z0.b, z15.b + smlsll za.s[w10, 4:7], z25.b, z7.b + + smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b + smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b + smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b + smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b + smlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b + smlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b + smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b + smlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b + smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b + smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b + smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b + smlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b + smlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + smlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b + smlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b + smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b + smlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b } + smlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + smlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b } + smlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b } + smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b } + smlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b } + + smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b } + smlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + smlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b } + smlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b } + smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b } + smlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b } + + umlall za.s[w8, 0:3], z0.b, z0.b[0] + umlall za.s[w11, 0:3], z0.b, z0.b[0] + umlall za.s[w8, 12:15], z0.b, z0.b[0] + umlall za.s[w8, 0:3], z31.b, z0.b[0] + umlall za.s[w8, 0:3], z0.b, z15.b[0] + umlall za.s[w8, 0:3], z0.b, z0.b[15] + umlall za.s[w9, 8:11], z21.b, z9.b[9] + + umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + umlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + umlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + umlall za.s[w8, 0:3], z0.b, z0.b + umlall za.s[w11, 0:3], z0.b, z0.b + umlall za.s[w8, 12:15], z0.b, z0.b + umlall za.s[w8, 0:3], z31.b, z0.b + umlall za.s[w8, 0:3], z0.b, z15.b + umlall za.s[w10, 4:7], z25.b, z7.b + + umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b + umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b + umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b + umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b + umlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b + umlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b + umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b + umlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b + umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b + umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b + umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b + umlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b + umlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + umlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b + umlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b + umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b + umlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + umlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b } + umlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + umlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b } + umlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b } + umlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b } + umlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b } + + umlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b } + umlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + umlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b } + umlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b } + umlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b } + umlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b } + + umlsll za.s[w8, 0:3], z0.b, z0.b[0] + umlsll za.s[w11, 0:3], z0.b, z0.b[0] + umlsll za.s[w8, 12:15], z0.b, z0.b[0] + umlsll za.s[w8, 0:3], z31.b, z0.b[0] + umlsll za.s[w8, 0:3], z0.b, z15.b[0] + umlsll za.s[w8, 0:3], z0.b, z0.b[15] + umlsll za.s[w9, 8:11], z21.b, z9.b[9] + + umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + umlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + umlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + umlsll za.s[w8, 0:3], z0.b, z0.b + umlsll za.s[w11, 0:3], z0.b, z0.b + umlsll za.s[w8, 12:15], z0.b, z0.b + umlsll za.s[w8, 0:3], z31.b, z0.b + umlsll za.s[w8, 0:3], z0.b, z15.b + umlsll za.s[w10, 4:7], z25.b, z7.b + + umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b + umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b + umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b + umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b + umlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b + umlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b + umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b + umlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b + umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b + umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b + umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b + umlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b + umlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + umlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b + umlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b + umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b + umlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b } + umlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + umlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b } + umlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b } + umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b } + umlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b } + + umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b } + umlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + umlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b } + umlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b } + umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b } + umlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b } diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.d b/gas/testsuite/gas/aarch64/sme2-14-invalid.d new file mode 100644 index 0000000..980bd4e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-14-invalid.s +#error_output: sme2-14-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.l b/gas/testsuite/gas/aarch64/sme2-14-invalid.l new file mode 100644 index 0000000..c398f6b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.l @@ -0,0 +1,7 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `sumlall 0,z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sumlall za\.s\[w8,0:3\],0,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],z0\.b,0' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.s b/gas/testsuite/gas/aarch64/sme2-14-invalid.s new file mode 100644 index 0000000..8004abb --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.s @@ -0,0 +1,7 @@ + sumlall 0, z0.b, z0.b[0] + sumlall za.s[w8, 0:3], 0, z0.b[0] + sumlall za.s[w8, 0:3], z0.b, 0 + + sumlall za.s[w8, 0:3], z0.b, z0.b + sumlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + sumlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.d b/gas/testsuite/gas/aarch64/sme2-14-noarch.d new file mode 100644 index 0000000..5149607 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-14.s +#error_output: sme2-14-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.l b/gas/testsuite/gas/aarch64/sme2-14-noarch.l new file mode 100644 index 0000000..76f5e43 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.l @@ -0,0 +1,107 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],z25\.b,z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' diff --git a/gas/testsuite/gas/aarch64/sme2-14.d b/gas/testsuite/gas/aarch64/sme2-14.d new file mode 100644 index 0000000..e603f09 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14.d @@ -0,0 +1,115 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c1000014 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006014 sumlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1000017 sumlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003f4 sumlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0014 sumlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c14 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6b6 sumlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106030 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100031 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003f0 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c36 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e71 sumlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e030 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108031 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c11083b0 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c36 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec734 sumlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206014 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200015 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003d4 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2275 sumlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306014 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300015 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300394 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003b4 sumlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003f4 sumlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2334 sumlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1000004 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1006004 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\] +[^:]+: c1000007 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\] +[^:]+: c10003e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\] +[^:]+: c10f0004 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\] +[^:]+: c1009c04 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\] +[^:]+: c109a6a6 usmlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\] +[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1106020 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c1100021 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\] +[^:]+: c11003e0 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f0020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\] +[^:]+: c1100c26 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\] +[^:]+: c1192e61 usmlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\] +[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c110e020 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c1108021 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] +[^:]+: c11083a0 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\] +[^:]+: c11f8020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\] +[^:]+: c1108c26 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\] +[^:]+: c11ec724 usmlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\] +[^:]+: c1200404 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b +[^:]+: c1206404 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b +[^:]+: c1200407 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b +[^:]+: c12007e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b +[^:]+: c12f0404 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b +[^:]+: c1274725 usmlall za\.s\[w10, 4:7\], z25\.b, z7\.b +[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1206004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c1200005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b +[^:]+: c12003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b +[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b +[^:]+: c12f0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b +[^:]+: c12d2265 usmlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b +[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1306004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b +[^:]+: c1300384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b +[^:]+: c13003a4 usmlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b +[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b +[^:]+: c13003e4 usmlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b +[^:]+: c13f0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b +[^:]+: c13e2324 usmlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b +[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a06004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a00005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b} +[^:]+: c1a003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b} +[^:]+: c1be0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b} +[^:]+: c1b242c5 usmlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b} +[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a16004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b} +[^:]+: c1a10384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b} +[^:]+: c1bd0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b} +[^:]+: c1b96204 usmlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b} diff --git a/gas/testsuite/gas/aarch64/sme2-14.s b/gas/testsuite/gas/aarch64/sme2-14.s new file mode 100644 index 0000000..d1fa794 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-14.s @@ -0,0 +1,118 @@ + sumlall za.s[w8, 0:3], z0.b, z0.b[0] + sumlall za.s[w11, 0:3], z0.b, z0.b[0] + sumlall za.s[w8, 12:15], z0.b, z0.b[0] + sumlall za.s[w8, 0:3], z31.b, z0.b[0] + sumlall za.s[w8, 0:3], z0.b, z15.b[0] + sumlall za.s[w8, 0:3], z0.b, z0.b[15] + sumlall za.s[w9, 8:11], z21.b, z9.b[9] + + sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + sumlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + sumlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b + sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b + sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b + sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b + sumlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b + sumlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b + sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b + sumlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b + sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b + sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b + sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b + sumlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b + sumlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + sumlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b + sumlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b + sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b + sumlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + usmlall za.s[w8, 0:3], z0.b, z0.b[0] + usmlall za.s[w11, 0:3], z0.b, z0.b[0] + usmlall za.s[w8, 12:15], z0.b, z0.b[0] + usmlall za.s[w8, 0:3], z31.b, z0.b[0] + usmlall za.s[w8, 0:3], z0.b, z15.b[0] + usmlall za.s[w8, 0:3], z0.b, z0.b[15] + usmlall za.s[w9, 8:11], z21.b, z9.b[9] + + usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0] + usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0] + usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0] + usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0] + usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0] + usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0] + usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15] + usmlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12] + + usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0] + usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0] + usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0] + usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0] + usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0] + usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0] + usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15] + usmlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6] + + usmlall za.s[w8, 0:3], z0.b, z0.b + usmlall za.s[w11, 0:3], z0.b, z0.b + usmlall za.s[w8, 12:15], z0.b, z0.b + usmlall za.s[w8, 0:3], z31.b, z0.b + usmlall za.s[w8, 0:3], z0.b, z15.b + usmlall za.s[w10, 4:7], z25.b, z7.b + + usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b + usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b + usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b + usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b + usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b + usmlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b + usmlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b + usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b + usmlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b + + usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b + usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b + usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b + usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b + usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b + usmlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b + usmlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b + usmlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b + usmlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b + usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b + usmlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b + + usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b } + usmlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b } + usmlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b } + usmlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b } + usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b } + usmlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b } + + usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b } + usmlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b } + usmlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b } + usmlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b } + usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b } + usmlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b } diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d new file mode 100644 index 0000000..955fd3b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-i16i64-2-invalid.s +#error_output: sme2-i16i64-2-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l new file mode 100644 index 0000000..280f685 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l @@ -0,0 +1,95 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0,vgx4\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.b,z0\.b\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.d,z0\.d\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z1\.h-z2\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z1\.h-z4\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z2\.h-z5\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z3\.h-z6\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b\[0\] +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s new file mode 100644 index 0000000..142ff5e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s @@ -0,0 +1,88 @@ + smlall za0.d[w8, 0:3], z0.h, z0.h[0] + smlall za0h.d[w8, 0:3], z0.h, z0.h[0] + smlall za.d[w7, 0:3], z0.h, z0.h[0] + smlall za.d[w12, 0:3], z0.h, z0.h[0] + smlall za.d[w8, 0], z0.h, z0.h[0] + smlall za.d[w8, 0:1], z0.h, z0.h[0] + smlall za.d[w8, 0:2], z0.h, z0.h[0] + smlall za.d[w8, 0, vgx4], z0.h, z0.h[0] + smlall za.d[w8, 0:3, vgx2], z0.h, z0.h[0] + smlall za.d[w8, 0:3, vgx4], z0.h, z0.h[0] + smlall za.d[w8, 1:4], z0.h, z0.h[0] + smlall za.d[w8, 2:5], z0.h, z0.h[0] + smlall za.d[w8, 3:6], z0.h, z0.h[0] + smlall za.d[w8, 16:19], z0.h, z0.h[0] + smlall za.d[w8, 0:3], z0.h, z16.h[0] + smlall za.d[w8, 0:3], z0.h, z0.h[-1] + smlall za.d[w8, 0:3], z0.h, z0.h[8] + smlall za.d[w8, 0:3], z0.b, z0.b[0] + smlall za.d[w8, 0:3], z0.d, z0.d[0] + + smlall za.d[w7, 0:3], { z0.h - z1.h }, z0.h[0] + smlall za.d[w12, 0:3], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:1], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:2], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 1:4], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 2:5], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 3:6], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:3], { z1.h - z2.h }, z0.h[0] + smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h[0] + smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[-1] + smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[8] + + smlall za.d[w7, 0:3], { z0.h - z3.h }, z0.h[0] + smlall za.d[w12, 0:3], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:1], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:2], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 1:4], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 2:5], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 3:6], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:3], { z1.h - z4.h }, z0.h[0] + smlall za.d[w8, 0:3], { z2.h - z5.h }, z0.h[0] + smlall za.d[w8, 0:3], { z3.h - z6.h }, z0.h[0] + smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h[0] + smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[-1] + smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[8] + + smlall za.d[w8, 0:3, vgx2], z0.h, z0.h + smlall za.d[w8, 0:3, vgx4], z0.h, z0.h + smlall za.d[w8, 16:19], z0.h, z0.h + smlall za.d[w8, 0:3], z0.h, z16.h + + smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h + smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h + smlall za.d[w8, 0:3], { z0.h - z2.h }, z0.h + smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h + + smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h + smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h + smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h + + smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w8, 8:11], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w8, 0:3], { z1.h - z2.h }, { z0.h - z1.h } + smlall za.d[w8, 0:3], { z0.h - z1.h }, { z1.h - z2.h } + + smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w8, 8:11], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z1.h - z4.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z2.h - z5.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z3.h - z6.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z0.h - z3.h }, { z1.h - z4.h } + smlall za.d[w8, 0:3], { z0.h - z3.h }, { z2.h - z5.h } + smlall za.d[w8, 0:3], { z0.h - z3.h }, { z3.h - z6.h } + + sumlall za.d[w8, 0:3], z0.h, z0.h[0] + sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0] + sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0] + sumlall za.d[w8, 0:3], z0.h, z0.h + sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h + sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h + sumlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + sumlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h } diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d new file mode 100644 index 0000000..4f541e3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme2 +#source: sme2-i16i64-2.s +#error_output: sme2-i16i64-2-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l new file mode 100644 index 0000000..c78057f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l @@ -0,0 +1,253 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2.d new file mode 100644 index 0000000..1f0a3f0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2.d @@ -0,0 +1,261 @@ +#as: -march=armv8-a+sme2+sme-i16i64 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c1800000 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1806000 smlall za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1800003 smlall za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\] +[^:]+: c18003e0 smlall za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\] +[^:]+: c18f0000 smlall za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\] +[^:]+: c1808c00 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\] +[^:]+: c1892ea2 smlall za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\] +[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1906000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c19003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\] +[^:]+: c1900406 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\] +[^:]+: c1992245 smlall za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\] +[^:]+: c1908000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c190e000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f8000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\] +[^:]+: c1908406 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\] +[^:]+: c19ec704 smlall za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\] +[^:]+: c1600400 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h +[^:]+: c1606400 smlall za\.d\[w11, 0:3\], z0\.h, z0\.h +[^:]+: c1600403 smlall za\.d\[w8, 12:15\], z0\.h, z0\.h +[^:]+: c16007e0 smlall za\.d\[w8, 0:3\], z31\.h, z0\.h +[^:]+: c16f0400 smlall za\.d\[w8, 0:3\], z0\.h, z15\.h +[^:]+: c1674721 smlall za\.d\[w10, 4:7\], z25\.h, z7\.h +[^:]+: c1600000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1606000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c16003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h +[^:]+: c16003e0 smlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16003e0 smlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16f0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h +[^:]+: c16d2261 smlall za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h +[^:]+: c1700000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1706000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h +[^:]+: c17003a0 smlall za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h +[^:]+: c17003c0 smlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003c0 smlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003e0 smlall za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h +[^:]+: c17f0000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h +[^:]+: c17e2320 smlall za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h +[^:]+: c1e00000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e06000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h} +[^:]+: c1fe0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h} +[^:]+: c1f242c1 smlall za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h} +[^:]+: c1e10000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e16000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h} +[^:]+: c1fd0000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h} +[^:]+: c1f96200 smlall za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h} +[^:]+: c1800008 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1806008 smlsll za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c180000b smlsll za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\] +[^:]+: c18003e8 smlsll za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\] +[^:]+: c18f0008 smlsll za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\] +[^:]+: c1808c08 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\] +[^:]+: c1892eaa smlsll za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\] +[^:]+: c1900008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1906008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c19003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\] +[^:]+: c190040e smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\] +[^:]+: c199224d smlsll za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\] +[^:]+: c1908008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c190e008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f8008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\] +[^:]+: c190840e smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\] +[^:]+: c19ec70c smlsll za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\] +[^:]+: c1600408 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h +[^:]+: c1606408 smlsll za\.d\[w11, 0:3\], z0\.h, z0\.h +[^:]+: c160040b smlsll za\.d\[w8, 12:15\], z0\.h, z0\.h +[^:]+: c16007e8 smlsll za\.d\[w8, 0:3\], z31\.h, z0\.h +[^:]+: c16f0408 smlsll za\.d\[w8, 0:3\], z0\.h, z15\.h +[^:]+: c1674729 smlsll za\.d\[w10, 4:7\], z25\.h, z7\.h +[^:]+: c1600008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1606008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c16003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h +[^:]+: c16003e8 smlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16003e8 smlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16f0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h +[^:]+: c16d2269 smlsll za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h +[^:]+: c1700008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1706008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h +[^:]+: c17003a8 smlsll za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h +[^:]+: c17003c8 smlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003c8 smlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003e8 smlsll za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h +[^:]+: c17f0008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h +[^:]+: c17e2328 smlsll za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h +[^:]+: c1e00008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e06008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h} +[^:]+: c1fe0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h} +[^:]+: c1f242c9 smlsll za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h} +[^:]+: c1e10008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e16008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h} +[^:]+: c1fd0008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h} +[^:]+: c1f96208 smlsll za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h} +[^:]+: c1800010 umlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1806010 umlall za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1800013 umlall za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\] +[^:]+: c18003f0 umlall za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\] +[^:]+: c18f0010 umlall za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\] +[^:]+: c1808c10 umlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\] +[^:]+: c1892eb2 umlall za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\] +[^:]+: c1900010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1906010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900011 umlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c19003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\] +[^:]+: c1900416 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\] +[^:]+: c1992653 umlall za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[5\] +[^:]+: c1908010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c190e010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f8010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\] +[^:]+: c1908416 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\] +[^:]+: c19ec312 umlall za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[1\] +[^:]+: c1600410 umlall za\.d\[w8, 0:3\], z0\.h, z0\.h +[^:]+: c1606410 umlall za\.d\[w11, 0:3\], z0\.h, z0\.h +[^:]+: c1600413 umlall za\.d\[w8, 12:15\], z0\.h, z0\.h +[^:]+: c16007f0 umlall za\.d\[w8, 0:3\], z31\.h, z0\.h +[^:]+: c16f0410 umlall za\.d\[w8, 0:3\], z0\.h, z15\.h +[^:]+: c1674731 umlall za\.d\[w10, 4:7\], z25\.h, z7\.h +[^:]+: c1600010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1606010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600011 umlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c16003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h +[^:]+: c16003f0 umlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16003f0 umlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16f0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h +[^:]+: c16d2271 umlall za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h +[^:]+: c1700010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1706010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h +[^:]+: c17003b0 umlall za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h +[^:]+: c17003d0 umlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003d0 umlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003f0 umlall za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h +[^:]+: c17f0010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h +[^:]+: c17e2330 umlall za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h +[^:]+: c1e00010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e06010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00011 umlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h} +[^:]+: c1fe0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h} +[^:]+: c1f242d1 umlall za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h} +[^:]+: c1e10010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e16010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h} +[^:]+: c1fd0010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h} +[^:]+: c1f96210 umlall za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h} +[^:]+: c1800018 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c1806018 umlsll za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\] +[^:]+: c180001b umlsll za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\] +[^:]+: c18003f8 umlsll za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\] +[^:]+: c18f0018 umlsll za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\] +[^:]+: c1808c18 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\] +[^:]+: c1892eba umlsll za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\] +[^:]+: c1900018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1906018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1900019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c19003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\] +[^:]+: c190041e umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\] +[^:]+: c199225d umlsll za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\] +[^:]+: c1908018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c190e018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\] +[^:]+: c1908398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\] +[^:]+: c19f8018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\] +[^:]+: c190841e umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\] +[^:]+: c19ec71c umlsll za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\] +[^:]+: c1600418 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h +[^:]+: c1606418 umlsll za\.d\[w11, 0:3\], z0\.h, z0\.h +[^:]+: c160041b umlsll za\.d\[w8, 12:15\], z0\.h, z0\.h +[^:]+: c16007f8 umlsll za\.d\[w8, 0:3\], z31\.h, z0\.h +[^:]+: c16f0418 umlsll za\.d\[w8, 0:3\], z0\.h, z15\.h +[^:]+: c1674739 umlsll za\.d\[w10, 4:7\], z25\.h, z7\.h +[^:]+: c1600018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1606018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c1600019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h +[^:]+: c16003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h +[^:]+: c16003f8 umlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16003f8 umlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h +[^:]+: c16f0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h +[^:]+: c16d2279 umlsll za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h +[^:]+: c1700018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1706018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h +[^:]+: c1700398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h +[^:]+: c17003b8 umlsll za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h +[^:]+: c17003d8 umlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003d8 umlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h +[^:]+: c17003f8 umlsll za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h +[^:]+: c17f0018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h +[^:]+: c17e2338 umlsll za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h +[^:]+: c1e00018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e06018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e00019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^:]+: c1e003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h} +[^:]+: c1fe0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h} +[^:]+: c1f242d9 umlsll za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h} +[^:]+: c1e10018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e16018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h} +[^:]+: c1fd0018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h} +[^:]+: c1f96218 umlsll za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h} diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2.s b/gas/testsuite/gas/aarch64/sme2-i16i64-2.s new file mode 100644 index 0000000..8fc7015c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2.s @@ -0,0 +1,283 @@ + smlall za.d[w8, 0:3], z0.h, z0.h[0] + smlall za.d[w11, 0:3], z0.h, z0.h[0] + smlall za.d[w8, 12:15], z0.h, z0.h[0] + smlall za.d[w8, 0:3], z31.h, z0.h[0] + smlall za.d[w8, 0:3], z0.h, z15.h[0] + smlall za.d[w8, 0:3], z0.h, z0.h[7] + smlall za.d[w9, 8:11], z21.h, z9.h[3] + + smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0] + smlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0] + smlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0] + smlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0] + smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7] + smlall za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2] + + smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0] + smlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0] + smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0] + smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0] + smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7] + smlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6] + + smlall za.d[w8, 0:3], z0.h, z0.h + smlall za.d[w11, 0:3], z0.h, z0.h + smlall za.d[w8, 12:15], z0.h, z0.h + smlall za.d[w8, 0:3], z31.h, z0.h + smlall za.d[w8, 0:3], z0.h, z15.h + smlall za.d[w10, 4:7], z25.h, z7.h + + smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h + smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h + smlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h + smlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h + smlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h + smlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h + smlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h + smlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h + smlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h + + smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h + smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h + smlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h + smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h + smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h + smlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h + smlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h + smlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h + smlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h + smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h + smlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h + + smlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h } + smlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h } + smlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h } + smlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h } + + smlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h } + smlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h } + smlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h } + + smlsll za.d[w8, 0:3], z0.h, z0.h[0] + smlsll za.d[w11, 0:3], z0.h, z0.h[0] + smlsll za.d[w8, 12:15], z0.h, z0.h[0] + smlsll za.d[w8, 0:3], z31.h, z0.h[0] + smlsll za.d[w8, 0:3], z0.h, z15.h[0] + smlsll za.d[w8, 0:3], z0.h, z0.h[7] + smlsll za.d[w9, 8:11], z21.h, z9.h[3] + + smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0] + smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0] + smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0] + smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0] + smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0] + smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0] + smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7] + smlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2] + + smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0] + smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0] + smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0] + smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0] + smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0] + smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0] + smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7] + smlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6] + + smlsll za.d[w8, 0:3], z0.h, z0.h + smlsll za.d[w11, 0:3], z0.h, z0.h + smlsll za.d[w8, 12:15], z0.h, z0.h + smlsll za.d[w8, 0:3], z31.h, z0.h + smlsll za.d[w8, 0:3], z0.h, z15.h + smlsll za.d[w10, 4:7], z25.h, z7.h + + smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h + smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h + smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h + smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h + smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h + smlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h + smlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h + smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h + smlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h + + smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h + smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h + smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h + smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h + smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h + smlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h + smlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h + smlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h + smlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h + smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h + smlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h + + smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + smlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + smlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h } + smlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h } + smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h } + smlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h } + + smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + smlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + smlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h } + smlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h } + smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h } + smlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h } + + umlall za.d[w8, 0:3], z0.h, z0.h[0] + umlall za.d[w11, 0:3], z0.h, z0.h[0] + umlall za.d[w8, 12:15], z0.h, z0.h[0] + umlall za.d[w8, 0:3], z31.h, z0.h[0] + umlall za.d[w8, 0:3], z0.h, z15.h[0] + umlall za.d[w8, 0:3], z0.h, z0.h[7] + umlall za.d[w9, 8:11], z21.h, z9.h[3] + + umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0] + umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0] + umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0] + umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0] + umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0] + umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0] + umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7] + umlall za.d[w9, 4:7], { z18.h - z19.h }, z9.h[5] + + umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0] + umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0] + umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0] + umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0] + umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0] + umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0] + umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7] + umlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[1] + + umlall za.d[w8, 0:3], z0.h, z0.h + umlall za.d[w11, 0:3], z0.h, z0.h + umlall za.d[w8, 12:15], z0.h, z0.h + umlall za.d[w8, 0:3], z31.h, z0.h + umlall za.d[w8, 0:3], z0.h, z15.h + umlall za.d[w10, 4:7], z25.h, z7.h + + umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h + umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h + umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h + umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h + umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h + umlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h + umlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h + umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h + umlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h + + umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h + umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h + umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h + umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h + umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h + umlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h + umlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h + umlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h + umlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h + umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h + umlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h + + umlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + umlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + umlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h } + umlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h } + umlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h } + umlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h } + + umlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + umlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + umlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h } + umlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h } + umlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h } + umlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h } + + umlsll za.d[w8, 0:3], z0.h, z0.h[0] + umlsll za.d[w11, 0:3], z0.h, z0.h[0] + umlsll za.d[w8, 12:15], z0.h, z0.h[0] + umlsll za.d[w8, 0:3], z31.h, z0.h[0] + umlsll za.d[w8, 0:3], z0.h, z15.h[0] + umlsll za.d[w8, 0:3], z0.h, z0.h[7] + umlsll za.d[w9, 8:11], z21.h, z9.h[3] + + umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0] + umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0] + umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0] + umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0] + umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0] + umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0] + umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7] + umlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2] + + umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0] + umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0] + umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0] + umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0] + umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0] + umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0] + umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7] + umlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6] + + umlsll za.d[w8, 0:3], z0.h, z0.h + umlsll za.d[w11, 0:3], z0.h, z0.h + umlsll za.d[w8, 12:15], z0.h, z0.h + umlsll za.d[w8, 0:3], z31.h, z0.h + umlsll za.d[w8, 0:3], z0.h, z15.h + umlsll za.d[w10, 4:7], z25.h, z7.h + + umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h + umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h + umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h + umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h + umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h + umlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h + umlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h + umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h + umlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h + + umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h + umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h + umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h + umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h + umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h + umlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h + umlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h + umlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h + umlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h + umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h + umlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h + + umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + umlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h } + umlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h } + umlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h } + umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h } + umlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h } + + umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + umlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h } + umlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h } + umlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h } + umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h } + umlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h } |