RISC-V: Updated CSRs to privileged spec v1.12 and debug spec v1.0.

* Removed N extension CSRs,
ustatus, uie, utvec, uscratch, uepc, ucause, utval and uip.

* Removed two supervisor CSRs,
sedeleg and sideleg.

* Changed debug CSR address of scontext from 0x7aa to 0x5a8.  We cannot support
different versions of debug specs for now, so only supporting the latest one is
the only way to move forward.

* Added debug CSRs,
mscontext (0x7aa), mcontrol6 (0x7a1, tdata1) and tmexttrigger ((0x7a1, tdata1).

* Regarded hcontext as a debug CSR.

include/
	* opcode/riscv-opc.h: Updated CSRs to privileged spec v1.12 and
	debug spec v1.0.
gas/
	* testsuite/gas/riscv/csr.s: Updated CSRs to privileged spec v1.12
	and debug spec v1.0.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.

11 files changed, 288 insertions, 245 deletions

diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
index e4bb865..23ceba1 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
@@ -17,14 +17,6 @@ Contents of the .* section:
 #...
 [a-zA-Z0-9]+ [a-zA-Z0-9]+ [a-zA-Z0-9]+ FDE cie=00000000 pc=[a-zA-Z0-9]+\.\.[a-zA-Z0-9]+
   DW_CFA_advance_loc: 4 to 0+0000020
-  DW_CFA_offset_extended: r4096 \(ustatus\) at cfa\+0
-  DW_CFA_offset_extended_sf: r4100 \(uie\) at cfa\+16
-  DW_CFA_offset_extended_sf: r4101 \(utvec\) at cfa\+20
-  DW_CFA_offset_extended_sf: r4160 \(uscratch\) at cfa\+256
-  DW_CFA_offset_extended_sf: r4161 \(uepc\) at cfa\+260
-  DW_CFA_offset_extended_sf: r4162 \(ucause\) at cfa\+264
-  DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
-  DW_CFA_offset_extended_sf: r4164 \(uip\) at cfa\+272
   DW_CFA_offset_extended_sf: r7168 \(cycle\) at cfa\+12288
   DW_CFA_offset_extended_sf: r7169 \(time\) at cfa\+12292
   DW_CFA_offset_extended_sf: r7170 \(instret\) at cfa\+12296
@@ -90,8 +82,6 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r7326 \(hpmcounter30h\) at cfa\+12920
   DW_CFA_offset_extended_sf: r7327 \(hpmcounter31h\) at cfa\+12924
   DW_CFA_offset_extended_sf: r4352 \(sstatus\) at cfa\+1024
-  DW_CFA_offset_extended_sf: r4354 \(sedeleg\) at cfa\+1032
-  DW_CFA_offset_extended_sf: r4355 \(sideleg\) at cfa\+1036
   DW_CFA_offset_extended_sf: r4356 \(sie\) at cfa\+1040
   DW_CFA_offset_extended_sf: r4357 \(stvec\) at cfa\+1044
   DW_CFA_offset_extended_sf: r4358 \(scounteren\) at cfa\+1048
@@ -114,11 +104,7 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r4868 \(mie\) at cfa\+3088
   DW_CFA_offset_extended_sf: r4869 \(mtvec\) at cfa\+3092
   DW_CFA_offset_extended_sf: r4870 \(mcounteren\) at cfa\+3096
-  DW_CFA_offset_extended_sf: r4874 \(menvcfg\) at cfa\+3112
   DW_CFA_offset_extended_sf: r4880 \(mstatush\) at cfa\+3136
-  DW_CFA_offset_extended_sf: r4890 \(menvcfgh\) at cfa\+3176
-  DW_CFA_offset_extended_sf: r5959 \(mseccfg\) at cfa\+7452
-  DW_CFA_offset_extended_sf: r5975 \(mseccfgh\) at cfa\+7516
   DW_CFA_offset_extended_sf: r4928 \(mscratch\) at cfa\+3328
   DW_CFA_offset_extended_sf: r4929 \(mepc\) at cfa\+3332
   DW_CFA_offset_extended_sf: r4930 \(mcause\) at cfa\+3336
@@ -126,6 +112,10 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r4932 \(mip\) at cfa\+3344
   DW_CFA_offset_extended_sf: r4938 \(mtinst\) at cfa\+3368
   DW_CFA_offset_extended_sf: r4939 \(mtval2\) at cfa\+3372
+  DW_CFA_offset_extended_sf: r4874 \(menvcfg\) at cfa\+3112
+  DW_CFA_offset_extended_sf: r4890 \(menvcfgh\) at cfa\+3176
+  DW_CFA_offset_extended_sf: r5959 \(mseccfg\) at cfa\+7452
+  DW_CFA_offset_extended_sf: r5975 \(mseccfgh\) at cfa\+7516
   DW_CFA_offset_extended_sf: r5024 \(pmpcfg0\) at cfa\+3712
   DW_CFA_offset_extended_sf: r5025 \(pmpcfg1\) at cfa\+3716
   DW_CFA_offset_extended_sf: r5026 \(pmpcfg2\) at cfa\+3720
@@ -312,7 +302,6 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r5642 \(henvcfg\) at cfa\+6184
   DW_CFA_offset_extended_sf: r5658 \(henvcfgh\) at cfa\+6248
   DW_CFA_offset_extended_sf: r5760 \(hgatp\) at cfa\+6656
-  DW_CFA_offset_extended_sf: r5800 \(hcontext\) at cfa\+6816
   DW_CFA_offset_extended_sf: r5637 \(htimedelta\) at cfa\+6164
   DW_CFA_offset_extended_sf: r5653 \(htimedeltah\) at cfa\+6228
   DW_CFA_offset_extended_sf: r4608 \(vsstatus\) at cfa\+2048
@@ -337,6 +326,16 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r4997 \(mdbound\) at cfa\+3604
   DW_CFA_offset_extended_sf: r4897 \(mscounteren\) at cfa\+3204
   DW_CFA_offset_extended_sf: r4898 \(mhcounteren\) at cfa\+3208
+  DW_CFA_offset_extended: r4096 \(ustatus\) at cfa\+0
+  DW_CFA_offset_extended_sf: r4100 \(uie\) at cfa\+16
+  DW_CFA_offset_extended_sf: r4101 \(utvec\) at cfa\+20
+  DW_CFA_offset_extended_sf: r4160 \(uscratch\) at cfa\+256
+  DW_CFA_offset_extended_sf: r4161 \(uepc\) at cfa\+260
+  DW_CFA_offset_extended_sf: r4162 \(ucause\) at cfa\+264
+  DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
+  DW_CFA_offset_extended_sf: r4164 \(uip\) at cfa\+272
+  DW_CFA_offset_extended_sf: r4354 \(sedeleg\) at cfa\+1032
+  DW_CFA_offset_extended_sf: r4355 \(sideleg\) at cfa\+1036
   DW_CFA_offset_extended_sf: r4097 \(fflags\) at cfa\+4
   DW_CFA_offset_extended_sf: r4098 \(frm\) at cfa\+8
   DW_CFA_offset_extended_sf: r4099 \(fcsr\) at cfa\+12
@@ -351,8 +350,12 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r6051 \(tdata3\) at cfa\+7820
   DW_CFA_offset_extended_sf: r6052 \(tinfo\) at cfa\+7824
   DW_CFA_offset_extended_sf: r6053 \(tcontrol\) at cfa\+7828
+  DW_CFA_offset_extended_sf: r5800 \(hcontext\) at cfa\+6816
+  DW_CFA_offset_extended_sf: r5544 \(scontext\) at cfa\+5792
   DW_CFA_offset_extended_sf: r6056 \(mcontext\) at cfa\+7840
-  DW_CFA_offset_extended_sf: r6058 \(scontext\) at cfa\+7848
+  DW_CFA_offset_extended_sf: r6058 \(mscontext\) at cfa\+7848
+  DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
+  DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
   DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
   DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
   DW_CFA_offset_extended_sf: r6049 \(tdata1\) at cfa\+7812
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
index 34635d9..4a243ad 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
@@ -7,14 +7,7 @@
 _start:
 	.cfi_startproc
 	nop
-	.cfi_offset ustatus, 0
-	.cfi_offset uie, 16
-	.cfi_offset utvec, 20
-	.cfi_offset uscratch, 256
-	.cfi_offset uepc, 260
-	.cfi_offset ucause, 264
-	.cfi_offset utval, 268
-	.cfi_offset uip, 272
+	# user counters/timers
 	.cfi_offset cycle, 12288
 	.cfi_offset time, 12292
 	.cfi_offset instret, 12296
@@ -79,9 +72,8 @@ _start:
 	.cfi_offset hpmcounter29h, 12916
 	.cfi_offset hpmcounter30h, 12920
 	.cfi_offset hpmcounter31h, 12924
+	# supervisor
 	.cfi_offset sstatus, 1024
-	.cfi_offset sedeleg, 1032
-	.cfi_offset sideleg, 1036
 	.cfi_offset sie, 1040
 	.cfi_offset stvec, 1044
 	.cfi_offset scounteren, 1048
@@ -92,6 +84,7 @@ _start:
 	.cfi_offset stval, 1292
 	.cfi_offset sip, 1296
 	.cfi_offset satp, 1536
+	# machine
 	.cfi_offset mvendorid, 15428
 	.cfi_offset marchid, 15432
 	.cfi_offset mimpid, 15436
@@ -104,11 +97,7 @@ _start:
 	.cfi_offset mie, 3088
 	.cfi_offset mtvec, 3092
 	.cfi_offset mcounteren, 3096
-	.cfi_offset menvcfg, 3112
 	.cfi_offset mstatush, 3136
-	.cfi_offset menvcfgh, 3176
-	.cfi_offset mseccfg, 7452
-	.cfi_offset mseccfgh, 7516
 	.cfi_offset mscratch, 3328
 	.cfi_offset mepc, 3332
 	.cfi_offset mcause, 3336
@@ -116,6 +105,10 @@ _start:
 	.cfi_offset mip, 3344
 	.cfi_offset mtinst, 3368
 	.cfi_offset mtval2, 3372
+	.cfi_offset menvcfg, 3112
+	.cfi_offset menvcfgh, 3176
+	.cfi_offset mseccfg, 7452
+	.cfi_offset mseccfgh, 7516
 	.cfi_offset pmpcfg0, 3712
 	.cfi_offset pmpcfg1, 3716
 	.cfi_offset pmpcfg2, 3720
@@ -288,7 +281,7 @@ _start:
 	.cfi_offset mhpmevent29, 3316
 	.cfi_offset mhpmevent30, 3320
 	.cfi_offset mhpmevent31, 3324
-	# Hypervisor extension (Privileged Architecture, version 1.12)
+	# hypervisor
 	.cfi_offset hstatus, 6144
 	.cfi_offset hedeleg, 6152
 	.cfi_offset hideleg, 6156
@@ -303,7 +296,6 @@ _start:
 	.cfi_offset henvcfg, 6184
 	.cfi_offset henvcfgh, 6248
 	.cfi_offset hgatp, 6656
-	.cfi_offset hcontext, 6816
 	.cfi_offset htimedelta, 6164
 	.cfi_offset htimedeltah, 6228
 	.cfi_offset vsstatus, 2048
@@ -315,13 +307,12 @@ _start:
 	.cfi_offset vstval, 2316
 	.cfi_offset vsip, 2320
 	.cfi_offset vsatp, 2560
-	# dropped aliases
-	.cfi_offset ubadaddr, 268
-	.cfi_offset sbadaddr, 1292
-	.cfi_offset sptbr, 1536
-	.cfi_offset mbadaddr, 3340
-	.cfi_offset mucounteren, 3200
 	# dropped
+	.cfi_offset ubadaddr, 268	# aliases
+	.cfi_offset sbadaddr, 1292	# aliases
+	.cfi_offset sptbr, 1536		# aliases
+	.cfi_offset mbadaddr, 3340	# aliases
+	.cfi_offset mucounteren, 3200	# aliases
 	.cfi_offset mbase, 3584
 	.cfi_offset mbound, 3588
 	.cfi_offset mibase, 3592
@@ -330,6 +321,16 @@ _start:
 	.cfi_offset mdbound, 3604
 	.cfi_offset mscounteren, 3204
 	.cfi_offset mhcounteren, 3208
+	.cfi_offset ustatus, 0
+	.cfi_offset uie, 16
+	.cfi_offset utvec, 20
+	.cfi_offset uscratch, 256
+	.cfi_offset uepc, 260
+	.cfi_offset ucause, 264
+	.cfi_offset utval, 268
+	.cfi_offset uip, 272
+	.cfi_offset sedeleg, 1032
+	.cfi_offset sideleg, 1036
 	# unprivileged
 	.cfi_offset fflags, 4
 	.cfi_offset frm, 8
@@ -338,25 +339,25 @@ _start:
 	.cfi_offset dpc, 7876
 	.cfi_offset dscratch0, 7880
 	.cfi_offset dscratch1, 7884
-	# unprivileged alias
-	.cfi_offset dscratch, 7880
-	# unprivileged
+	.cfi_offset dscratch, 7880	# aliases
 	.cfi_offset tselect, 7808
 	.cfi_offset tdata1, 7812
 	.cfi_offset tdata2, 7816
 	.cfi_offset tdata3, 7820
 	.cfi_offset tinfo, 7824
 	.cfi_offset tcontrol, 7828
+	.cfi_offset hcontext, 6816
+	.cfi_offset scontext, 5792
 	.cfi_offset mcontext, 7840
-	.cfi_offset scontext, 7848
-	# aliases
-	.cfi_offset mcontrol, 7812
-	.cfi_offset icount, 7812
-	.cfi_offset itrigger, 7812
-	.cfi_offset etrigger, 7812
-	.cfi_offset textra32, 7820
-	.cfi_offset textra64, 7820
-	# unprivileged
+	.cfi_offset mscontext, 7848
+	.cfi_offset mcontrol, 7812	# aliases
+	.cfi_offset mcontrol6, 7812	# aliases
+	.cfi_offset icount, 7812	# aliases
+	.cfi_offset itrigger, 7812	# aliases
+	.cfi_offset etrigger, 7812	# aliases
+	.cfi_offset tmexttrigger, 7812	# aliases
+	.cfi_offset textra32, 7820	# aliases
+	.cfi_offset textra64, 7820	# aliases
 	.cfi_offset seed, 84
 	.cfi_offset vstart, 32
 	.cfi_offset vxsat, 36
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index ef4cb65..6e0d1f6 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -9,22 +9,6 @@
 Disassembly of section .text:
 
 0+000 <.text>:
-[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
-[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
-[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
-[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
-[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
-[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
-[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
-[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
-[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
-[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
-[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
-[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
-[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
-[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
 [ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
 [ 	]+[0-9a-f]+:[ 	]+c0059073[ 	]+csrw[ 	]+cycle,a1
 [ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
@@ -155,10 +139,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+c9f59073[ 	]+csrw[ 	]+hpmcounter31h,a1
 [ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
 [ 	]+[0-9a-f]+:[ 	]+10059073[ 	]+csrw[ 	]+sstatus,a1
-[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
-[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
-[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
-[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
 [ 	]+[0-9a-f]+:[ 	]+10459073[ 	]+csrw[ 	]+sie,a1
 [ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
@@ -203,16 +183,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+30559073[ 	]+csrw[ 	]+mtvec,a1
 [ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
 [ 	]+[0-9a-f]+:[ 	]+30659073[ 	]+csrw[ 	]+mcounteren,a1
-[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
-[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
 [ 	]+[0-9a-f]+:[ 	]+31002573[ 	]+csrr[ 	]+a0,0x310
 [ 	]+[0-9a-f]+:[ 	]+31059073[ 	]+csrw[ 	]+0x310,a1
-[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
-[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
-[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
-[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
-[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
-[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
 [ 	]+[0-9a-f]+:[ 	]+34059073[ 	]+csrw[ 	]+mscratch,a1
 [ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
@@ -227,6 +199,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+34a59073[ 	]+csrw[ 	]+0x34a,a1
 [ 	]+[0-9a-f]+:[ 	]+34b02573[ 	]+csrr[ 	]+a0,0x34b
 [ 	]+[0-9a-f]+:[ 	]+34b59073[ 	]+csrw[ 	]+0x34b,a1
+[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
+[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
+[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
+[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
+[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
+[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
+[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
+[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
 [ 	]+[0-9a-f]+:[ 	]+3a059073[ 	]+csrw[ 	]+pmpcfg0,a1
 [ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
@@ -599,8 +579,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+61a59073[ 	]+csrw[ 	]+0x61a,a1
 [ 	]+[0-9a-f]+:[ 	]+68002573[ 	]+csrr[ 	]+a0,0x680
 [ 	]+[0-9a-f]+:[ 	]+68059073[ 	]+csrw[ 	]+0x680,a1
-[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,0x6a8
-[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+0x6a8,a1
 [ 	]+[0-9a-f]+:[ 	]+60502573[ 	]+csrr[ 	]+a0,0x605
 [ 	]+[0-9a-f]+:[ 	]+60559073[ 	]+csrw[ 	]+0x605,a1
 [ 	]+[0-9a-f]+:[ 	]+61502573[ 	]+csrr[ 	]+a0,0x615
@@ -649,6 +627,26 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+32159073[ 	]+csrw[ 	]+0x321,a1
 [ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,0x322
 [ 	]+[0-9a-f]+:[ 	]+32259073[ 	]+csrw[ 	]+0x322,a1
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+csrr[ 	]+a0,fflags
 [ 	]+[0-9a-f]+:[ 	]+00159073[ 	]+csrw[ 	]+fflags,a1
 [ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+csrr[ 	]+a0,frm
@@ -677,10 +675,18 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+7a459073[ 	]+csrw[ 	]+tinfo,a1
 [ 	]+[0-9a-f]+:[ 	]+7a502573[ 	]+csrr[ 	]+a0,tcontrol
 [ 	]+[0-9a-f]+:[ 	]+7a559073[ 	]+csrw[ 	]+tcontrol,a1
+[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,hcontext
+[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+hcontext,a1
+[ 	]+[0-9a-f]+:[ 	]+5a802573[ 	]+csrr[ 	]+a0,scontext
+[ 	]+[0-9a-f]+:[ 	]+5a859073[ 	]+csrw[ 	]+scontext,a1
 [ 	]+[0-9a-f]+:[ 	]+7a802573[ 	]+csrr[ 	]+a0,mcontext
 [ 	]+[0-9a-f]+:[ 	]+7a859073[ 	]+csrw[ 	]+mcontext,a1
-[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,scontext
-[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+scontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,mscontext
+[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+mscontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
 [ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index c0cb2d5..4623ef5 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -136,12 +136,16 @@
 .*Warning: invalid CSR `mconfigptr' for the privileged spec `1.10'
 .*Warning: invalid CSR `mconfigptr' for the privileged spec `1.10'
 .*Warning: read-only CSR is written `csrw mconfigptr,a1'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.10'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.10'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.10'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.10'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.10'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.10'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.10'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.10'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.10'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.10'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
 .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.10'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
@@ -152,10 +156,6 @@
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.10'
 .*Warning: invalid CSR `mseccfgh' for the current ISA
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.10'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.10'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.10'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.10'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.10'
 .*Warning: invalid CSR `pmpcfg1' for the current ISA
 .*Warning: invalid CSR `pmpcfg1' for the current ISA
 .*Warning: invalid CSR `pmpcfg3' for the current ISA
@@ -387,8 +387,6 @@
 .*Warning: invalid CSR `henvcfgh' for the privileged spec `1.10'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.10'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.10'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.10'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.10'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.10'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.10'
 .*Warning: invalid CSR `htimedeltah' for the current ISA
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index a8586d9..0c91665 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -9,22 +9,6 @@
 Disassembly of section .text:
 
 0+000 <.text>:
-[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
-[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
-[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
-[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
-[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
-[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
-[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
-[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
-[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
-[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
-[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
-[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
-[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
-[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
 [ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
 [ 	]+[0-9a-f]+:[ 	]+c0059073[ 	]+csrw[ 	]+cycle,a1
 [ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
@@ -155,10 +139,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+c9f59073[ 	]+csrw[ 	]+hpmcounter31h,a1
 [ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
 [ 	]+[0-9a-f]+:[ 	]+10059073[ 	]+csrw[ 	]+sstatus,a1
-[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
-[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
-[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
-[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
 [ 	]+[0-9a-f]+:[ 	]+10459073[ 	]+csrw[ 	]+sie,a1
 [ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
@@ -203,16 +183,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+30559073[ 	]+csrw[ 	]+mtvec,a1
 [ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
 [ 	]+[0-9a-f]+:[ 	]+30659073[ 	]+csrw[ 	]+mcounteren,a1
-[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
-[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
 [ 	]+[0-9a-f]+:[ 	]+31002573[ 	]+csrr[ 	]+a0,0x310
 [ 	]+[0-9a-f]+:[ 	]+31059073[ 	]+csrw[ 	]+0x310,a1
-[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
-[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
-[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
-[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
-[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
-[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
 [ 	]+[0-9a-f]+:[ 	]+34059073[ 	]+csrw[ 	]+mscratch,a1
 [ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
@@ -227,6 +199,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+34a59073[ 	]+csrw[ 	]+0x34a,a1
 [ 	]+[0-9a-f]+:[ 	]+34b02573[ 	]+csrr[ 	]+a0,0x34b
 [ 	]+[0-9a-f]+:[ 	]+34b59073[ 	]+csrw[ 	]+0x34b,a1
+[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
+[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
+[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
+[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
+[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
+[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
+[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
+[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
 [ 	]+[0-9a-f]+:[ 	]+3a059073[ 	]+csrw[ 	]+pmpcfg0,a1
 [ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
@@ -599,8 +579,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+61a59073[ 	]+csrw[ 	]+0x61a,a1
 [ 	]+[0-9a-f]+:[ 	]+68002573[ 	]+csrr[ 	]+a0,0x680
 [ 	]+[0-9a-f]+:[ 	]+68059073[ 	]+csrw[ 	]+0x680,a1
-[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,0x6a8
-[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+0x6a8,a1
 [ 	]+[0-9a-f]+:[ 	]+60502573[ 	]+csrr[ 	]+a0,0x605
 [ 	]+[0-9a-f]+:[ 	]+60559073[ 	]+csrw[ 	]+0x605,a1
 [ 	]+[0-9a-f]+:[ 	]+61502573[ 	]+csrr[ 	]+a0,0x615
@@ -649,6 +627,26 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+32159073[ 	]+csrw[ 	]+0x321,a1
 [ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,0x322
 [ 	]+[0-9a-f]+:[ 	]+32259073[ 	]+csrw[ 	]+0x322,a1
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
+[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+csrr[ 	]+a0,fflags
 [ 	]+[0-9a-f]+:[ 	]+00159073[ 	]+csrw[ 	]+fflags,a1
 [ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+csrr[ 	]+a0,frm
@@ -677,10 +675,18 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+7a459073[ 	]+csrw[ 	]+tinfo,a1
 [ 	]+[0-9a-f]+:[ 	]+7a502573[ 	]+csrr[ 	]+a0,tcontrol
 [ 	]+[0-9a-f]+:[ 	]+7a559073[ 	]+csrw[ 	]+tcontrol,a1
+[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,hcontext
+[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+hcontext,a1
+[ 	]+[0-9a-f]+:[ 	]+5a802573[ 	]+csrr[ 	]+a0,scontext
+[ 	]+[0-9a-f]+:[ 	]+5a859073[ 	]+csrw[ 	]+scontext,a1
 [ 	]+[0-9a-f]+:[ 	]+7a802573[ 	]+csrr[ 	]+a0,mcontext
 [ 	]+[0-9a-f]+:[ 	]+7a859073[ 	]+csrw[ 	]+mcontext,a1
-[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,scontext
-[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+scontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,mscontext
+[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+mscontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
 [ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index 36ca02a..928fd17 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -136,12 +136,16 @@
 .*Warning: invalid CSR `mconfigptr' for the privileged spec `1.11'
 .*Warning: invalid CSR `mconfigptr' for the privileged spec `1.11'
 .*Warning: read-only CSR is written `csrw mconfigptr,a1'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.11'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.11'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.11'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.11'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.11'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.11'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.11'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.11'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.11'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.11'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
 .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.11'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
@@ -152,10 +156,6 @@
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.11'
 .*Warning: invalid CSR `mseccfgh' for the current ISA
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.11'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.11'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.11'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.11'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.11'
 .*Warning: invalid CSR `pmpcfg1' for the current ISA
 .*Warning: invalid CSR `pmpcfg1' for the current ISA
 .*Warning: invalid CSR `pmpcfg3' for the current ISA
@@ -385,8 +385,6 @@
 .*Warning: invalid CSR `henvcfgh' for the privileged spec `1.11'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.11'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.11'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.11'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.11'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.11'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.11'
 .*Warning: invalid CSR `htimedeltah' for the current ISA
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index 8281910..3c27ca2 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -9,22 +9,6 @@
 Disassembly of section .text:
 
 0+000 <.text>:
-[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
-[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
-[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
-[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
-[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
-[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
-[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
-[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
-[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
-[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
-[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
-[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
-[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
-[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
 [ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
 [ 	]+[0-9a-f]+:[ 	]+c0059073[ 	]+csrw[ 	]+cycle,a1
 [ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
@@ -155,10 +139,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+c9f59073[ 	]+csrw[ 	]+hpmcounter31h,a1
 [ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
 [ 	]+[0-9a-f]+:[ 	]+10059073[ 	]+csrw[ 	]+sstatus,a1
-[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
-[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
-[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
-[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
 [ 	]+[0-9a-f]+:[ 	]+10459073[ 	]+csrw[ 	]+sie,a1
 [ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
@@ -203,16 +183,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+30559073[ 	]+csrw[ 	]+mtvec,a1
 [ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,mcounteren
 [ 	]+[0-9a-f]+:[ 	]+30659073[ 	]+csrw[ 	]+mcounteren,a1
-[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,menvcfg
-[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+menvcfg,a1
 [ 	]+[0-9a-f]+:[ 	]+31002573[ 	]+csrr[ 	]+a0,mstatush
 [ 	]+[0-9a-f]+:[ 	]+31059073[ 	]+csrw[ 	]+mstatush,a1
-[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,menvcfgh
-[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+menvcfgh,a1
-[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,mseccfg
-[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+mseccfg,a1
-[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,mseccfgh
-[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+mseccfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
 [ 	]+[0-9a-f]+:[ 	]+34059073[ 	]+csrw[ 	]+mscratch,a1
 [ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
@@ -227,6 +199,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+34a59073[ 	]+csrw[ 	]+mtinst,a1
 [ 	]+[0-9a-f]+:[ 	]+34b02573[ 	]+csrr[ 	]+a0,mtval2
 [ 	]+[0-9a-f]+:[ 	]+34b59073[ 	]+csrw[ 	]+mtval2,a1
+[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,menvcfg
+[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+menvcfg,a1
+[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,menvcfgh
+[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+menvcfgh,a1
+[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,mseccfg
+[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+mseccfg,a1
+[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,mseccfgh
+[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+mseccfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,pmpcfg0
 [ 	]+[0-9a-f]+:[ 	]+3a059073[ 	]+csrw[ 	]+pmpcfg0,a1
 [ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,pmpcfg1
@@ -599,8 +579,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+61a59073[ 	]+csrw[ 	]+henvcfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+68002573[ 	]+csrr[ 	]+a0,hgatp
 [ 	]+[0-9a-f]+:[ 	]+68059073[ 	]+csrw[ 	]+hgatp,a1
-[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,hcontext
-[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+hcontext,a1
 [ 	]+[0-9a-f]+:[ 	]+60502573[ 	]+csrr[ 	]+a0,htimedelta
 [ 	]+[0-9a-f]+:[ 	]+60559073[ 	]+csrw[ 	]+htimedelta,a1
 [ 	]+[0-9a-f]+:[ 	]+61502573[ 	]+csrr[ 	]+a0,htimedeltah
@@ -623,8 +601,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+24459073[ 	]+csrw[ 	]+vsip,a1
 [ 	]+[0-9a-f]+:[ 	]+28002573[ 	]+csrr[ 	]+a0,vsatp
 [ 	]+[0-9a-f]+:[ 	]+28059073[ 	]+csrw[ 	]+vsatp,a1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
-[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,0x43
+[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+0x43,a1
 [ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
 [ 	]+[0-9a-f]+:[ 	]+14359073[ 	]+csrw[ 	]+stval,a1
 [ 	]+[0-9a-f]+:[ 	]+18002573[ 	]+csrr[ 	]+a0,satp
@@ -649,6 +627,26 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+32159073[ 	]+csrw[ 	]+0x321,a1
 [ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,0x322
 [ 	]+[0-9a-f]+:[ 	]+32259073[ 	]+csrw[ 	]+0x322,a1
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,0x0
+[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+0x0,a1
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,0x4
+[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+0x4,a1
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,0x5
+[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+0x5,a1
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,0x40
+[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+0x40,a1
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,0x41
+[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+0x41,a1
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,0x42
+[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+0x42,a1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,0x43
+[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+0x43,a1
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,0x44
+[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+0x44,a1
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,0x102
+[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+0x102,a1
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,0x103
+[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+0x103,a1
 [ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+csrr[ 	]+a0,fflags
 [ 	]+[0-9a-f]+:[ 	]+00159073[ 	]+csrw[ 	]+fflags,a1
 [ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+csrr[ 	]+a0,frm
@@ -677,10 +675,18 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+7a459073[ 	]+csrw[ 	]+tinfo,a1
 [ 	]+[0-9a-f]+:[ 	]+7a502573[ 	]+csrr[ 	]+a0,tcontrol
 [ 	]+[0-9a-f]+:[ 	]+7a559073[ 	]+csrw[ 	]+tcontrol,a1
+[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,hcontext
+[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+hcontext,a1
+[ 	]+[0-9a-f]+:[ 	]+5a802573[ 	]+csrr[ 	]+a0,scontext
+[ 	]+[0-9a-f]+:[ 	]+5a859073[ 	]+csrw[ 	]+scontext,a1
 [ 	]+[0-9a-f]+:[ 	]+7a802573[ 	]+csrr[ 	]+a0,mcontext
 [ 	]+[0-9a-f]+:[ 	]+7a859073[ 	]+csrw[ 	]+mcontext,a1
-[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,scontext
-[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+scontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,mscontext
+[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+mscontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
 [ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index 387c6e2..8f173e7 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -247,6 +247,26 @@
 .*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
 .*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
 .*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
+.*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
+.*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
+.*Warning: invalid CSR `uie' for the privileged spec `1.12'
+.*Warning: invalid CSR `uie' for the privileged spec `1.12'
+.*Warning: invalid CSR `utvec' for the privileged spec `1.12'
+.*Warning: invalid CSR `utvec' for the privileged spec `1.12'
+.*Warning: invalid CSR `uscratch' for the privileged spec `1.12'
+.*Warning: invalid CSR `uscratch' for the privileged spec `1.12'
+.*Warning: invalid CSR `uepc' for the privileged spec `1.12'
+.*Warning: invalid CSR `uepc' for the privileged spec `1.12'
+.*Warning: invalid CSR `ucause' for the privileged spec `1.12'
+.*Warning: invalid CSR `ucause' for the privileged spec `1.12'
+.*Warning: invalid CSR `utval' for the privileged spec `1.12'
+.*Warning: invalid CSR `utval' for the privileged spec `1.12'
+.*Warning: invalid CSR `uip' for the privileged spec `1.12'
+.*Warning: invalid CSR `uip' for the privileged spec `1.12'
+.*Warning: invalid CSR `sedeleg' for the privileged spec `1.12'
+.*Warning: invalid CSR `sedeleg' for the privileged spec `1.12'
+.*Warning: invalid CSR `sideleg' for the privileged spec `1.12'
+.*Warning: invalid CSR `sideleg' for the privileged spec `1.12'
 .*Warning: invalid CSR `fflags' for the current ISA
 .*Warning: invalid CSR `fflags' for the current ISA
 .*Warning: invalid CSR `frm' for the current ISA
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
index f5af018..d0841df 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
@@ -9,22 +9,6 @@
 Disassembly of section .text:
 
 0+000 <.text>:
-[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
-[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
-[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
-[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
-[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
-[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
-[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
-[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
-[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
-[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
-[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
-[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
-[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
-[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+ubadaddr,a1
-[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
-[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
 [ 	]+[0-9a-f]+:[ 	]+c0002573[ 	]+rdcycle[ 	]+a0
 [ 	]+[0-9a-f]+:[ 	]+c0059073[ 	]+csrw[ 	]+cycle,a1
 [ 	]+[0-9a-f]+:[ 	]+c0102573[ 	]+rdtime[ 	]+a0
@@ -155,10 +139,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+c9f59073[ 	]+csrw[ 	]+hpmcounter31h,a1
 [ 	]+[0-9a-f]+:[ 	]+10002573[ 	]+csrr[ 	]+a0,sstatus
 [ 	]+[0-9a-f]+:[ 	]+10059073[ 	]+csrw[ 	]+sstatus,a1
-[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
-[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
-[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
-[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+10402573[ 	]+csrr[ 	]+a0,sie
 [ 	]+[0-9a-f]+:[ 	]+10459073[ 	]+csrw[ 	]+sie,a1
 [ 	]+[0-9a-f]+:[ 	]+10502573[ 	]+csrr[ 	]+a0,stvec
@@ -203,16 +183,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+30559073[ 	]+csrw[ 	]+mtvec,a1
 [ 	]+[0-9a-f]+:[ 	]+30602573[ 	]+csrr[ 	]+a0,0x306
 [ 	]+[0-9a-f]+:[ 	]+30659073[ 	]+csrw[ 	]+0x306,a1
-[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
-[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
 [ 	]+[0-9a-f]+:[ 	]+31002573[ 	]+csrr[ 	]+a0,0x310
 [ 	]+[0-9a-f]+:[ 	]+31059073[ 	]+csrw[ 	]+0x310,a1
-[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
-[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
-[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
-[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
-[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
-[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+34002573[ 	]+csrr[ 	]+a0,mscratch
 [ 	]+[0-9a-f]+:[ 	]+34059073[ 	]+csrw[ 	]+mscratch,a1
 [ 	]+[0-9a-f]+:[ 	]+34102573[ 	]+csrr[ 	]+a0,mepc
@@ -227,6 +199,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+34a59073[ 	]+csrw[ 	]+0x34a,a1
 [ 	]+[0-9a-f]+:[ 	]+34b02573[ 	]+csrr[ 	]+a0,0x34b
 [ 	]+[0-9a-f]+:[ 	]+34b59073[ 	]+csrw[ 	]+0x34b,a1
+[ 	]+[0-9a-f]+:[ 	]+30a02573[ 	]+csrr[ 	]+a0,0x30a
+[ 	]+[0-9a-f]+:[ 	]+30a59073[ 	]+csrw[ 	]+0x30a,a1
+[ 	]+[0-9a-f]+:[ 	]+31a02573[ 	]+csrr[ 	]+a0,0x31a
+[ 	]+[0-9a-f]+:[ 	]+31a59073[ 	]+csrw[ 	]+0x31a,a1
+[ 	]+[0-9a-f]+:[ 	]+74702573[ 	]+csrr[ 	]+a0,0x747
+[ 	]+[0-9a-f]+:[ 	]+74759073[ 	]+csrw[ 	]+0x747,a1
+[ 	]+[0-9a-f]+:[ 	]+75702573[ 	]+csrr[ 	]+a0,0x757
+[ 	]+[0-9a-f]+:[ 	]+75759073[ 	]+csrw[ 	]+0x757,a1
 [ 	]+[0-9a-f]+:[ 	]+3a002573[ 	]+csrr[ 	]+a0,0x3a0
 [ 	]+[0-9a-f]+:[ 	]+3a059073[ 	]+csrw[ 	]+0x3a0,a1
 [ 	]+[0-9a-f]+:[ 	]+3a102573[ 	]+csrr[ 	]+a0,0x3a1
@@ -599,8 +579,6 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+61a59073[ 	]+csrw[ 	]+0x61a,a1
 [ 	]+[0-9a-f]+:[ 	]+68002573[ 	]+csrr[ 	]+a0,0x680
 [ 	]+[0-9a-f]+:[ 	]+68059073[ 	]+csrw[ 	]+0x680,a1
-[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,0x6a8
-[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+0x6a8,a1
 [ 	]+[0-9a-f]+:[ 	]+60502573[ 	]+csrr[ 	]+a0,0x605
 [ 	]+[0-9a-f]+:[ 	]+60559073[ 	]+csrw[ 	]+0x605,a1
 [ 	]+[0-9a-f]+:[ 	]+61502573[ 	]+csrr[ 	]+a0,0x615
@@ -649,6 +627,26 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+32159073[ 	]+csrw[ 	]+mscounteren,a1
 [ 	]+[0-9a-f]+:[ 	]+32202573[ 	]+csrr[ 	]+a0,mhcounteren
 [ 	]+[0-9a-f]+:[ 	]+32259073[ 	]+csrw[ 	]+mhcounteren,a1
+[ 	]+[0-9a-f]+:[ 	]+00002573[ 	]+csrr[ 	]+a0,ustatus
+[ 	]+[0-9a-f]+:[ 	]+00059073[ 	]+csrw[ 	]+ustatus,a1
+[ 	]+[0-9a-f]+:[ 	]+00402573[ 	]+csrr[ 	]+a0,uie
+[ 	]+[0-9a-f]+:[ 	]+00459073[ 	]+csrw[ 	]+uie,a1
+[ 	]+[0-9a-f]+:[ 	]+00502573[ 	]+csrr[ 	]+a0,utvec
+[ 	]+[0-9a-f]+:[ 	]+00559073[ 	]+csrw[ 	]+utvec,a1
+[ 	]+[0-9a-f]+:[ 	]+04002573[ 	]+csrr[ 	]+a0,uscratch
+[ 	]+[0-9a-f]+:[ 	]+04059073[ 	]+csrw[ 	]+uscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+04102573[ 	]+csrr[ 	]+a0,uepc
+[ 	]+[0-9a-f]+:[ 	]+04159073[ 	]+csrw[ 	]+uepc,a1
+[ 	]+[0-9a-f]+:[ 	]+04202573[ 	]+csrr[ 	]+a0,ucause
+[ 	]+[0-9a-f]+:[ 	]+04259073[ 	]+csrw[ 	]+ucause,a1
+[ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
+[ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+ubadaddr,a1
+[ 	]+[0-9a-f]+:[ 	]+04402573[ 	]+csrr[ 	]+a0,uip
+[ 	]+[0-9a-f]+:[ 	]+04459073[ 	]+csrw[ 	]+uip,a1
+[ 	]+[0-9a-f]+:[ 	]+10202573[ 	]+csrr[ 	]+a0,sedeleg
+[ 	]+[0-9a-f]+:[ 	]+10259073[ 	]+csrw[ 	]+sedeleg,a1
+[ 	]+[0-9a-f]+:[ 	]+10302573[ 	]+csrr[ 	]+a0,sideleg
+[ 	]+[0-9a-f]+:[ 	]+10359073[ 	]+csrw[ 	]+sideleg,a1
 [ 	]+[0-9a-f]+:[ 	]+00102573[ 	]+csrr[ 	]+a0,fflags
 [ 	]+[0-9a-f]+:[ 	]+00159073[ 	]+csrw[ 	]+fflags,a1
 [ 	]+[0-9a-f]+:[ 	]+00202573[ 	]+csrr[ 	]+a0,frm
@@ -677,10 +675,18 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+7a459073[ 	]+csrw[ 	]+tinfo,a1
 [ 	]+[0-9a-f]+:[ 	]+7a502573[ 	]+csrr[ 	]+a0,tcontrol
 [ 	]+[0-9a-f]+:[ 	]+7a559073[ 	]+csrw[ 	]+tcontrol,a1
+[ 	]+[0-9a-f]+:[ 	]+6a802573[ 	]+csrr[ 	]+a0,hcontext
+[ 	]+[0-9a-f]+:[ 	]+6a859073[ 	]+csrw[ 	]+hcontext,a1
+[ 	]+[0-9a-f]+:[ 	]+5a802573[ 	]+csrr[ 	]+a0,scontext
+[ 	]+[0-9a-f]+:[ 	]+5a859073[ 	]+csrw[ 	]+scontext,a1
 [ 	]+[0-9a-f]+:[ 	]+7a802573[ 	]+csrr[ 	]+a0,mcontext
 [ 	]+[0-9a-f]+:[ 	]+7a859073[ 	]+csrw[ 	]+mcontext,a1
-[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,scontext
-[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+scontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7aa02573[ 	]+csrr[ 	]+a0,mscontext
+[ 	]+[0-9a-f]+:[ 	]+7aa59073[ 	]+csrw[ 	]+mscontext,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
+[ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
+[ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
 [ 	]+[0-9a-f]+:[ 	]+7a159073[ 	]+csrw[ 	]+tdata1,a1
 [ 	]+[0-9a-f]+:[ 	]+7a102573[ 	]+csrr[ 	]+a0,tdata1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
index ca50442..5fe87a1 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
@@ -1,6 +1,4 @@
 .*Assembler messages:
-.*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
 .*Warning: read-only CSR is written `csrw cycle,a1'
 .*Warning: read-only CSR is written `csrw time,a1'
 .*Warning: read-only CSR is written `csrw instret,a1'
@@ -146,12 +144,18 @@
 .*Warning: read-only CSR is written `csrw mconfigptr,a1'
 .*Warning: invalid CSR `mcounteren' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `mcounteren' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `menvcfg' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `mstatush' for the current ISA
 .*Warning: invalid CSR `mstatush' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtval' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtval' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtinst' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `mtval2' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `menvcfg' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
 .*Warning: invalid CSR `menvcfgh' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `menvcfgh' for the current ISA
@@ -162,12 +166,6 @@
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `mseccfgh' for the current ISA
 .*Warning: invalid CSR `mseccfgh' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtval' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtval' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtinst' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `mtval2' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `pmpcfg0' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `pmpcfg0' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `pmpcfg1' for the current ISA
@@ -439,8 +437,6 @@
 .*Warning: invalid CSR `henvcfgh' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `hgatp' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.9.1'
-.*Warning: invalid CSR `hcontext' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `htimedelta' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `htimedeltah' for the current ISA
@@ -465,6 +461,8 @@
 .*Warning: invalid CSR `vsip' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `vsatp' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `vsatp' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
+.*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `fflags' for the current ISA
 .*Warning: invalid CSR `fflags' for the current ISA
 .*Warning: invalid CSR `frm' for the current ISA
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index cbb0e23..0d0ec71 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -3,19 +3,7 @@
 	csrw \val, a1
 	.endm
 
-	# Supported privileged specs from 1.9.1 to 1.11
-
-	# User Trap Setup
-	csr ustatus
-	csr uie
-	csr utvec
-
-	# User Trap Handling
-	csr uscratch
-	csr uepc
-	csr ucause
-	csr utval		# Added in 1.10
-	csr uip
+	# Supported privileged specs, 1.9.1, 1.10, 1.11 and 1.12.
 
 	# User Counter/Timers
 	csr cycle
@@ -85,11 +73,11 @@
 
 	# Supervisor Trap Setup
 	csr sstatus
-	csr sedeleg
-	csr sideleg
 	csr sie
 	csr stvec
 	csr scounteren		# Added in 1.10
+
+	# Supervisor Configuration
 	csr senvcfg		# Added in 1.12
 
 	# Supervisor Trap Handling
@@ -117,11 +105,7 @@
 	csr mie
 	csr mtvec
 	csr mcounteren		# Added in 1.10
-	csr menvcfg		# Added in 1.12
 	csr mstatush		# Added in 1.12
-	csr menvcfgh		# Added in 1.12
-	csr mseccfg		# Added in 1.12
-	csr mseccfgh		# Added in 1.12
 
 	# Machine Trap Handling
 	csr mscratch
@@ -132,6 +116,12 @@
 	csr mtinst		# Added in 1.12
 	csr mtval2		# Added in 1.12
 
+	# Machine Configuration
+	csr menvcfg		# Added in 1.12
+	csr menvcfgh		# Added in 1.12
+	csr mseccfg		# Added in 1.12
+	csr mseccfgh		# Added in 1.12
+
 	# Machine Memory Protection
 	csr pmpcfg0		# Added in 1.10
 	csr pmpcfg1		# Added in 1.10
@@ -310,7 +300,7 @@
 	csr mhpmevent30
 	csr mhpmevent31
 
-	# Hypervisor Trap Setup (1.12)
+	# Hypervisor Trap Setup
 	csr hstatus
 	csr hedeleg
 	csr hideleg
@@ -318,28 +308,25 @@
 	csr hcounteren
 	csr hgeie
 
-	# Hypervisor Trap Handling (1.12)
+	# Hypervisor Trap Handling
 	csr htval
 	csr hip
 	csr hvip
 	csr htinst
 	csr hgeip
 
-	# Hypervisor Configuration (1.12)
+	# Hypervisor Configuration
 	csr henvcfg
 	csr henvcfgh
 
-	# Hypervisor Protection and Translation (1.12)
+	# Hypervisor Protection and Translation
 	csr hgatp
 
-	# Debug/Trace Registers
-	csr hcontext
-
-	# Hypervisor Counter/Timer Virtualization Registers (1.12)
+	# Hypervisor Counter/Timer Virtualization Registers
 	csr htimedelta
 	csr htimedeltah
 
-	# Virtual Supervisor Registers (1.12)
+	# Virtual Supervisor Registers
 	csr vsstatus
 	csr vsie
 	csr vstvec
@@ -357,14 +344,24 @@
 	csr sptbr		# 0x180 in 1.9.1, but the value is satp since 1.10
 	csr mbadaddr		# 0x343 in 1.9.1, but the value is mtval since 1.10
 	csr mucounteren		# 0x320 in 1.9.1, dropped in 1.10, but the value is mcountinhibit since 1.11
-	csr mbase		# 0x380, dropped in 1.10
-	csr mbound		# 0x381, dropped in 1.10
-	csr mibase		# 0x382, dropped in 1.10
-	csr mibound		# 0x383, dropped in 1.10
-	csr mdbase		# 0x384, dropped in 1.10
-	csr mdbound		# 0x385, dropped in 1.10
-	csr mscounteren		# 0x321, dropped in 1.10
-	csr mhcounteren		# 0x322, dropped in 1.10
+	csr mbase		# 0x380 in 1.9.1, dropped in 1.10
+	csr mbound		# 0x381 in 1.9.1, dropped in 1.10
+	csr mibase		# 0x382 in 1.9.1, dropped in 1.10
+	csr mibound		# 0x383 in 1.9.1, dropped in 1.10
+	csr mdbase		# 0x384 in 1.9.1, dropped in 1.10
+	csr mdbound		# 0x385 in 1.9.1, dropped in 1.10
+	csr mscounteren		# 0x321 in 1.9.1, dropped in 1.10
+	csr mhcounteren		# 0x322 in 1.9.1, dropped in 1.10
+	csr ustatus		# 0x0   in 1.9.1, dropped in 1.12
+	csr uie			# 0x4   in 1.9.1, dropped in 1.12
+	csr utvec		# 0x5   in 1.9.1, dropped in 1.12
+	csr uscratch		# 0x40  in 1.9.1, dropped in 1.12
+	csr uepc		# 0x41  in 1.9.1, dropped in 1.12
+	csr ucause		# 0x42  in 1.9.1, dropped in 1.12
+	csr utval		# 0x43  in 1.10,  dropped in 1.12
+	csr uip			# 0x44  in 1.9.1, dropped in 1.12
+	csr sedeleg		# 0x102 in 1.9.1, dropped in 1.12
+	csr sideleg		# 0x103 in 1.9.1, dropped in 1.12
 
 	# Unprivileged CSR which are not controlled by privilege spec
 
@@ -387,12 +384,16 @@
 	csr tdata3
 	csr tinfo
 	csr tcontrol
-	csr mcontext
+	csr hcontext
 	csr scontext
+	csr mcontext
+	csr mscontext
 	csr mcontrol		# 0x7a1, alias to tdata1
+	csr mcontrol6		# 0x7a1, alias to tdata1
 	csr icount		# 0x7a1, alias to tdata1
 	csr itrigger		# 0x7a1, alias to tdata1
 	csr etrigger		# 0x7a1, alias to tdata1
+	csr tmexttrigger	# 0x7a1, alias to tdata1
 	csr textra32		# 0x7a3, alias to tdata3
 	csr textra64		# 0x7a3, alias to tdata3