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author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2016-07-01 16:20:50 +0100 |
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committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2016-07-01 16:50:59 +0100 |
commit | 93d8990cba700abdf9d2be06a5022e588d097fc8 (patch) | |
tree | 4e26591d6134671659c2bea61ec81f3c50452662 /gas/testsuite | |
parent | 2c5c2a3321706c28cbf1b85a970a2e32912eb0c8 (diff) | |
download | gdb-93d8990cba700abdf9d2be06a5022e588d097fc8.zip gdb-93d8990cba700abdf9d2be06a5022e588d097fc8.tar.gz gdb-93d8990cba700abdf9d2be06a5022e588d097fc8.tar.bz2 |
[AArch64] Fix +nofp16 handling
Feature flag handling was not perfect, +nofp16 disabled fp
instructions too.
New feature flag macros were added to check features with multiple
bits set (matters for FP_F16 and SIMD_F16 opcode feature tests).
The unused AARCH64_OPCODE_HAS_FEATURE was removed, all checks should
use one of the AARCH64_CPU_HAS_* macros. AARCH64_CPU_HAS_FEATURE
now checks all feature bits.
The aarch64_features table now contains the dependencies as
a separate field (so when the feature is enabled all dependencies
are enabled and when it is disabled everything that depends on it
is disabled).
Note that armv8-a+foo+nofoo is not equivalent to armv8-a if
+foo turns on dependent features that nofoo does not turn off.
gas/
* config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add
require field.
(aarch64_features): Initialize require fields.
(aarch64_parse_features): Handle dependencies.
(aarch64_feature_enable_set, aarch64_feature_disable_set): New.
(md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES.
* testsuite/gas/aarch64/illegal-nofp16.s: New.
* testsuite/gas/aarch64/illegal-nofp16.l: New.
* testsuite/gas/aarch64/illegal-nofp16.d: New.
include/
* opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
(AARCH64_CPU_HAS_ANY_FEATURES): New.
(AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
(AARCH64_OPCODE_HAS_FEATURE): Remove.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal-nofp16.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal-nofp16.l | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal-nofp16.s | 7 |
3 files changed, 12 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/illegal-nofp16.d b/gas/testsuite/gas/aarch64/illegal-nofp16.d new file mode 100644 index 0000000..669e85d --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-nofp16.d @@ -0,0 +1,2 @@ +#as: -march=armv8.2-a+nofp16 -mno-verbose-error +#error-output: illegal-nofp16.l diff --git a/gas/testsuite/gas/aarch64/illegal-nofp16.l b/gas/testsuite/gas/aarch64/illegal-nofp16.l new file mode 100644 index 0000000..99d586b --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-nofp16.l @@ -0,0 +1,3 @@ +[^:]*: Assembler messages: +^[^:]+:4: Error: selected processor does not support `fneg h0,h1' +^[^:]+:6: Error: selected processor does not support `fneg v0\.8h,v1\.8h' diff --git a/gas/testsuite/gas/aarch64/illegal-nofp16.s b/gas/testsuite/gas/aarch64/illegal-nofp16.s new file mode 100644 index 0000000..7718444 --- /dev/null +++ b/gas/testsuite/gas/aarch64/illegal-nofp16.s @@ -0,0 +1,7 @@ +// Test -march=armv8.2-a+nofp16 to only disable fp16, not fp. +.text + fneg s0, s1 + fneg h0, h1 + fneg v0.4s, v1.4s + fneg v0.8h, v1.8h + neg v0.16b, v1.16b |