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authorRenlin Li <renlin.li@arm.com>2016-02-24 13:48:59 +0000
committerRenlin Li <renlin.li@arm.com>2016-02-24 14:02:51 +0000
commit8afc7bea4018bf535902503c9a25dd4a96dfa3ca (patch)
tree25a64180700aa5d0fa5a650702468514f950457a /gas/testsuite
parent30bdf5c82e5734ac9f0b18eb7af631806d419270 (diff)
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[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2
opcodes/ 2016-02-24 Renlin Li <renlin.li@arm.com> * arm-dis.c (print_insn_coprocessor): Check co-processor number for cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2. gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11. * testsuite/gas/arm/copro.d: Update.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/arm/copro.d2
-rw-r--r--gas/testsuite/gas/arm/copro.s3
2 files changed, 3 insertions, 2 deletions
diff --git a/gas/testsuite/gas/arm/copro.d b/gas/testsuite/gas/arm/copro.d
index d007c81..eb7b454 100644
--- a/gas/testsuite/gas/arm/copro.d
+++ b/gas/testsuite/gas/arm/copro.d
@@ -30,7 +30,7 @@ Disassembly of section .text:
0+050 <[^>]*> ecd43704 ldcl 7, cr3, \[r4\], \{4\}
0+054 <[^>]*> ecc52805 stcl 8, cr2, \[r5\], \{5\}
0+058 <[^>]*> fcd61906 ldc2l 9, cr1, \[r6\], \{6\}
-0+05c <[^>]*> fcc70a07 stc2l 10, cr0, \[r7\], \{7\}
+0+05c <[^>]*> fcc70c07 stc2l 12, cr0, \[r7\], \{7\}
0+060 <[^>]*> ecd88cff ldcl 12, cr8, \[r8\], \{255\}.*
0+064 <[^>]*> ecc99cfe stcl 12, cr9, \[r9\], \{254\}.*
0+068 <[^>]*> ec507d04 mrrc 13, 0, r7, r0, cr4
diff --git a/gas/testsuite/gas/arm/copro.s b/gas/testsuite/gas/arm/copro.s
index 0ed0e05..f03f5ae 100644
--- a/gas/testsuite/gas/arm/copro.s
+++ b/gas/testsuite/gas/arm/copro.s
@@ -32,7 +32,8 @@ bar:
ldcl 7, c3, [r4], {4}
stcl p8, c2, [r5], {5}
ldc2l 9, c1, [r6], {6}
- stc2l p10, c0, [r7], {7}
+ @ using '10, 11' below results in an invalid stc2l instruction.
+ stc2l p12, c0, [r7], {7}
@ using '11' below results in an (invalid) Neon vldmia instruction.
ldcl 12, c8, [r8], {255}
stcl p12, c9, [r9], {254}