diff options
author | Cui, Lili <lili.cui@intel.com> | 2023-12-28 01:06:39 +0000 |
---|---|---|
committer | Cui, Lili <lili.cui@intel.com> | 2023-12-28 11:14:41 +0000 |
commit | 80d61d8d614d68a0b1932ed3a86d4cda01e5633e (patch) | |
tree | d96a3481c4563e2fd0fee9ae049626ee9dea6053 /gas/testsuite | |
parent | fcd5cdd5aeecf7eae91a402755c260bb64a0fe0f (diff) | |
download | gdb-80d61d8d614d68a0b1932ed3a86d4cda01e5633e.zip gdb-80d61d8d614d68a0b1932ed3a86d4cda01e5633e.tar.gz gdb-80d61d8d614d68a0b1932ed3a86d4cda01e5633e.tar.bz2 |
Support APX GPR32 with rex2 prefix
APX uses the REX2 prefix to support EGPR for map0 and map1 of legacy
instructions. We added the NoEgpr flag in i386-gen.c for instructions
that do not support EGPR.
gas/ChangeLog:
2023-12-28 Lingling Kong <lingling.kong@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
Lili Cui <lili.cui@intel.com>
Lin Hu <lin1.hu@intel.com>
* config/tc-i386.c
(enum i386_error): Add unsupported_EGPR_for_addressing
and invalid_pseudo_prefix.
(struct _i386_insn): Add rex2 and rex2_encoding for
gpr32.
(cpu_arch): Add apx_f.
(is_cpu): Ditto.
(register_number): Handle RegRex2 for gpr32.
(is_apx_rex2_encoding): New func. Test rex2 prefix encoding.
(build_rex2_prefix): New func. Build legacy insn in
opcode 0/1 use gpr32 with rex2 prefix.
(establish_rex): Handle rex2 and rex2_encoding.
(optimize_encoding): Handel add r16-r31 for registers.
(md_assemble): Handle apx encoding.
(parse_insn): Handle Prefix_REX2.
(check_EgprOperands): New func. Check if Egprs operands
are valid for the instruction
(match_template): Handle Egpr operands check.
(set_rex_rex2): New func. set i.rex and i.rex2.
(build_modrm_byte): Ditto.
(output_insn): Handle rex2 2-byte prefix output.
(check_register): Handle check egpr illegal without
target apx, 64-bit mode and with rex_prefix.
* doc/c-i386.texi: Document .apx.
* testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d: D5 valid
in 64-bit mode.
* testsuite/gas/i386/ilp32/x86-64-opcode-inval.d: Ditto.
* testsuite/gas/i386/rex-bad: Adjust rex testcase.
* testsuite/gas/i386/x86-64-opcode-inval-intel.d: Ditto.
* testsuite/gas/i386/x86-64-opcode-inval.d: Ditto.
* testsuite/gas/i386/x86-64-opcode-inval.s: Ditto.
* testsuite/gas/i386/x86-64-pseudos-bad.l: Add illegal rex2 test.
* testsuite/gas/i386/x86-64-pseudos-bad.s: Ditto.
* testsuite/gas/i386/x86-64-pseudos.d: Add rex2 test.
* testsuite/gas/i386/x86-64-pseudos.s: Ditto.
* testsuite/gas/i386/x86-64.exp: Run APX tests.
* testsuite/gas/i386/x86-64-apx-egpr-inval.l: New test.
* testsuite/gas/i386/x86-64-apx-egpr-inval.s: New test.
* testsuite/gas/i386/x86-64-apx-rex2.d: New test.
* testsuite/gas/i386/x86-64-apx-rex2.s: New test.
include/ChangeLog:
* opcode/i386.h (REX2_OPCODE): New.
(REX2_M): Ditto.
opcodes/ChangeLog:
* i386-dis.c (struct instr_info): Add erex for gpr32.
Add last_erex_prefix for rex2 prefix.
(REX2_M): Extend for gpr32.
(PREFIX_REX2): Ditto.
(PREFIX_REX2_ILLEGAL): Ditto.
(ckprefix): Ditto.
(prefix_name): Ditto.
(print_insn): Ditto.
(print_register): Ditto.
(OP_E_memory): Ditto.
(OP_REG): Ditto.
(OP_EX): Ditto.
* i386-gen.c (rex2_disallowed): Some instructions are not allowed rex2 prefix.
(process_i386_opcode_modifier): Set NoEgpr for VEX and some special instructions.
(output_i386_opcode): Handle if_entry_needs_special_handle.
* i386-init.h : Regenerated.
* i386-mnem.h : Regenerated.
* i386-opc.h (enum i386_cpu): Add CpuAPX_F.
(NoEgpr): New.
(Prefix_NoOptimize): Ditto.
(Prefix_REX2): Ditto.
(RegRex2): Ditto.
* i386-opc.tbl: Add rex2 prefix.
* i386-reg.tbl: Add egprs (r16-r31).
* i386-tbl.h: Regenerated.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d | 47 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d | 47 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/rex-bad.l | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l | 15 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s | 18 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-rex2.d | 83 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-rex2.s | 85 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d | 26 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode-inval.d | 26 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode-inval.s | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos-bad.l | 75 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos-bad.s | 74 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos.d | 21 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-pseudos.s | 21 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64.exp | 2 |
15 files changed, 413 insertions, 139 deletions
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d b/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d index a2b09d2..5683437 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval-intel.d @@ -2,49 +2,4 @@ #as: --32 #objdump: -dw -Mx86-64 -Mintel #name: x86-64 (ILP32) illegal opcodes (Intel mode) - -.*: +file format .* - -Disassembly of section .text: - -0+ <aaa>: -[ ]*[a-f0-9]+: 37 \(bad\) - -0+1 <aad0>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+3 <aad1>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+5 <aam0>: -[ ]*[a-f0-9]+: d4 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+7 <aam1>: -[ ]*[a-f0-9]+: d4 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+9 <aas>: -[ ]*[a-f0-9]+: 3f \(bad\) - -0+a <bound>: -[ ]*[a-f0-9]+: 62 .byte 0x62 -[ ]*[a-f0-9]+: 10 .byte 0x10 - -0+c <daa>: -[ ]*[a-f0-9]+: 27 \(bad\) - -0+d <das>: -[ ]*[a-f0-9]+: 2f \(bad\) - -0+e <into>: -[ ]*[a-f0-9]+: ce \(bad\) - -0+f <pusha>: -[ ]*[a-f0-9]+: 60 \(bad\) - -0+10 <popa>: -[ ]*[a-f0-9]+: 61 \(bad\) -#pass +#dump: ../x86-64-opcode-inval-intel.d diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d b/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d index 5a17b0b..b5233a5 100644 --- a/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d +++ b/gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d @@ -2,49 +2,4 @@ #as: --32 #objdump: -dw -Mx86-64 #name: x86-64 (ILP32) illegal opcodes - -.*: +file format .* - -Disassembly of section .text: - -0+ <aaa>: -[ ]*[a-f0-9]+: 37 \(bad\) - -0+1 <aad0>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+3 <aad1>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+5 <aam0>: -[ ]*[a-f0-9]+: d4 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+7 <aam1>: -[ ]*[a-f0-9]+: d4 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+9 <aas>: -[ ]*[a-f0-9]+: 3f \(bad\) - -0+a <bound>: -[ ]*[a-f0-9]+: 62 .byte 0x62 -[ ]*[a-f0-9]+: 10 .byte 0x10 - -0+c <daa>: -[ ]*[a-f0-9]+: 27 \(bad\) - -0+d <das>: -[ ]*[a-f0-9]+: 2f \(bad\) - -0+e <into>: -[ ]*[a-f0-9]+: ce \(bad\) - -0+f <pusha>: -[ ]*[a-f0-9]+: 60 \(bad\) - -0+10 <popa>: -[ ]*[a-f0-9]+: 61 \(bad\) -#pass +#dump: ../x86-64-opcode-inval.d diff --git a/gas/testsuite/gas/i386/rex-bad.l b/gas/testsuite/gas/i386/rex-bad.l index 407558e..abd4d30 100644 --- a/gas/testsuite/gas/i386/rex-bad.l +++ b/gas/testsuite/gas/i386/rex-bad.l @@ -3,8 +3,8 @@ .*:5: Error: same .* .*:6: Error: same .* .*:7: Error: same .* -.*:9: Error: .* REX .* -.*:10: Error: .* REX .* -.*:12: Error: .* REX .* -.*:13: Error: .* REX .* +.*:9: Error: .* REX/REX2 .* +.*:10: Error: .* REX/REX2 .* +.*:12: Error: .* REX/REX2 .* +.*:13: Error: .* REX/REX2 .* #pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l new file mode 100644 index 0000000..bb5c602 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l @@ -0,0 +1,15 @@ +.*: Assembler messages: +.*:4: Error: bad register name `%r17d' +.*:7: Error: extended GPR cannot be used as base/index for `xsave' +.*:8: Error: extended GPR cannot be used as base/index for `xsave64' +.*:9: Error: extended GPR cannot be used as base/index for `xrstor' +.*:10: Error: extended GPR cannot be used as base/index for `xrstor64' +.*:11: Error: extended GPR cannot be used as base/index for `xsaves' +.*:12: Error: extended GPR cannot be used as base/index for `xsaves64' +.*:13: Error: extended GPR cannot be used as base/index for `xrstors' +.*:14: Error: extended GPR cannot be used as base/index for `xrstors64' +.*:15: Error: extended GPR cannot be used as base/index for `xsaveopt' +.*:16: Error: extended GPR cannot be used as base/index for `xsaveopt64' +.*:17: Error: extended GPR cannot be used as base/index for `xsavec' +.*:18: Error: extended GPR cannot be used as base/index for `xsavec64' +#pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s new file mode 100644 index 0000000..bfb6b3f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s @@ -0,0 +1,18 @@ +# Check illegal 64bit APX_F instructions + .text + .arch .noapx_f + test $0x7, %r17d + .arch .apx_f + test $0x7, %r17d + xsave (%r16, %rbx) + xsave64 (%r16, %r31) + xrstor (%r16, %rbx) + xrstor64 (%r16, %rbx) + xsaves (%rbx, %r16) + xsaves64 (%r16, %rbx) + xrstors (%rbx, %r31) + xrstors64 (%r16, %rbx) + xsaveopt (%r16, %rbx) + xsaveopt64 (%r16, %r31) + xsavec (%r16, %rbx) + xsavec64 (%r16, %r31) diff --git a/gas/testsuite/gas/i386/x86-64-apx-rex2.d b/gas/testsuite/gas/i386/x86-64-apx-rex2.d new file mode 100644 index 0000000..e3cd534 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-rex2.d @@ -0,0 +1,83 @@ +#as: +#objdump: -dw +#name: x86-64 APX_F use gpr32 with rex2 prefix +#source: x86-64-apx-rex2.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*d5 11 f6 c0 07[ ]+test \$0x7,%r24b +[ ]*[a-f0-9]+:[ ]*d5 11 f7 c0 07 00 00 00[ ]+test \$0x7,%r24d +[ ]*[a-f0-9]+:[ ]*d5 19 f7 c0 07 00 00 00[ ]+test \$0x7,%r24 +[ ]*[a-f0-9]+:[ ]*66 d5 11 f7 c0 07 00[ ]+test \$0x7,%r24w +[ ]*[a-f0-9]+:[ ]*44 0f af f8[ ]+imul %eax,%r15d +[ ]*[a-f0-9]+:[ ]*d5 c0 af c0[ ]+imul %eax,%r16d +[ ]*[a-f0-9]+:[ ]*d5 90 62 12[ ]+punpckldq %mm2,\(%r18\) +[ ]*[a-f0-9]+:[ ]*d5 40 8d 00[ ]+lea \(%rax\),%r16d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 08[ ]+lea \(%rax\),%r17d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 10[ ]+lea \(%rax\),%r18d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 18[ ]+lea \(%rax\),%r19d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 20[ ]+lea \(%rax\),%r20d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 28[ ]+lea \(%rax\),%r21d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 30[ ]+lea \(%rax\),%r22d +[ ]*[a-f0-9]+:[ ]*d5 40 8d 38[ ]+lea \(%rax\),%r23d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 00[ ]+lea \(%rax\),%r24d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 08[ ]+lea \(%rax\),%r25d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 10[ ]+lea \(%rax\),%r26d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 18[ ]+lea \(%rax\),%r27d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 20[ ]+lea \(%rax\),%r28d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 28[ ]+lea \(%rax\),%r29d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 30[ ]+lea \(%rax\),%r30d +[ ]*[a-f0-9]+:[ ]*d5 44 8d 38[ ]+lea \(%rax\),%r31d +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 05 00 00 00 00[ ]+lea 0x0\(,%r16,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 0d 00 00 00 00[ ]+lea 0x0\(,%r17,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 15 00 00 00 00[ ]+lea 0x0\(,%r18,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 1d 00 00 00 00[ ]+lea 0x0\(,%r19,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 25 00 00 00 00[ ]+lea 0x0\(,%r20,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 2d 00 00 00 00[ ]+lea 0x0\(,%r21,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 35 00 00 00 00[ ]+lea 0x0\(,%r22,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 20 8d 04 3d 00 00 00 00[ ]+lea 0x0\(,%r23,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 05 00 00 00 00[ ]+lea 0x0\(,%r24,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 0d 00 00 00 00[ ]+lea 0x0\(,%r25,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 15 00 00 00 00[ ]+lea 0x0\(,%r26,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 1d 00 00 00 00[ ]+lea 0x0\(,%r27,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 25 00 00 00 00[ ]+lea 0x0\(,%r28,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 2d 00 00 00 00[ ]+lea 0x0\(,%r29,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 35 00 00 00 00[ ]+lea 0x0\(,%r30,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 22 8d 04 3d 00 00 00 00[ ]+lea 0x0\(,%r31,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 00[ ]+lea \(%r16\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 01[ ]+lea \(%r17\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 02[ ]+lea \(%r18\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 03[ ]+lea \(%r19\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 04 24 lea \(%r20\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 45 00 lea 0x0\(%r21\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 06[ ]+lea \(%r22\),%eax +[ ]*[a-f0-9]+:[ ]*d5 10 8d 07[ ]+lea \(%r23\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 00[ ]+lea \(%r24\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 01[ ]+lea \(%r25\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 02[ ]+lea \(%r26\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 03[ ]+lea \(%r27\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 04 24 lea \(%r28\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 45 00 lea 0x0\(%r29\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 06 lea \(%r30\),%eax +[ ]*[a-f0-9]+:[ ]*d5 11 8d 07 lea \(%r31\),%eax +[ ]*[a-f0-9]+:[ ]*4c 8d 38 lea \(%rax\),%r15 +[ ]*[a-f0-9]+:[ ]*d5 48 8d 00 lea \(%rax\),%r16 +[ ]*[a-f0-9]+:[ ]*49 8d 07 lea \(%r15\),%rax +[ ]*[a-f0-9]+:[ ]*d5 18 8d 00 lea \(%r16\),%rax +[ ]*[a-f0-9]+:[ ]*4a 8d 04 3d 00 00 00 00 lea 0x0\(,%r15,1\),%rax +[ ]*[a-f0-9]+:[ ]*d5 28 8d 04 05 00 00 00 00 lea 0x0\(,%r16,1\),%rax +[ ]*[a-f0-9]+:[ ]*d5 1c 03 00 add \(%r16\),%r8 +[ ]*[a-f0-9]+:[ ]*d5 1c 03 38 add \(%r16\),%r15 +[ ]*[a-f0-9]+:[ ]*d5 4a 8b 04 0d 00 00 00 00 mov 0x0\(,%r9,1\),%r16 +[ ]*[a-f0-9]+:[ ]*d5 4a 8b 04 35 00 00 00 00 mov 0x0\(,%r14,1\),%r16 +[ ]*[a-f0-9]+:[ ]*d5 4d 2b 3a sub \(%r10\),%r31 +[ ]*[a-f0-9]+:[ ]*d5 4d 2b 7d 00 sub 0x0\(%r13\),%r31 +[ ]*[a-f0-9]+:[ ]*d5 30 8d 44 20 01 lea 0x1\(%r16,%r20,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 76 8d 7c 20 01 lea 0x1\(%r16,%r28,1\),%r31d +[ ]*[a-f0-9]+:[ ]*d5 12 8d 84 04 81 00 00 00 lea 0x81\(%r20,%r8,1\),%eax +[ ]*[a-f0-9]+:[ ]*d5 57 8d bc 04 81 00 00 00 lea 0x81\(%r28,%r8,1\),%r31d +#pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-rex2.s b/gas/testsuite/gas/i386/x86-64-apx-rex2.s new file mode 100644 index 0000000..eaaaaa7 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-rex2.s @@ -0,0 +1,85 @@ +# Check 64bit instructions with rex2 prefix encoding + + .allow_index_reg + .text +_start: + test $0x7, %r24b + test $0x7, %r24d + test $0x7, %r24 + test $0x7, %r24w +## REX2.M bit + imull %eax, %r15d + imull %eax, %r16d + punpckldq (%r18), %mm2 +## REX2.R4 bit + leal (%rax), %r16d + leal (%rax), %r17d + leal (%rax), %r18d + leal (%rax), %r19d + leal (%rax), %r20d + leal (%rax), %r21d + leal (%rax), %r22d + leal (%rax), %r23d + leal (%rax), %r24d + leal (%rax), %r25d + leal (%rax), %r26d + leal (%rax), %r27d + leal (%rax), %r28d + leal (%rax), %r29d + leal (%rax), %r30d + leal (%rax), %r31d +## REX2.X4 bit + leal (,%r16), %eax + leal (,%r17), %eax + leal (,%r18), %eax + leal (,%r19), %eax + leal (,%r20), %eax + leal (,%r21), %eax + leal (,%r22), %eax + leal (,%r23), %eax + leal (,%r24), %eax + leal (,%r25), %eax + leal (,%r26), %eax + leal (,%r27), %eax + leal (,%r28), %eax + leal (,%r29), %eax + leal (,%r30), %eax + leal (,%r31), %eax +## REX2.B4 bit + leal (%r16), %eax + leal (%r17), %eax + leal (%r18), %eax + leal (%r19), %eax + leal (%r20), %eax + leal (%r21), %eax + leal (%r22), %eax + leal (%r23), %eax + leal (%r24), %eax + leal (%r25), %eax + leal (%r26), %eax + leal (%r27), %eax + leal (%r28), %eax + leal (%r29), %eax + leal (%r30), %eax + leal (%r31), %eax +## REX2.W bit + leaq (%rax), %r15 + leaq (%rax), %r16 + leaq (%r15), %rax + leaq (%r16), %rax + leaq (,%r15), %rax + leaq (,%r16), %rax +## REX2.R3 bit + add (%r16), %r8 + add (%r16), %r15 +## REX2.X3 bit + mov (,%r9), %r16 + mov (,%r14), %r16 +## REX2.B3 bit + sub (%r10), %r31 + sub (%r13), %r31 +## SIB + leal 1(%r16, %r20), %eax + leal 1(%r16, %r28), %r31d + leal 129(%r20, %r8), %eax + leal 129(%r28, %r8), %r31d diff --git a/gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d b/gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d index 6ee5b2f..66c4d2c 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d +++ b/gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d @@ -10,41 +10,33 @@ Disassembly of section .text: 0+ <aaa>: [ ]*[a-f0-9]+: 37 \(bad\) -0+1 <aad0>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+3 <aad1>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+5 <aam0>: +0+1 <aam0>: [ ]*[a-f0-9]+: d4 \(bad\) [ ]*[a-f0-9]+: 0a .byte 0xa -0+7 <aam1>: +0+3 <aam1>: [ ]*[a-f0-9]+: d4 \(bad\) [ ]*[a-f0-9]+: 02 .byte 0x2 -0+9 <aas>: +0+5 <aas>: [ ]*[a-f0-9]+: 3f \(bad\) -0+a <bound>: +0+6 <bound>: [ ]*[a-f0-9]+: 62 .byte 0x62 [ ]*[a-f0-9]+: 10 .byte 0x10 -0+c <daa>: +0+8 <daa>: [ ]*[a-f0-9]+: 27 \(bad\) -0+d <das>: +0+9 <das>: [ ]*[a-f0-9]+: 2f \(bad\) -0+e <into>: +0+a <into>: [ ]*[a-f0-9]+: ce \(bad\) -0+f <pusha>: +0+b <pusha>: [ ]*[a-f0-9]+: 60 \(bad\) -0+10 <popa>: +0+c <popa>: [ ]*[a-f0-9]+: 61 \(bad\) #pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode-inval.d b/gas/testsuite/gas/i386/x86-64-opcode-inval.d index 12f02c1..fbb850b 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode-inval.d +++ b/gas/testsuite/gas/i386/x86-64-opcode-inval.d @@ -9,41 +9,33 @@ Disassembly of section .text: 0+ <aaa>: [ ]*[a-f0-9]+: 37 \(bad\) -0+1 <aad0>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 0a .byte 0xa - -0+3 <aad1>: -[ ]*[a-f0-9]+: d5 \(bad\) -[ ]*[a-f0-9]+: 02 .byte 0x2 - -0+5 <aam0>: +0+1 <aam0>: [ ]*[a-f0-9]+: d4 \(bad\) [ ]*[a-f0-9]+: 0a .byte 0xa -0+7 <aam1>: +0+3 <aam1>: [ ]*[a-f0-9]+: d4 \(bad\) [ ]*[a-f0-9]+: 02 .byte 0x2 -0+9 <aas>: +0+5 <aas>: [ ]*[a-f0-9]+: 3f \(bad\) -0+a <bound>: +0+6 <bound>: [ ]*[a-f0-9]+: 62 .byte 0x62 [ ]*[a-f0-9]+: 10 .byte 0x10 -0+c <daa>: +0+8 <daa>: [ ]*[a-f0-9]+: 27 \(bad\) -0+d <das>: +0+9 <das>: [ ]*[a-f0-9]+: 2f \(bad\) -0+e <into>: +0+a <into>: [ ]*[a-f0-9]+: ce \(bad\) -0+f <pusha>: +0+b <pusha>: [ ]*[a-f0-9]+: 60 \(bad\) -0+10 <popa>: +0+c <popa>: [ ]*[a-f0-9]+: 61 \(bad\) #pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode-inval.s b/gas/testsuite/gas/i386/x86-64-opcode-inval.s index 6cbfe77..fbcda3d 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode-inval.s +++ b/gas/testsuite/gas/i386/x86-64-opcode-inval.s @@ -2,10 +2,6 @@ # All the followings are illegal opcodes for x86-64. aaa: aaa -aad0: - aad -aad1: - aad $2 aam0: aam aam1: diff --git a/gas/testsuite/gas/i386/x86-64-pseudos-bad.l b/gas/testsuite/gas/i386/x86-64-pseudos-bad.l index 3f9f67f..a72f847 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos-bad.l +++ b/gas/testsuite/gas/i386/x86-64-pseudos-bad.l @@ -1,6 +1,71 @@ .*: Assembler messages: -.*:3: Error: .*`vmovaps'.* -.*:4: Error: .*`vmovaps'.* -.*:5: Error: .*`vmovaps'.* -.*:6: Error: .*`vmovaps'.* -.*:7: Error: .*`rorx'.* +.*:[0-9]+: Error: .*`vmovaps'.* +.*:[0-9]+: Error: .*`vmovaps'.* +.*:[0-9]+: Error: .*`vmovaps'.* +.*:[0-9]+: Error: .*`vmovaps'.* +.*:[0-9]+: Error: .*`rorx'.* +.*:[0-9]+: Error: .*`vmovaps'.* +.*:[0-9]+: Error: .*`xsave'.* +.*:[0-9]+: Error: .*`xsaves'.* +.*:[0-9]+: Error: .*`xsaves64'.* +.*:[0-9]+: Error: .*`xsavec'.* +.*:[0-9]+: Error: .*`xrstors'.* +.*:[0-9]+: Error: .*`xrstors64'.* +.*:[0-9]+: Error: .*`mov'.* +.*:[0-9]+: Error: .*`movabs'.* +.*:[0-9]+: Error: .*`cmps'.* +.*:[0-9]+: Error: .*`lods'.* +.*:[0-9]+: Error: .*`lods'.* +.*:[0-9]+: Error: .*`lods'.* +.*:[0-9]+: Error: .*`movs'.* +.*:[0-9]+: Error: .*`movs'.* +.*:[0-9]+: Error: .*`scas'.* +.*:[0-9]+: Error: .*`scas'.* +.*:[0-9]+: Error: .*`scas'.* +.*:[0-9]+: Error: .*`stos'.* +.*:[0-9]+: Error: .*`stos'.* +.*:[0-9]+: Error: .*`stos'.* +.*:[0-9]+: Error: .*`jo'.* +.*:[0-9]+: Error: .*`jno'.* +.*:[0-9]+: Error: .*`jb'.* +.*:[0-9]+: Error: .*`jae'.* +.*:[0-9]+: Error: .*`je'.* +.*:[0-9]+: Error: .*`jne'.* +.*:[0-9]+: Error: .*`jbe'.* +.*:[0-9]+: Error: .*`ja'.* +.*:[0-9]+: Error: .*`js'.* +.*:[0-9]+: Error: .*`jns'.* +.*:[0-9]+: Error: .*`jp'.* +.*:[0-9]+: Error: .*`jnp'.* +.*:[0-9]+: Error: .*`jl'.* +.*:[0-9]+: Error: .*`jge'.* +.*:[0-9]+: Error: .*`jle'.* +.*:[0-9]+: Error: .*`jg'.* +.*:[0-9]+: Error: .*`jo'.* +.*:[0-9]+: Error: .*`jno'.* +.*:[0-9]+: Error: .*`jb'.* +.*:[0-9]+: Error: .*`jae'.* +.*:[0-9]+: Error: .*`je'.* +.*:[0-9]+: Error: .*`jne'.* +.*:[0-9]+: Error: .*`jbe'.* +.*:[0-9]+: Error: .*`ja'.* +.*:[0-9]+: Error: .*`js'.* +.*:[0-9]+: Error: .*`jns'.* +.*:[0-9]+: Error: .*`jp'.* +.*:[0-9]+: Error: .*`jnp'.* +.*:[0-9]+: Error: .*`jl'.* +.*:[0-9]+: Error: .*`jge'.* +.*:[0-9]+: Error: .*`jle'.* +.*:[0-9]+: Error: .*`jg'.* +.*:[0-9]+: Error: .*`in'.* +.*:[0-9]+: Error: .*`in'.* +.*:[0-9]+: Error: .*`out'.* +.*:[0-9]+: Error: .*`out'.* +.*:[0-9]+: Error: .*`jmp'.* +.*:[0-9]+: Error: .*`loop'.* +.*:[0-9]+: Error: .*`wrmsr'.* +.*:[0-9]+: Error: .*`rdtsc'.* +.*:[0-9]+: Error: .*`rdmsr'.* +.*:[0-9]+: Error: .*`sysenter'.* +.*:[0-9]+: Error: .*`sysexit'.* +.*:[0-9]+: Error: .*`rdpmc'.* diff --git a/gas/testsuite/gas/i386/x86-64-pseudos-bad.s b/gas/testsuite/gas/i386/x86-64-pseudos-bad.s index 3b92359..54c17a9 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos-bad.s +++ b/gas/testsuite/gas/i386/x86-64-pseudos-bad.s @@ -5,3 +5,77 @@ pseudos: {rex} vmovaps %xmm7,%xmm2 {rex} vmovaps %xmm17,%xmm2 {rex} rorx $7,%eax,%ebx + {rex2} vmovaps %xmm7,%xmm2 + {rex2} xsave (%rax) + {rex2} xsaves (%ecx) + {rex2} xsaves64 (%ecx) + {rex2} xsavec (%ecx) + {rex2} xrstors (%ecx) + {rex2} xrstors64 (%ecx) + + #All opcodes in the row 0xA* (map0) prefixed REX2 are illegal. + #{rex2} test (0xa8) is a special case, it will remap to test (0xf6) + {rex2} mov 0x90909090,%al + {rex2} movabs 0x1,%al + {rex2} cmpsb %es:(%edi),%ds:(%esi) + {rex2} lodsb + {rex2} lods %ds:(%esi),%al + {rex2} lodsb (%esi) + {rex2} movs + {rex2} movs (%esi), (%edi) + {rex2} scasl + {rex2} scas %es:(%edi),%eax + {rex2} scasb (%edi) + {rex2} stosb + {rex2} stosb (%edi) + {rex2} stos %eax,%es:(%edi) + + #All opcodes in the row 0x7* (map0) and 0x8* (map1) prefixed REX2 are illegal. + {rex2} jo .+2-0x70 + {rex2} jno .+2-0x70 + {rex2} jb .+2-0x70 + {rex2} jae .+2-0x70 + {rex2} je .+2-0x70 + {rex2} jne .+2-0x70 + {rex2} jbe .+2-0x70 + {rex2} ja .+2-0x70 + {rex2} js .+2-0x70 + {rex2} jns .+2-0x70 + {rex2} jp .+2-0x70 + {rex2} jnp .+2-0x70 + {rex2} jl .+2-0x70 + {rex2} jge .+2-0x70 + {rex2} jle .+2-0x70 + {rex2} jg .+2-0x70 + {rex2} jo .+6+0x90909090 + {rex2} jno .+6+0x90909090 + {rex2} jb .+6+0x90909090 + {rex2} jae .+6+0x90909090 + {rex2} je .+6+0x90909090 + {rex2} jne .+6+0x90909090 + {rex2} jbe .+6+0x90909090 + {rex2} ja .+6+0x90909090 + {rex2} js .+6+0x90909090 + {rex2} jns .+6+0x90909090 + {rex2} jp .+6+0x90909090 + {rex2} jnp .+6+0x90909090 + {rex2} jl .+6+0x90909090 + {rex2} jge .+6+0x90909090 + {rex2} jle .+6+0x90909090 + {rex2} jg .+6+0x90909090 + + #All opcodes in the row 0xE* (map0) prefixed REX2 are illegal. + {rex2} in $0x90,%al + {rex2} in $0x90 + {rex2} out $0x90,%al + {rex2} out $0x90 + {rex2} jmp *%eax + {rex2} loop foo + + #All opcodes in the row 0x3* (map1) prefixed REX2 are illegal. + {rex2} wrmsr + {rex2} rdtsc + {rex2} rdmsr + {rex2} sysenter + {rex2} sysexitl + {rex2} rdpmc diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d index 866a804..19dcd84 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos.d +++ b/gas/testsuite/gas/i386/x86-64-pseudos.d @@ -404,6 +404,18 @@ Disassembly of section .text: +[a-f0-9]+: 41 0f 28 10 movaps \(%r8\),%xmm2 +[a-f0-9]+: 40 0f 38 01 01 rex phaddw \(%rcx\),%mm0 +[a-f0-9]+: 41 0f 38 01 00 phaddw \(%r8\),%mm0 + +[a-f0-9]+: 88 c4 mov %al,%ah + +[a-f0-9]+: d5 00 d3 e0 {rex2 0x0} shl %cl,%eax + +[a-f0-9]+: d5 00 38 ca {rex2 0x0} cmp %cl,%dl + +[a-f0-9]+: d5 00 b3 01 {rex2 0x0} mov \$(0x)?1,%bl + +[a-f0-9]+: d5 00 89 c3 {rex2 0x0} mov %eax,%ebx + +[a-f0-9]+: d5 01 89 c6 {rex2 0x1} mov %eax,%r14d + +[a-f0-9]+: d5 01 89 00 {rex2 0x1} mov %eax,\(%r8\) + +[a-f0-9]+: d5 80 28 d7 {rex2 0x80} movaps %xmm7,%xmm2 + +[a-f0-9]+: d5 84 28 e7 {rex2 0x84} movaps %xmm7,%xmm12 + +[a-f0-9]+: d5 80 28 11 {rex2 0x80} movaps \(%rcx\),%xmm2 + +[a-f0-9]+: d5 81 28 10 {rex2 0x81} movaps \(%r8\),%xmm2 + +[a-f0-9]+: d5 80 d5 f0 {rex2 0x80} pmullw %mm0,%mm6 +[a-f0-9]+: 8a 45 00 mov 0x0\(%rbp\),%al +[a-f0-9]+: 8a 45 00 mov 0x0\(%rbp\),%al +[a-f0-9]+: 8a 85 00 00 00 00 mov 0x0\(%rbp\),%al @@ -458,6 +470,15 @@ Disassembly of section .text: +[a-f0-9]+: 41 0f 28 10 movaps \(%r8\),%xmm2 +[a-f0-9]+: 40 0f 38 01 01 rex phaddw \(%rcx\),%mm0 +[a-f0-9]+: 41 0f 38 01 00 phaddw \(%r8\),%mm0 + +[a-f0-9]+: 88 c4 mov %al,%ah + +[a-f0-9]+: d5 00 89 c3 {rex2 0x0} mov %eax,%ebx + +[a-f0-9]+: d5 01 89 c6 {rex2 0x1} mov %eax,%r14d + +[a-f0-9]+: d5 01 89 00 {rex2 0x1} mov %eax,\(%r8\) + +[a-f0-9]+: d5 80 28 d7 {rex2 0x80} movaps %xmm7,%xmm2 + +[a-f0-9]+: d5 84 28 e7 {rex2 0x84} movaps %xmm7,%xmm12 + +[a-f0-9]+: d5 80 28 11 {rex2 0x80} movaps \(%rcx\),%xmm2 + +[a-f0-9]+: d5 81 28 10 {rex2 0x81} movaps \(%r8\),%xmm2 + +[a-f0-9]+: d5 80 d5 f0 {rex2 0x80} pmullw %mm0,%mm6 +[a-f0-9]+: 8a 45 00 mov 0x0\(%rbp\),%al +[a-f0-9]+: 8a 45 00 mov 0x0\(%rbp\),%al +[a-f0-9]+: 8a 85 00 00 00 00 mov 0x0\(%rbp\),%al diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s index 06f0b62..5a53c36 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos.s +++ b/gas/testsuite/gas/i386/x86-64-pseudos.s @@ -360,6 +360,18 @@ _start: {rex} movaps (%r8),%xmm2 {rex} phaddw (%rcx),%mm0 {rex} phaddw (%r8),%mm0 + {rex2} mov %al,%ah + {rex2} shl %cl, %eax + {rex2} cmp %cl, %dl + {rex2} mov $1, %bl + {rex2} movl %eax,%ebx + {rex2} movl %eax,%r14d + {rex2} movl %eax,(%r8) + {rex2} movaps %xmm7,%xmm2 + {rex2} movaps %xmm7,%xmm12 + {rex2} movaps (%rcx),%xmm2 + {rex2} movaps (%r8),%xmm2 + {rex2} pmullw %mm0,%mm6 movb (%rbp),%al {disp8} movb (%rbp),%al @@ -422,6 +434,15 @@ _start: {rex} movaps xmm2,XMMWORD PTR [r8] {rex} phaddw mm0,QWORD PTR [rcx] {rex} phaddw mm0,QWORD PTR [r8] + {rex2} mov ah,al + {rex2} mov ebx,eax + {rex2} mov r14d,eax + {rex2} mov DWORD PTR [r8],eax + {rex2} movaps xmm2,xmm7 + {rex2} movaps xmm12,xmm7 + {rex2} movaps xmm2,XMMWORD PTR [rcx] + {rex2} movaps xmm2,XMMWORD PTR [r8] + {rex2} pmullw mm6,mm0 mov al, BYTE PTR [rbp] {disp8} mov al, BYTE PTR [rbp] diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index e4b0cc8..91c068d 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -363,6 +363,8 @@ run_dump_test "x86-64-avx512f-rcigrne-intel" run_dump_test "x86-64-avx512f-rcigrne" run_dump_test "x86-64-avx512f-rcigru-intel" run_dump_test "x86-64-avx512f-rcigru" +run_list_test "x86-64-apx-egpr-inval" +run_dump_test "x86-64-apx-rex2" run_dump_test "x86-64-avx512f-rcigrz-intel" run_dump_test "x86-64-avx512f-rcigrz" run_dump_test "x86-64-clwb" |