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author | Nick Clifton <nickc@redhat.com> | 2016-08-05 10:37:57 +0100 |
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committer | Nick Clifton <nickc@redhat.com> | 2016-08-05 10:37:57 +0100 |
commit | 7ea12e5c3ad54da440c08f32da09534e63e515ca (patch) | |
tree | 9c6771899dc6a16b52ba1e4ccb2cc3522bb49b3e /gas/testsuite | |
parent | cca8e7e482abd37f1e199d7663d26fe8146fb84f (diff) | |
download | gdb-7ea12e5c3ad54da440c08f32da09534e63e515ca.zip gdb-7ea12e5c3ad54da440c08f32da09534e63e515ca.tar.gz gdb-7ea12e5c3ad54da440c08f32da09534e63e515ca.tar.bz2 |
Fix the generation of alignment frags in code sections for AArch64.
PR gas/20364
* config/tc-aarch64.c (s_ltorg): Change the mapping state after
aligning the frag.
(aarch64_init): Treat rs_align frags in code sections as
containing code, not data.
* testsuite/gas/aarch64/pr20364.s: New test.
* testsuite/gas/aarch64/pr20364.d: New test driver.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/aarch64/pr20364.d | 13 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/pr20364.s | 28 |
2 files changed, 41 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d new file mode 100644 index 0000000..babcff1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/pr20364.d @@ -0,0 +1,13 @@ +# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation. +#name: PR20364 +#objdump: -d + +.*: file format .* + +Disassembly of section \.vectors: + +0+000 <.*>: + 0: d2800000 mov x0, #0x0 // #0 + 4: 94000000 bl 0 <plat_report_exception> + 8: 17fffffe b 0 <bl1_exceptions> + diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s new file mode 100644 index 0000000..594ad7c --- /dev/null +++ b/gas/testsuite/gas/aarch64/pr20364.s @@ -0,0 +1,28 @@ + .macro vector_base label + .section .vectors, "ax" + .align 11, 0 + \label: + .endm + + .macro vector_entry label + .section .vectors, "ax" + .align 7, 0 + \label: + .endm + + .macro check_vector_size since + .if (. - \since) > (32 * 4) + .error "Vector exceeds 32 instructions" + .endif + .endm + + .globl bl1_exceptions + +vector_base bl1_exceptions + +vector_entry SynchronousExceptionSP0 + mov x0, #0x0 + bl plat_report_exception + b SynchronousExceptionSP0 + check_vector_size SynchronousExceptionSP0 + |