diff options
author | Jiong Wang <jiong.wang@arm.com> | 2016-04-05 15:54:00 +0100 |
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committer | Jiong Wang <jiong.wang@arm.com> | 2016-04-05 15:54:00 +0100 |
commit | 589a7d88306628fb332ba0a98ac4a4b3b84b7b2c (patch) | |
tree | a484b835ee9461b004329bdd9b5f115834e8e4e8 /gas/testsuite | |
parent | 94e5c97160abbcf2274f8d58dc2900bc85c1c384 (diff) | |
download | gdb-589a7d88306628fb332ba0a98ac4a4b3b84b7b2c.zip gdb-589a7d88306628fb332ba0a98ac4a4b3b84b7b2c.tar.gz gdb-589a7d88306628fb332ba0a98ac4a4b3b84b7b2c.tar.bz2 |
[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)
gas/
* config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
* testsuite/gas/arm/armv8-2-fp16-simd.s: New tests.
* testsuite/gas/arm/armv8-2-fp16-simd.d: New expected results.
* testsuite/gas/arm/armv8-2-fp16-simd-thum.d: Likewise for Thumb.
* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New warning results.
* testsuite/gas/arm/simd_by_scalar_low_regbank.s: New test source.
* testsuite/gas/arm/simd_by_scalar_low_regbank.d: New testcase.
* testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d: Likewise for Thumb.
* testsuite/gas/arm/simd_by_scalar_low_regbank.l: New warning results.
opcodes/
* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/arm/armv8-2-fp16-simd-thumb.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/armv8-2-fp16-simd.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/armv8-2-fp16-simd.s | 25 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/simd_by_scalar_low_regbank.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/simd_by_scalar_low_regbank.l | 49 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/simd_by_scalar_low_regbank.s | 27 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d | 4 |
8 files changed, 145 insertions, 0 deletions
diff --git a/gas/testsuite/gas/arm/armv8-2-fp16-simd-thumb.d b/gas/testsuite/gas/arm/armv8-2-fp16-simd-thumb.d index 5578b9b..9470497 100644 --- a/gas/testsuite/gas/arm/armv8-2-fp16-simd-thumb.d +++ b/gas/testsuite/gas/arm/armv8-2-fp16-simd-thumb.d @@ -145,3 +145,15 @@ Disassembly of section .text: 214: fff5 c5c4 vcle.f16 q14, q2, #0 218: ffb5 e602 vclt.f16 d14, d2, #0 21c: fff5 c644 vclt.f16 q14, q2, #0 + 220: ef90 7941 vmul.f16 d7, d0, d1\[0\] + 224: ef98 4966 vmul.f16 d4, d8, d6\[2\] + 228: ff90 49c8 vmul.f16 q2, q8, d0\[1\] + 22c: ff90 49ef vmul.f16 q2, q8, d7\[3\] + 230: ef94 2141 vmla.f16 d2, d4, d1\[0\] + 234: ff98 4141 vmla.f16 q2, q4, d1\[0\] + 238: ef94 2541 vmls.f16 d2, d4, d1\[0\] + 23c: ff98 4541 vmls.f16 q2, q4, d1\[0\] + 240: ef98 116f vmla.f16 d1, d8, d7\[3\] + 244: ff90 21ef vmla.f16 q1, q8, d7\[3\] + 248: ef98 156f vmls.f16 d1, d8, d7\[3\] + 24c: ff90 25ef vmls.f16 q1, q8, d7\[3\] diff --git a/gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l b/gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l index ba27f7c..9027cee 100644 --- a/gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l +++ b/gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l @@ -135,3 +135,15 @@ [^:]*:224: Error: selected processor does not support fp16 instruction -- `vcle.f16 q14,q2,#0' [^:]*:224: Error: selected processor does not support fp16 instruction -- `vclt.f16 d14,d2,#0' [^:]*:224: Error: selected processor does not support fp16 instruction -- `vclt.f16 q14,q2,#0' +[^:]*:242: Error: selected processor does not support fp16 instruction -- `vmul.f16 d7,d0,d1\[0\]' +[^:]*:243: Error: selected processor does not support fp16 instruction -- `vmul.f16 d4,d8,d6\[2\]' +[^:]*:244: Error: selected processor does not support fp16 instruction -- `vmul.f16 q2,q8,d0\[1\]' +[^:]*:245: Error: selected processor does not support fp16 instruction -- `vmul.f16 q2,q8,d7\[3\]' +[^:]*:248: Error: selected processor does not support fp16 instruction -- `vmla.f16 d2,d4,d1\[0\]' +[^:]*:248: Error: selected processor does not support fp16 instruction -- `vmla.f16 q2,q4,d1\[0\]' +[^:]*:248: Error: selected processor does not support fp16 instruction -- `vmls.f16 d2,d4,d1\[0\]' +[^:]*:248: Error: selected processor does not support fp16 instruction -- `vmls.f16 q2,q4,d1\[0\]' +[^:]*:249: Error: selected processor does not support fp16 instruction -- `vmla.f16 d1,d8,d7\[3\]' +[^:]*:249: Error: selected processor does not support fp16 instruction -- `vmla.f16 q1,q8,d7\[3\]' +[^:]*:249: Error: selected processor does not support fp16 instruction -- `vmls.f16 d1,d8,d7\[3\]' +[^:]*:249: Error: selected processor does not support fp16 instruction -- `vmls.f16 q1,q8,d7\[3\]' diff --git a/gas/testsuite/gas/arm/armv8-2-fp16-simd.d b/gas/testsuite/gas/arm/armv8-2-fp16-simd.d index 1a97f39..2dc4054 100644 --- a/gas/testsuite/gas/arm/armv8-2-fp16-simd.d +++ b/gas/testsuite/gas/arm/armv8-2-fp16-simd.d @@ -145,3 +145,15 @@ Disassembly of section .text: 214: f3f5c5c4 vcle.f16 q14, q2, #0 218: f3b5e602 vclt.f16 d14, d2, #0 21c: f3f5c644 vclt.f16 q14, q2, #0 + 220: f2907941 vmul.f16 d7, d0, d1\[0\] + 224: f2984966 vmul.f16 d4, d8, d6\[2\] + 228: f39049c8 vmul.f16 q2, q8, d0\[1\] + 22c: f39049ef vmul.f16 q2, q8, d7\[3\] + 230: f2942141 vmla.f16 d2, d4, d1\[0\] + 234: f3984141 vmla.f16 q2, q4, d1\[0\] + 238: f2942541 vmls.f16 d2, d4, d1\[0\] + 23c: f3984541 vmls.f16 q2, q4, d1\[0\] + 240: f298116f vmla.f16 d1, d8, d7\[3\] + 244: f39021ef vmla.f16 q1, q8, d7\[3\] + 248: f298156f vmls.f16 d1, d8, d7\[3\] + 24c: f39025ef vmls.f16 q1, q8, d7\[3\] diff --git a/gas/testsuite/gas/arm/armv8-2-fp16-simd.s b/gas/testsuite/gas/arm/armv8-2-fp16-simd.s index 7758f24..172d604 100644 --- a/gas/testsuite/gas/arm/armv8-2-fp16-simd.s +++ b/gas/testsuite/gas/arm/armv8-2-fp16-simd.s @@ -222,3 +222,28 @@ func: # neon_fcmp_imm0 f16_dq_fcmp_imm0 14, 2 + + .macro f16_d_by_scalar op reg0 reg1 reg2 idx + \op d\reg0, d\reg1, d\reg2[\idx] + .endm + + .macro f16_q_by_scalar op reg0 reg1 reg2 idx + \op q\reg0, q\reg1, d\reg2[\idx] + .endm + + .macro f16_dq_fmacmaybe_by_scalar reg0 reg1 reg2 idx + .irp op, vmla.f16, vmls.f16 + \op d\reg0, d\reg1, d\reg2[\idx] + \op q\reg0, q\reg1, d\reg2[\idx] + .endr + .endm + + # neon_mul (by scalar) + f16_d_by_scalar vmul.f16 7 0 1 0 + f16_d_by_scalar vmul.f16 4 8 6 2 + f16_q_by_scalar vmul.f16 2 8 0 1 + f16_q_by_scalar vmul.f16 2 8 7 3 + + # neon_mac_maybe_scalar (by scalar) + f16_dq_fmacmaybe_by_scalar 2 4 1 0 + f16_dq_fmacmaybe_by_scalar 1 8 7 3 diff --git a/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.d b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.d new file mode 100644 index 0000000..28b99f1 --- /dev/null +++ b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.d @@ -0,0 +1,4 @@ +#name: VMUL/VMLA/VMLS by scalar reg restriction +#source: simd_by_scalar_low_regbank.s +#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 +#error-output: simd_by_scalar_low_regbank.l diff --git a/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.l b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.l new file mode 100644 index 0000000..d6435cc --- /dev/null +++ b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.l @@ -0,0 +1,49 @@ +[^:]*: Assembler messages: +[^:]*:21: Error: scalar out of range for multiply instruction -- `vmul.i32 d3,d12,d7\[2\]' +[^:]*:21: Error: scalar out of range for multiply instruction -- `vmul.i32 q3,q12,d7\[2\]' +[^:]*:21: Error: scalar out of range for multiply instruction -- `vmul.f32 d3,d12,d7\[2\]' +[^:]*:21: Error: scalar out of range for multiply instruction -- `vmul.f32 q3,q12,d7\[2\]' +[^:]*:22: Error: scalar out of range for multiply instruction -- `vmul.i16 d4,d9,d8\[1\]' +[^:]*:22: Error: scalar out of range for multiply instruction -- `vmul.i16 q4,q9,d8\[1\]' +[^:]*:22: Error: scalar out of range for multiply instruction -- `vmul.f16 d4,d9,d8\[1\]' +[^:]*:22: Error: scalar out of range for multiply instruction -- `vmul.f16 q4,q9,d8\[1\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i16 d13,d6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i16 q13,q6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f16 d13,d6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f16 q13,q6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i32 d13,d6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.i32 q13,q6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f32 d13,d6,d15\[3\]' +[^:]*:23: Error: scalar out of range for multiply instruction -- `vmul.f32 q13,q6,d15\[3\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.i32 d5,d4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.i32 q5,q4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.f32 d5,d4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmla.f32 q5,q4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.i32 d5,d4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.i32 q5,q4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.f32 d5,d4,d6\[2\]' +[^:]*:25: Error: scalar out of range for multiply instruction -- `vmls.f32 q5,q4,d6\[2\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmla.i16 d4,d13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmla.i16 q4,q13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmla.f16 d4,d13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmla.f16 q4,q13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmls.i16 d4,d13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmls.i16 q4,q13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmls.f16 d4,d13,d10\[1\]' +[^:]*:26: Error: scalar out of range for multiply instruction -- `vmls.f16 q4,q13,d10\[1\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.i16 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.i16 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.i32 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.i32 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.f16 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.f16 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.f32 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmla.f32 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.i16 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.i16 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.i32 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.i32 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.f16 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.f16 q12,q6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.f32 d12,d6,d13\[3\]' +[^:]*:27: Error: scalar out of range for multiply instruction -- `vmls.f32 q12,q6,d13\[3\]' diff --git a/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.s b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.s new file mode 100644 index 0000000..ed73b74 --- /dev/null +++ b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank.s @@ -0,0 +1,27 @@ + .macro vmul_iter reg0 reg1 reg2 idx + .irp op, vmul.i16 vmul.f16 vmul.i32 vmul.f32 + \op d\reg0, d\reg1, d\reg2[\idx] + \op q\reg0, q\reg1, d\reg2[\idx] + .endr + .endm + + .macro vmul_acc_iter reg0 reg1 reg2 idx + .irp op, vmla.i16 vmla.i32 vmla.f16 vmla.f32 vmls.i16 vmls.i32 vmls.f16 vmls.f32 + \op d\reg0, d\reg1, d\reg2[\idx] + \op q\reg0, q\reg1, d\reg2[\idx] + .endr + .endm + + # There are two restriction on the scalar operand: + # * The scalar operand is restricted to D0-D7 if size is 16bit wide, + # or D0 - D15 otherwise. + # * The scalar index should within range, 0-3 if size is 16bit wide, + # 0-1 if size is 32bit wide. + vmul_iter 0 1 3 0 + vmul_iter 3 12 7 2 + vmul_iter 4 9 8 1 + vmul_iter 13 6 15 3 + vmul_acc_iter 2 7 1 0 + vmul_acc_iter 5 4 6 2 + vmul_acc_iter 4 13 10 1 + vmul_acc_iter 12 6 13 3 diff --git a/gas/testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d new file mode 100644 index 0000000..f4e1980 --- /dev/null +++ b/gas/testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d @@ -0,0 +1,4 @@ +#name: VMUL/VMLA/VMLS by scalar reg restriction (Thumb) +#source: simd_by_scalar_low_regbank.s +#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb +#error-output: simd_by_scalar_low_regbank.l |