aarch64: testsuite: share test utils macros and use them

This patch rewrites assembly tests to use utils macros declared in
sysreg-test-utils.inc. Some tests were adapted to use the new macro
rw_sys_reg.

23 files changed, 576 insertions, 519 deletions

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d
index 2471b6b..1160ec0 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d
+++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d
@@ -1,3 +1,3 @@
-#as: -march=armv8.8-a
 #source: armv8_9-a-sysregs.s
+#as: -march=armv8.8-a -I$srcdir/$subdir
 #error_output: armv8_9-a-sysregs-bad.l
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l
index d98c2ed..05431cc 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l
+++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l
@@ -1,90 +1,170 @@
 .*: Assembler messages:
 .*: Error: selected processor does not support system register name 'pmsdsfr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmsdsfr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'erxgsr_el1'
 .*: Error: selected processor does not support system register name 'sctlr2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'sctlr2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hdfgrtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hdfgrtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hdfgwtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hdfgwtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hfgrtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hfgrtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hfgwtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'hfgwtr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pfar_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 's1e1a'
 .*: Error: selected processor does not support system register name 's1e2a'
 .*: Error: selected processor does not support system register name 's1e3a'
 .*: Error: selected processor does not support system register name 'amair2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'amair2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mair2_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pir_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pire0_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 's2pir_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 's2pir_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'por_el3'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 's2por_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 's2por_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el12'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'tcr2_el2'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mdselr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'mdselr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmuacr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmuacr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmccntsvr_el1'
 .*: Error: selected processor does not support system register name 'pmicntsvr_el1'
 .*: Error: selected processor does not support system register name 'pmsscr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmsscr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmevcntsvr0_el1'
 .*: Error: selected processor does not support system register name 'pmevcntsvr10_el1'
 .*: Error: selected processor does not support system register name 'pmevcntsvr11_el1'
@@ -116,11 +196,19 @@
 .*: Error: selected processor does not support system register name 'pmevcntsvr8_el1'
 .*: Error: selected processor does not support system register name 'pmevcntsvr9_el1'
 .*: Error: selected processor does not support system register name 'pmicntr_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmicntr_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmicfiltr_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmicfiltr_el0'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmzr_el0'
 .*: Error: selected processor does not support system register name 'pmecr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmecr_el1'
+.*:  Info: macro invoked from here
 .*: Error: selected processor does not support system register name 'pmiar_el1'
-.*: Error: selected processor does not support system register name 'pmiar_el1'
\ No newline at end of file
+.*:  Info: macro invoked from here
+.*: Error: selected processor does not support system register name 'pmiar_el1'
+.*:  Info: macro invoked from here
\ No newline at end of file
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
index ac32b80..9913c2b 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
+++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d
@@ -1,4 +1,5 @@
-#as: -march=armv8.9-a
+#source: armv8_9-a-sysregs.s
+#as: -march=armv8.9-a -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s
index bf9019c..318d8bb 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s
+++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s
@@ -1,32 +1,23 @@
-	msr PMSDSFR_EL1, x3
-	mrs x3, PMSDSFR_EL1
+	.include "sysreg-test-utils.inc"
+
+.text
+	rw_sys_reg sys_reg=PMSDSFR_EL1 xreg=x3 r=1 w=1
 
 	mrs x0, ERXGSR_EL1
 
-	msr SCTLR2_EL1, x3
-	mrs x3, SCTLR2_EL1
-	msr SCTLR2_EL12, x3
-	mrs x3, SCTLR2_EL12
-	msr SCTLR2_EL2, x3
-	mrs x3, SCTLR2_EL2
-	msr SCTLR2_EL3, x3
-	mrs x3, SCTLR2_EL3
-
-	msr HDFGRTR2_EL2, x3
-	mrs x3, HDFGRTR2_EL2
-	msr HDFGWTR2_EL2, x3
-	mrs x3, HDFGWTR2_EL2
-	msr HFGRTR2_EL2, x3
-	mrs x3, HFGRTR2_EL2
-	msr HFGWTR2_EL2, x3
-	mrs x3, HFGWTR2_EL2
-
-	msr PFAR_EL1, x0
-	mrs x0, PFAR_EL1
-	msr PFAR_EL2, x0
-	mrs x0, PFAR_EL2
-	msr PFAR_EL12, x0
-	mrs x0, PFAR_EL12
+	rw_sys_reg sys_reg=SCTLR2_EL1 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=SCTLR2_EL12 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=SCTLR2_EL2 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=SCTLR2_EL3 xreg=x3 r=1 w=1
+
+	rw_sys_reg sys_reg=HDFGRTR2_EL2 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=HDFGWTR2_EL2 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=HFGRTR2_EL2 xreg=x3 r=1 w=1
+	rw_sys_reg sys_reg=HFGWTR2_EL2 xreg=x3 r=1 w=1
+
+	rw_sys_reg sys_reg=PFAR_EL1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=PFAR_EL2 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=PFAR_EL12 xreg=x0 r=1 w=1
 
 	/* AT.  */
 	at s1e1a, x1
@@ -34,80 +25,52 @@
 	at s1e3a, x5
 
 	/* FEAT_AIE.  */
-	msr amair2_el1, x0
-	mrs x0, amair2_el1
-	msr amair2_el12, x0
-	mrs x0, amair2_el12
-	msr amair2_el2, x0
-	mrs x0, amair2_el2
-	msr amair2_el3, x0
-	mrs x0, amair2_el3
-	msr mair2_el1, x0
-	mrs x0, mair2_el1
-	msr mair2_el12, x0
-	mrs x0, mair2_el12
-	msr mair2_el2, x0
-	mrs x0, mair2_el2
-	msr mair2_el3, x0
-	mrs x0, mair2_el3
+	rw_sys_reg sys_reg=amair2_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=amair2_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=amair2_el2 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=amair2_el3 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=mair2_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=mair2_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=mair2_el2 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=mair2_el3 xreg=x0 r=1 w=1
 
 	/* FEAT_S1PIE.  */
-	msr pir_el1, x0
-	mrs x0, pir_el1
-	msr pir_el12, x0
-	mrs x0, pir_el12
-	msr pir_el2, x0
-	mrs x0, pir_el2
-	msr pir_el3, x0
-	mrs x0, pir_el3
-	msr pire0_el1, x0
-	mrs x0, pire0_el1
-	msr pire0_el12, x0
-	mrs x0, pire0_el12
-	msr pire0_el2, x0
-	mrs x0, pire0_el2
+	rw_sys_reg sys_reg=pir_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pir_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pir_el2 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pir_el3 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pire0_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pire0_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pire0_el2 xreg=x0 r=1 w=1
 
 	/* FEAT_S2PIE.  */
-	msr s2pir_el2, x0
-	mrs x0, s2pir_el2
+	rw_sys_reg sys_reg=s2pir_el2 xreg=x0 r=1 w=1
 
 	/* FEAT_S1POE.  */
-	msr por_el0, x0
-	mrs x0, por_el0
-	msr por_el1, x0
-	mrs x0, por_el1
-	msr por_el12, x0
-	mrs x0, por_el12
-	msr por_el2, x0
-	mrs x0, por_el2
-	msr por_el3, x0
-	mrs x0, por_el3
+	rw_sys_reg sys_reg=por_el0 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=por_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=por_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=por_el2 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=por_el3 xreg=x0 r=1 w=1
 
 	/* FEAT_S21POE.  */
-	msr s2por_el1, x0
-	mrs x0, s2por_el1
+	rw_sys_reg sys_reg=s2por_el1 xreg=x0 r=1 w=1
 
 	/* FEAT_TCR2.  */
-	msr tcr2_el1, x0
-	mrs x0, tcr2_el1
-	msr tcr2_el12, x0
-	mrs x0, tcr2_el12
-	msr tcr2_el2, x0
-	mrs x0, tcr2_el2
+	rw_sys_reg sys_reg=tcr2_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=tcr2_el12 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=tcr2_el2 xreg=x0 r=1 w=1
 
 	/* FEAT_DEBUGv8p9 Extension.  */
-	msr mdselr_el1, x0
-	mrs x0, mdselr_el1
+	rw_sys_reg sys_reg=mdselr_el1 xreg=x0 r=1 w=1
 
 	/* FEAT_PMUv3p9 Extension.  */
-	msr pmuacr_el1, x0
-	mrs x0, pmuacr_el1
+	rw_sys_reg sys_reg=pmuacr_el1 xreg=x0 r=1 w=1
 
 	/* FEAT_PMUv3_SS Extension.  */
 	mrs x0, pmccntsvr_el1
 	mrs x0, pmicntsvr_el1
-	msr pmsscr_el1, x0
-	mrs x0, pmsscr_el1
+	rw_sys_reg sys_reg=pmsscr_el1 xreg=x0 r=1 w=1
 	mrs x0, pmevcntsvr0_el1
 	mrs x0, pmevcntsvr10_el1
 	mrs x0, pmevcntsvr11_el1
@@ -140,14 +103,10 @@
 	mrs x0, pmevcntsvr9_el1
 
 	/* FEAT_PMUv3_ICNTR Extension.  */
-	msr pmicntr_el0, x0
-	mrs x0, pmicntr_el0
-	msr pmicfiltr_el0, x0
-	mrs x0, pmicfiltr_el0
+	rw_sys_reg sys_reg=pmicntr_el0 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pmicfiltr_el0 xreg=x0 r=1 w=1
 	msr pmzr_el0, x0
 
 	/* FEAT_SEBEP Extension.  */
-	msr pmecr_el1, x0
-	mrs x0, pmecr_el1
-	msr pmiar_el1, x0
-	mrs x0, pmiar_el1
+	rw_sys_reg sys_reg=pmecr_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=pmiar_el1 xreg=x0 r=1 w=1
diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d
index 932eb54..6918395 100644
--- a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d
+++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d
@@ -1,3 +1,3 @@
-#as: -march=armv8-a
 #source: sysreg-3.s
+#as: -march=armv8-a -I$srcdir/$subdir
 #error_output: illegal-sysreg-3.l
diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d
index e181566..34dd4e4 100644
--- a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d
+++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d
@@ -1,3 +1,3 @@
-#as: -march=armv8-a
 #source: sysreg-4.s
+#as: -march=armv8-a
 #error_output: illegal-sysreg-4.l
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d
index fb9991d..cecb1ad 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d
@@ -1,3 +1,5 @@
+#source: sysreg-1.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s
index 82a86d3..16d8f93 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s
@@ -19,111 +19,104 @@
    along with this program; see the file COPYING3. If not,
    see <http://www.gnu.org/licenses/>.  */
 
-	.macro rw_sys_reg sys_reg xreg r w
-	.ifc \w, 1
-	msr \sys_reg, \xreg
-	.endif
-	.ifc \r, 1
-	mrs \xreg, \sys_reg
-	.endif
-	.endm
+	.include "sysreg-test-utils.inc"
 
 	.text
 
-	rw_sys_reg sys_reg=id_aa64afr0_el1 xreg=x7 r=1 w=0
-	rw_sys_reg sys_reg=id_aa64afr1_el1 xreg=x7 r=1 w=0
-	rw_sys_reg sys_reg=mvfr2_el1 xreg=x7 r=1 w=0
-	rw_sys_reg sys_reg=dlr_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=dspsr_el0 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=sder32_el3 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=mdcr_el3 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=mdccint_el1 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=dbgvcr32_el2 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=fpexc32_el2 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=teecr32_el1 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=teehbr32_el1 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=cntp_tval_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntp_ctl_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntp_cval_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntps_tval_el1 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntps_ctl_el1 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntps_cval_el1 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=pmccntr_el0 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=pmevcntr0_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr1_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr2_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr3_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr4_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr5_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr6_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr7_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr8_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr9_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr10_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr11_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr12_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr13_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr14_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr15_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr16_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr17_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr18_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr19_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr20_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr21_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr22_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr23_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr24_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr25_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr26_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr27_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr28_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr29_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevcntr30_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper0_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper1_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper2_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper3_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper4_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper5_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper6_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper7_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper8_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper9_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper10_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper11_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper12_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper13_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper14_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper15_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper16_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper17_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper18_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper19_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper20_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper21_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper22_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper23_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper24_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper25_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper26_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper27_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper28_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper29_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmevtyper30_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=pmccfiltr_el0 xreg=x7 r=1 w=1
-
-	rw_sys_reg sys_reg=tpidrro_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=tpidr_el0 xreg=x7 r=1 w=1
-	rw_sys_reg sys_reg=cntfrq_el0 xreg=x7 r=1 w=1
+	rw_sys_reg sys_reg=id_aa64afr0_el1 xreg=x7 w=0
+	rw_sys_reg sys_reg=id_aa64afr1_el1 xreg=x7 w=0
+	rw_sys_reg sys_reg=mvfr2_el1 xreg=x7 w=0
+	rw_sys_reg sys_reg=dlr_el0 xreg=x7
+	rw_sys_reg sys_reg=dspsr_el0 xreg=x7
+
+	rw_sys_reg sys_reg=sder32_el3 xreg=x7
+	rw_sys_reg sys_reg=mdcr_el3 xreg=x7
+
+	rw_sys_reg sys_reg=mdccint_el1 xreg=x7
+
+	rw_sys_reg sys_reg=dbgvcr32_el2 xreg=x7
+
+	rw_sys_reg sys_reg=fpexc32_el2 xreg=x7
+
+	rw_sys_reg sys_reg=teecr32_el1 xreg=x7
+	rw_sys_reg sys_reg=teehbr32_el1 xreg=x7
+
+	rw_sys_reg sys_reg=cntp_tval_el0 xreg=x7
+	rw_sys_reg sys_reg=cntp_ctl_el0 xreg=x7
+	rw_sys_reg sys_reg=cntp_cval_el0 xreg=x7
+	rw_sys_reg sys_reg=cntps_tval_el1 xreg=x7
+	rw_sys_reg sys_reg=cntps_ctl_el1 xreg=x7
+	rw_sys_reg sys_reg=cntps_cval_el1 xreg=x7
+
+	rw_sys_reg sys_reg=pmccntr_el0 xreg=x7
+
+	rw_sys_reg sys_reg=pmevcntr0_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr1_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr2_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr3_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr4_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr5_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr6_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr7_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr8_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr9_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr10_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr11_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr12_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr13_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr14_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr15_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr16_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr17_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr18_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr19_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr20_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr21_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr22_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr23_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr24_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr25_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr26_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr27_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr28_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr29_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevcntr30_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper0_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper1_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper2_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper3_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper4_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper5_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper6_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper7_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper8_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper9_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper10_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper11_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper12_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper13_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper14_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper15_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper16_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper17_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper18_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper19_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper20_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper21_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper22_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper23_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper24_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper25_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper26_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper27_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper28_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper29_el0 xreg=x7
+	rw_sys_reg sys_reg=pmevtyper30_el0 xreg=x7
+	rw_sys_reg sys_reg=pmccfiltr_el0 xreg=x7
+
+	rw_sys_reg sys_reg=tpidrro_el0 xreg=x7
+	rw_sys_reg sys_reg=tpidr_el0 xreg=x7
+	rw_sys_reg sys_reg=cntfrq_el0 xreg=x7
 
 	//
 	// Macros to generate MRS and MSR with all the implementation defined
@@ -156,19 +149,19 @@
 	all_imple_defined	0, 7
 	.noaltmacro
 
-	rw_sys_reg sys_reg=dbgdtr_el0 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=dbgdtrrx_el0 xreg=x15 r=1 w=0
+	rw_sys_reg sys_reg=dbgdtr_el0 xreg=x15
+	rw_sys_reg sys_reg=dbgdtrrx_el0 xreg=x15 w=0
 
-	rw_sys_reg sys_reg=rmr_el1 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=rmr_el2 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=rmr_el3 xreg=x15 r=1 w=1
+	rw_sys_reg sys_reg=rmr_el1 xreg=x15
+	rw_sys_reg sys_reg=rmr_el2 xreg=x15
+	rw_sys_reg sys_reg=rmr_el3 xreg=x15
 
-	rw_sys_reg sys_reg=spsr_el1 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=spsr_el2 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=spsr_el3 xreg=x15 r=1 w=1
+	rw_sys_reg sys_reg=spsr_el1 xreg=x15
+	rw_sys_reg sys_reg=spsr_el2 xreg=x15
+	rw_sys_reg sys_reg=spsr_el3 xreg=x15
 
-	rw_sys_reg sys_reg=s0_0_C0_C0_0 xreg=x15 r=1 w=1
-	rw_sys_reg sys_reg=s1_7_C15_C15_7 xreg=x27 r=1 w=1
-	rw_sys_reg sys_reg=s2_4_C6_C8_0 xreg=x14 r=1 w=1
-	rw_sys_reg sys_reg=s1_2_C14_C4_2 xreg=x4 r=1 w=1
-	rw_sys_reg sys_reg=s0_1_C13_C1_3 xreg=x7 r=1 w=1
+	rw_sys_reg sys_reg=s0_0_C0_C0_0 xreg=x15
+	rw_sys_reg sys_reg=s1_7_C15_C15_7 xreg=x27
+	rw_sys_reg sys_reg=s2_4_C6_C8_0 xreg=x14
+	rw_sys_reg sys_reg=s1_2_C14_C4_2 xreg=x4
+	rw_sys_reg sys_reg=s0_1_C13_C1_3 xreg=x7
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
index 0a3a0c7..1845902 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
@@ -1,5 +1,6 @@
+#source: sysreg-2.s
+#as: -march=armv8.2-a+profile -I$srcdir/$subdir
 #objdump: -dr
-#as: -march=armv8.2-a+profile
 
 .*:     file .*
 
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
index 315e641..5ffb83a 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
@@ -1,37 +1,30 @@
 /* sysreg-2.s Test file for ARMv8.2 system registers.  */
 
-	.macro rw_sys_reg sys_reg xreg r w
-	.ifc \w, 1
-	msr \sys_reg, \xreg
-	.endif
-	.ifc \r, 1
-	mrs \xreg, \sys_reg
-	.endif
-	.endm
+	.include "sysreg-test-utils.inc"
 
 	.text
 
-	rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x0 r=1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr1_el1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr2_el1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr3_el1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr4_el1 w=0
 
 	/* RAS extension.  */
 
-	rw_sys_reg sys_reg=erridr_el1 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=errselr_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=erridr_el1 w=0
+	rw_sys_reg sys_reg=errselr_el1
 
-	rw_sys_reg sys_reg=erxfr_el1 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=erxctlr_el1 xreg=x0 r=1 w=1
-	rw_sys_reg sys_reg=erxstatus_el1 xreg=x0 r=1 w=1
-	rw_sys_reg sys_reg=erxaddr_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=erxfr_el1 w=0
+	rw_sys_reg sys_reg=erxctlr_el1
+	rw_sys_reg sys_reg=erxstatus_el1
+	rw_sys_reg sys_reg=erxaddr_el1
 
-	rw_sys_reg sys_reg=erxmisc0_el1 xreg=x0 r=1 w=1
-	rw_sys_reg sys_reg=erxmisc1_el1 xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=erxmisc0_el1
+	rw_sys_reg sys_reg=erxmisc1_el1
 
-	rw_sys_reg sys_reg=vsesr_el2 xreg=x0 r=1 w=0
-	rw_sys_reg sys_reg=disr_el1 xreg=x0 r=1 w=1
-	rw_sys_reg sys_reg=vdisr_el2 xreg=x0 r=1 w=0
+	rw_sys_reg sys_reg=vsesr_el2 w=0
+	rw_sys_reg sys_reg=disr_el1
+	rw_sys_reg sys_reg=vdisr_el2 w=0
 
 	/* DC CVAP.  */
 
@@ -47,17 +40,17 @@
 	/* Statistical profiling.  */
 
 	.irp reg, pmblimitr_el1, pmbptr_el1, pmbsr_el1
-	rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=\reg
 	.endr
 
 	.irp reg, pmscr_el1, pmsicr_el1, pmsirr_el1, pmsfcr_el1
-	rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=\reg
 	.endr
 
 	.irp reg, pmsevfr_el1, pmslatfr_el1, pmscr_el2, pmscr_el12
-	rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
+	rw_sys_reg sys_reg=\reg
 	.endr
 
 	.irp reg, pmbidr_el1, pmsidr_el1
-	rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=0
+	rw_sys_reg sys_reg=\reg w=0
 	.endr
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
index 5ed05d6..0135762 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
@@ -1,5 +1,6 @@
+#source: sysreg-3.s
+#as: -march=armv8.3-a -I$srcdir/$subdir
 #objdump: -dr
-#as: -march=armv8.3-a
 
 .*:     file .*
 
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
index b45f89f..53c6da8 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
@@ -1,21 +1,18 @@
 /* sysreg-3.s Test file for ARMv8.3 system registers.  */
 
-	.macro test sys_reg xreg
-	msr \sys_reg, \xreg
-	mrs \xreg, \sys_reg
-	.endm
+	.include "sysreg-test-utils.inc"
 
 	.text
 
-	test sys_reg=apiakeylo_el1 xreg=x0
-	test sys_reg=apiakeyhi_el1 xreg=x0
-	test sys_reg=apibkeylo_el1 xreg=x0
-	test sys_reg=apibkeyhi_el1 xreg=x0
+	rw_sys_reg sys_reg=apiakeylo_el1
+	rw_sys_reg sys_reg=apiakeyhi_el1
+	rw_sys_reg sys_reg=apibkeylo_el1
+	rw_sys_reg sys_reg=apibkeyhi_el1
 
-	test sys_reg=apdakeylo_el1 xreg=x0
-	test sys_reg=apdakeyhi_el1 xreg=x0
-	test sys_reg=apdbkeylo_el1 xreg=x0
-	test sys_reg=apdbkeyhi_el1 xreg=x0
+	rw_sys_reg sys_reg=apdakeylo_el1
+	rw_sys_reg sys_reg=apdakeyhi_el1
+	rw_sys_reg sys_reg=apdbkeylo_el1
+	rw_sys_reg sys_reg=apdbkeyhi_el1
 
-	test sys_reg=apgakeylo_el1 xreg=x0
-	test sys_reg=apgakeyhi_el1 xreg=x0
+	rw_sys_reg sys_reg=apgakeylo_el1
+	rw_sys_reg sys_reg=apgakeyhi_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d
index ac928ce..cb9c46e 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d
@@ -1,3 +1,5 @@
+#source: sysreg-6.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s
index c6772ae..1612985 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s
@@ -1,2 +1,5 @@
-msr hcr_el2, x0
-mrs x0,hcr_el2
+	.include "sysreg-test-utils.inc"
+
+	.text
+
+	rw_sys_reg sys_reg=hcr_el2
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d
index 5d74fd7..846ab8b 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d
@@ -1,3 +1,5 @@
+#source: sysreg-7.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s
index 8354a44..e371f19 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s
@@ -1,20 +1,16 @@
-.arch armv8-a+lor
+	.include "sysreg-test-utils.inc"
 
-msr lorc_el1, x0
-mrs x0, lorc_el1
-msr lorea_el1, x0
-mrs x0, lorea_el1
-msr lorn_el1, x0
-mrs x0, lorn_el1
-msr lorsa_el1, x0
-mrs x0, lorsa_el1
-msr icc_ctlr_el3, x0
-mrs x0, icc_ctlr_el3
-msr icc_sre_el1, x0
-mrs x0, icc_sre_el1
-msr icc_sre_el2, x0
-mrs x0, icc_sre_el2
-msr icc_sre_el3, x0
-mrs x0, icc_sre_el3
+	.text
 
-mrs x0, ich_vtr_el2
+	.arch armv8-a+lor
+
+	rw_sys_reg sys_reg=lorc_el1
+	rw_sys_reg sys_reg=lorea_el1
+	rw_sys_reg sys_reg=lorn_el1
+	rw_sys_reg sys_reg=lorsa_el1
+	rw_sys_reg sys_reg=icc_ctlr_el3
+	rw_sys_reg sys_reg=icc_sre_el1
+	rw_sys_reg sys_reg=icc_sre_el2
+	rw_sys_reg sys_reg=icc_sre_el3
+
+	rw_sys_reg sys_reg=ich_vtr_el2 w=0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
index d93b4c7..4ee851f 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
@@ -1,3 +1,5 @@
+#source: sysreg-8.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
index 04bd30d..0cf1178 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
@@ -1,192 +1,183 @@
-	.macro	roreg, name
-	mrs	x0, \name
-	.endm
-
-	.macro	woreg, name
-	msr	\name, x0
-	.endm
-
-	.macro	rwreg, name
-	msr	\name, x0
-	mrs	x0, \name
-	.endm
-
-	roreg	id_dfr1_el1
-	roreg	id_mmfr5_el1
-	roreg	id_isar6_el1
-
-	rwreg	icc_pmr_el1
-	roreg	icc_iar0_el1
-	woreg	icc_eoir0_el1
-	roreg	icc_hppir0_el1
-	rwreg	icc_bpr0_el1
-	rwreg	icc_ap0r0_el1
-	rwreg	icc_ap0r1_el1
-	rwreg	icc_ap0r2_el1
-	rwreg	icc_ap0r3_el1
-	rwreg	icc_ap1r0_el1
-	rwreg	icc_ap1r1_el1
-	rwreg	icc_ap1r2_el1
-	rwreg	icc_ap1r3_el1
-	woreg	icc_dir_el1
-	roreg	icc_rpr_el1
-	woreg	icc_sgi1r_el1
-	woreg	icc_asgi1r_el1
-	woreg	icc_sgi0r_el1
-	roreg	icc_iar1_el1
-	woreg	icc_eoir1_el1
-	roreg	icc_hppir1_el1
-	rwreg	icc_bpr1_el1
-	rwreg	icc_ctlr_el1
-	rwreg	icc_igrpen0_el1
-	rwreg	icc_igrpen1_el1
-	rwreg	ich_ap0r0_el2
-	rwreg	ich_ap0r1_el2
-	rwreg	ich_ap0r2_el2
-	rwreg	ich_ap0r3_el2
-	rwreg	ich_ap1r0_el2
-	rwreg	ich_ap1r1_el2
-	rwreg	ich_ap1r2_el2
-	rwreg	ich_ap1r3_el2
-	rwreg	ich_hcr_el2
-	roreg	ich_misr_el2
-	roreg	ich_eisr_el2
-	roreg	ich_elrsr_el2
-	rwreg	ich_vmcr_el2
-	rwreg	ich_lr0_el2
-	rwreg	ich_lr1_el2
-	rwreg	ich_lr2_el2
-	rwreg	ich_lr3_el2
-	rwreg	ich_lr4_el2
-	rwreg	ich_lr5_el2
-	rwreg	ich_lr6_el2
-	rwreg	ich_lr7_el2
-	rwreg	ich_lr8_el2
-	rwreg	ich_lr9_el2
-	rwreg	ich_lr10_el2
-	rwreg	ich_lr11_el2
-	rwreg	ich_lr12_el2
-	rwreg	ich_lr13_el2
-	rwreg	ich_lr14_el2
-	rwreg	ich_lr15_el2
-	rwreg	icc_igrpen1_el3
+	.include "sysreg-test-utils.inc"
+
+	.text
+
+	rw_sys_reg	id_dfr1_el1 w=0
+	rw_sys_reg	id_mmfr5_el1 w=0
+	rw_sys_reg	id_isar6_el1 w=0
+
+	rw_sys_reg	icc_pmr_el1
+	rw_sys_reg	icc_iar0_el1 w=0
+	rw_sys_reg	icc_eoir0_el1 r=0
+	rw_sys_reg	icc_hppir0_el1 w=0
+	rw_sys_reg	icc_bpr0_el1
+	rw_sys_reg	icc_ap0r0_el1
+	rw_sys_reg	icc_ap0r1_el1
+	rw_sys_reg	icc_ap0r2_el1
+	rw_sys_reg	icc_ap0r3_el1
+	rw_sys_reg	icc_ap1r0_el1
+	rw_sys_reg	icc_ap1r1_el1
+	rw_sys_reg	icc_ap1r2_el1
+	rw_sys_reg	icc_ap1r3_el1
+	rw_sys_reg	icc_dir_el1 r=0
+	rw_sys_reg	icc_rpr_el1 w=0
+	rw_sys_reg	icc_sgi1r_el1 r=0
+	rw_sys_reg	icc_asgi1r_el1 r=0
+	rw_sys_reg	icc_sgi0r_el1 r=0
+	rw_sys_reg	icc_iar1_el1 w=0
+	rw_sys_reg	icc_eoir1_el1 r=0
+	rw_sys_reg	icc_hppir1_el1 w=0
+	rw_sys_reg	icc_bpr1_el1
+	rw_sys_reg	icc_ctlr_el1
+	rw_sys_reg	icc_igrpen0_el1
+	rw_sys_reg	icc_igrpen1_el1
+	rw_sys_reg	ich_ap0r0_el2
+	rw_sys_reg	ich_ap0r1_el2
+	rw_sys_reg	ich_ap0r2_el2
+	rw_sys_reg	ich_ap0r3_el2
+	rw_sys_reg	ich_ap1r0_el2
+	rw_sys_reg	ich_ap1r1_el2
+	rw_sys_reg	ich_ap1r2_el2
+	rw_sys_reg	ich_ap1r3_el2
+	rw_sys_reg	ich_hcr_el2
+	rw_sys_reg	ich_misr_el2 w=0
+	rw_sys_reg	ich_eisr_el2 w=0
+	rw_sys_reg	ich_elrsr_el2 w=0
+	rw_sys_reg	ich_vmcr_el2
+	rw_sys_reg	ich_lr0_el2
+	rw_sys_reg	ich_lr1_el2
+	rw_sys_reg	ich_lr2_el2
+	rw_sys_reg	ich_lr3_el2
+	rw_sys_reg	ich_lr4_el2
+	rw_sys_reg	ich_lr5_el2
+	rw_sys_reg	ich_lr6_el2
+	rw_sys_reg	ich_lr7_el2
+	rw_sys_reg	ich_lr8_el2
+	rw_sys_reg	ich_lr9_el2
+	rw_sys_reg	ich_lr10_el2
+	rw_sys_reg	ich_lr11_el2
+	rw_sys_reg	ich_lr12_el2
+	rw_sys_reg	ich_lr13_el2
+	rw_sys_reg	ich_lr14_el2
+	rw_sys_reg	ich_lr15_el2
+	rw_sys_reg	icc_igrpen1_el3
 
 	.arch	armv8.1-a
 
-	roreg	lorid_el1
+	rw_sys_reg	lorid_el1 w=0
 
 	.arch	armv8.3-a
 
-	roreg	ccsidr2_el1
+	rw_sys_reg	ccsidr2_el1 w=0
 
 	.arch	armv8.4-a
 
-	rwreg	trfcr_el1
-	roreg	pmmir_el1
-	rwreg	trfcr_el2
-
-	rwreg	trfcr_el12
-
-	rwreg	amcr_el0
-	roreg	amcfgr_el0
-	roreg	amcgcr_el0
-	rwreg	amuserenr_el0
-	rwreg	amcntenclr0_el0
-	rwreg	amcntenset0_el0
-	rwreg	amcntenclr1_el0
-	rwreg	amcntenset1_el0
-	rwreg	amevcntr00_el0
-	rwreg	amevcntr01_el0
-	rwreg	amevcntr02_el0
-	rwreg	amevcntr03_el0
-	roreg	amevtyper00_el0
-	roreg	amevtyper01_el0
-	roreg	amevtyper02_el0
-	roreg	amevtyper03_el0
-	rwreg	amevcntr10_el0
-	rwreg	amevcntr11_el0
-	rwreg	amevcntr12_el0
-	rwreg	amevcntr13_el0
-	rwreg	amevcntr14_el0
-	rwreg	amevcntr15_el0
-	rwreg	amevcntr16_el0
-	rwreg	amevcntr17_el0
-	rwreg	amevcntr18_el0
-	rwreg	amevcntr19_el0
-	rwreg	amevcntr110_el0
-	rwreg	amevcntr111_el0
-	rwreg	amevcntr112_el0
-	rwreg	amevcntr113_el0
-	rwreg	amevcntr114_el0
-	rwreg	amevcntr115_el0
-	rwreg	amevtyper10_el0
-	rwreg	amevtyper11_el0
-	rwreg	amevtyper12_el0
-	rwreg	amevtyper13_el0
-	rwreg	amevtyper14_el0
-	rwreg	amevtyper15_el0
-	rwreg	amevtyper16_el0
-	rwreg	amevtyper17_el0
-	rwreg	amevtyper18_el0
-	rwreg	amevtyper19_el0
-	rwreg	amevtyper110_el0
-	rwreg	amevtyper111_el0
-	rwreg	amevtyper112_el0
-	rwreg	amevtyper113_el0
-	rwreg	amevtyper114_el0
-	rwreg	amevtyper115_el0
+	rw_sys_reg	trfcr_el1
+	rw_sys_reg	pmmir_el1 w=0
+	rw_sys_reg	trfcr_el2
+
+	rw_sys_reg	trfcr_el12
+
+	rw_sys_reg	amcr_el0
+	rw_sys_reg	amcfgr_el0 w=0
+	rw_sys_reg	amcgcr_el0 w=0
+	rw_sys_reg	amuserenr_el0
+	rw_sys_reg	amcntenclr0_el0
+	rw_sys_reg	amcntenset0_el0
+	rw_sys_reg	amcntenclr1_el0
+	rw_sys_reg	amcntenset1_el0
+	rw_sys_reg	amevcntr00_el0
+	rw_sys_reg	amevcntr01_el0
+	rw_sys_reg	amevcntr02_el0
+	rw_sys_reg	amevcntr03_el0
+	rw_sys_reg	amevtyper00_el0 w=0
+	rw_sys_reg	amevtyper01_el0 w=0
+	rw_sys_reg	amevtyper02_el0 w=0
+	rw_sys_reg	amevtyper03_el0 w=0
+	rw_sys_reg	amevcntr10_el0
+	rw_sys_reg	amevcntr11_el0
+	rw_sys_reg	amevcntr12_el0
+	rw_sys_reg	amevcntr13_el0
+	rw_sys_reg	amevcntr14_el0
+	rw_sys_reg	amevcntr15_el0
+	rw_sys_reg	amevcntr16_el0
+	rw_sys_reg	amevcntr17_el0
+	rw_sys_reg	amevcntr18_el0
+	rw_sys_reg	amevcntr19_el0
+	rw_sys_reg	amevcntr110_el0
+	rw_sys_reg	amevcntr111_el0
+	rw_sys_reg	amevcntr112_el0
+	rw_sys_reg	amevcntr113_el0
+	rw_sys_reg	amevcntr114_el0
+	rw_sys_reg	amevcntr115_el0
+	rw_sys_reg	amevtyper10_el0
+	rw_sys_reg	amevtyper11_el0
+	rw_sys_reg	amevtyper12_el0
+	rw_sys_reg	amevtyper13_el0
+	rw_sys_reg	amevtyper14_el0
+	rw_sys_reg	amevtyper15_el0
+	rw_sys_reg	amevtyper16_el0
+	rw_sys_reg	amevtyper17_el0
+	rw_sys_reg	amevtyper18_el0
+	rw_sys_reg	amevtyper19_el0
+	rw_sys_reg	amevtyper110_el0
+	rw_sys_reg	amevtyper111_el0
+	rw_sys_reg	amevtyper112_el0
+	rw_sys_reg	amevtyper113_el0
+	rw_sys_reg	amevtyper114_el0
+	rw_sys_reg	amevtyper115_el0
 
 	.arch	armv8.6-a
 
-	roreg	amcg1idr_el0
-	roreg	cntpctss_el0
-	roreg	cntvctss_el0
-	rwreg	hfgrtr_el2
-	rwreg	hfgwtr_el2
-	rwreg	hfgitr_el2
-	rwreg	hdfgrtr_el2
-	rwreg	hdfgwtr_el2
-	rwreg	hafgrtr_el2
-	rwreg	amevcntvoff00_el2
-	rwreg	amevcntvoff01_el2
-	rwreg	amevcntvoff02_el2
-	rwreg	amevcntvoff03_el2
-	rwreg	amevcntvoff04_el2
-	rwreg	amevcntvoff05_el2
-	rwreg	amevcntvoff06_el2
-	rwreg	amevcntvoff07_el2
-	rwreg	amevcntvoff08_el2
-	rwreg	amevcntvoff09_el2
-	rwreg	amevcntvoff010_el2
-	rwreg	amevcntvoff011_el2
-	rwreg	amevcntvoff012_el2
-	rwreg	amevcntvoff013_el2
-	rwreg	amevcntvoff014_el2
-	rwreg	amevcntvoff015_el2
-	rwreg	amevcntvoff10_el2
-	rwreg	amevcntvoff11_el2
-	rwreg	amevcntvoff12_el2
-	rwreg	amevcntvoff13_el2
-	rwreg	amevcntvoff14_el2
-	rwreg	amevcntvoff15_el2
-	rwreg	amevcntvoff16_el2
-	rwreg	amevcntvoff17_el2
-	rwreg	amevcntvoff18_el2
-	rwreg	amevcntvoff19_el2
-	rwreg	amevcntvoff110_el2
-	rwreg	amevcntvoff111_el2
-	rwreg	amevcntvoff112_el2
-	rwreg	amevcntvoff113_el2
-	rwreg	amevcntvoff114_el2
-	rwreg	amevcntvoff115_el2
-	rwreg	cntpoff_el2
+	rw_sys_reg	amcg1idr_el0 w=0
+	rw_sys_reg	cntpctss_el0 w=0
+	rw_sys_reg	cntvctss_el0 w=0
+	rw_sys_reg	hfgrtr_el2
+	rw_sys_reg	hfgwtr_el2
+	rw_sys_reg	hfgitr_el2
+	rw_sys_reg	hdfgrtr_el2
+	rw_sys_reg	hdfgwtr_el2
+	rw_sys_reg	hafgrtr_el2
+	rw_sys_reg	amevcntvoff00_el2
+	rw_sys_reg	amevcntvoff01_el2
+	rw_sys_reg	amevcntvoff02_el2
+	rw_sys_reg	amevcntvoff03_el2
+	rw_sys_reg	amevcntvoff04_el2
+	rw_sys_reg	amevcntvoff05_el2
+	rw_sys_reg	amevcntvoff06_el2
+	rw_sys_reg	amevcntvoff07_el2
+	rw_sys_reg	amevcntvoff08_el2
+	rw_sys_reg	amevcntvoff09_el2
+	rw_sys_reg	amevcntvoff010_el2
+	rw_sys_reg	amevcntvoff011_el2
+	rw_sys_reg	amevcntvoff012_el2
+	rw_sys_reg	amevcntvoff013_el2
+	rw_sys_reg	amevcntvoff014_el2
+	rw_sys_reg	amevcntvoff015_el2
+	rw_sys_reg	amevcntvoff10_el2
+	rw_sys_reg	amevcntvoff11_el2
+	rw_sys_reg	amevcntvoff12_el2
+	rw_sys_reg	amevcntvoff13_el2
+	rw_sys_reg	amevcntvoff14_el2
+	rw_sys_reg	amevcntvoff15_el2
+	rw_sys_reg	amevcntvoff16_el2
+	rw_sys_reg	amevcntvoff17_el2
+	rw_sys_reg	amevcntvoff18_el2
+	rw_sys_reg	amevcntvoff19_el2
+	rw_sys_reg	amevcntvoff110_el2
+	rw_sys_reg	amevcntvoff111_el2
+	rw_sys_reg	amevcntvoff112_el2
+	rw_sys_reg	amevcntvoff113_el2
+	rw_sys_reg	amevcntvoff114_el2
+	rw_sys_reg	amevcntvoff115_el2
+	rw_sys_reg	cntpoff_el2
 
 	.arch	armv8.7-a
 
-	rwreg	pmsnevfr_el1
-	rwreg	hcrx_el2
+	rw_sys_reg	pmsnevfr_el1
+	rw_sys_reg	hcrx_el2
 
 	.arch	armv8-a+the
 
-	rwreg	rcwmask_el1
-	rwreg	rcwsmask_el1
+	rw_sys_reg	rcwmask_el1
+	rw_sys_reg	rcwsmask_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-test-utils.inc b/gas/testsuite/gas/aarch64/sysreg/sysreg-test-utils.inc
new file mode 100644
index 0000000..ac618db
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-test-utils.inc
@@ -0,0 +1,32 @@
+/** Test util to perform a READ and/or WRITE from/to a system register
+ *
+ * \param sysreg a system register.
+ * \param xreg   any general purpose register Xn (default=x0).
+ * \param r      boolean enabling or disabling the read test (default=1).
+ * \param w      boolean enabling or disabling the write test (default=1).
+ */
+.macro rw_sys_reg sys_reg xreg=x0 r=1 w=1
+.ifc \w, 1
+msr \sys_reg, \xreg
+.endif
+.ifc \r, 1
+mrs \xreg, \sys_reg
+.endif
+.endm
+
+/** 128-bits version of rw_sys_reg
+ *
+ * \param sysreg a system register.
+ * \param xreg1  first general-purpose destination register Xn (default=x0).
+ * \param xreg2  second general-purpose destination register Xn (default=x1).
+ * \param r      boolean enabling or disabling the read test (default=1).
+ * \param w      boolean enabling or disabling the write test (default=1).
+ */
+.macro rw_sys_reg_128 sys_reg xreg1=x0 xreg2=x1 r=1 w=1
+.ifc \w, 1
+msrr \sys_reg, \xreg1, \xreg2
+.endif
+.ifc \r, 1
+mrrs \xreg1, \xreg2, \sys_reg
+.endif
+.endm
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sysreg.d
index 6dfad54..54ade34 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.d
@@ -1,3 +1,5 @@
+#source: sysreg.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
@@ -5,9 +7,9 @@
 Disassembly of section \.text:
 
 0+ <.*>:
-.*:	d51b9c67 	msr	pmovsclr_el0, x7
+.*:	d51b9c60 	msr	pmovsclr_el0, x0
 .*:	d53b9c60 	mrs	x0, pmovsclr_el0
-.*:	d51b9e67 	msr	pmovsset_el0, x7
+.*:	d51b9e60 	msr	pmovsset_el0, x0
 .*:	d53b9e60 	mrs	x0, pmovsset_el0
 .*:	d5380140 	mrs	x0, id_dfr0_el1
 .*:	d5380100 	mrs	x0, id_pfr0_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.s b/gas/testsuite/gas/aarch64/sysreg/sysreg.s
index 998f315..9c0fd4a 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.s
@@ -1,38 +1,31 @@
+	.include "sysreg-test-utils.inc"
 
-	# Test case for system registers
 	.text
 
-	msr pmovsclr_el0, x7
-	mrs x0, pmovsclr_el0
-
-	msr pmovsset_el0, x7
-	mrs x0, pmovsset_el0
-
-	mrs x0, id_dfr0_el1
-	mrs x0, id_pfr0_el1
-	mrs x0, id_pfr1_el1
-	mrs x0, id_afr0_el1
-	mrs x0, id_mmfr0_el1
-	mrs x0, id_mmfr1_el1
-	mrs x0, id_mmfr2_el1
-	mrs x0, id_mmfr3_el1
-	mrs x0, id_mmfr4_el1
-	mrs x0, id_isar0_el1
-	mrs x0, id_isar1_el1
-	mrs x0, id_isar2_el1
-	mrs x0, id_isar3_el1
-	mrs x0, id_isar4_el1
-	mrs x0, id_isar5_el1
-
-	mrs x0, id_aa64isar2_el1
-	mrs x30, id_aa64isar2_el1
-
-	mrs x0, id_aa64isar3_el1
-	mrs x30, id_aa64isar3_el1
-
-	mrs x0, s3_0_c12_c15_0
-	msr s3_0_c4_c11_0, x0
-	mrs x0, s3_0_c4_c11_0
-
-	msr s2_1_c0_c3_0, x0
-	mrs x0, s2_1_c0_c3_0
+	rw_sys_reg sys_reg=pmovsclr_el0
+	rw_sys_reg sys_reg=pmovsset_el0
+
+	rw_sys_reg sys_reg=id_dfr0_el1 w=0
+	rw_sys_reg sys_reg=id_pfr0_el1 w=0
+	rw_sys_reg sys_reg=id_pfr1_el1 w=0
+	rw_sys_reg sys_reg=id_afr0_el1 w=0
+	rw_sys_reg sys_reg=id_mmfr0_el1 w=0
+	rw_sys_reg sys_reg=id_mmfr1_el1 w=0
+	rw_sys_reg sys_reg=id_mmfr2_el1 w=0
+	rw_sys_reg sys_reg=id_mmfr3_el1 w=0
+	rw_sys_reg sys_reg=id_mmfr4_el1 w=0
+	rw_sys_reg sys_reg=id_isar0_el1 w=0
+	rw_sys_reg sys_reg=id_isar1_el1 w=0
+	rw_sys_reg sys_reg=id_isar2_el1 w=0
+	rw_sys_reg sys_reg=id_isar3_el1 w=0
+	rw_sys_reg sys_reg=id_isar4_el1 w=0
+	rw_sys_reg sys_reg=id_isar5_el1 w=0
+
+	rw_sys_reg sys_reg=id_aa64isar2_el1 xreg=x0 w=0
+	rw_sys_reg sys_reg=id_aa64isar2_el1 xreg=x30 w=0
+	rw_sys_reg sys_reg=id_aa64isar3_el1 xreg=x0 w=0
+	rw_sys_reg sys_reg=id_aa64isar3_el1 xreg=x30 w=0
+
+	rw_sys_reg sys_reg=s3_0_c12_c15_0 w=0
+	rw_sys_reg sys_reg=s3_0_c4_c11_0
+	rw_sys_reg sys_reg=s2_1_c0_c3_0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.d b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
index 2998c7b..22df5e2 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
@@ -1,3 +1,5 @@
+#source: sysreg128.s
+#as: -I$srcdir/$subdir
 #objdump: -dr
 
 .*
@@ -6,23 +8,23 @@
 Disassembly of section \.text:
 
 0+ <\.text>:
-[^:]*:	d5587402 	msrr	par_el1, x2, x3
-[^:]*:	d5787402 	mrrs	x2, x3, par_el1
-[^:]*:	d558d0c2 	msrr	rcwmask_el1, x2, x3
-[^:]*:	d578d0c2 	mrrs	x2, x3, rcwmask_el1
-[^:]*:	d558d062 	msrr	rcwsmask_el1, x2, x3
-[^:]*:	d578d062 	mrrs	x2, x3, rcwsmask_el1
-[^:]*:	d5582002 	msrr	ttbr0_el1, x2, x3
-[^:]*:	d5782002 	mrrs	x2, x3, ttbr0_el1
-[^:]*:	d55d2002 	msrr	ttbr0_el12, x2, x3
-[^:]*:	d57d2002 	mrrs	x2, x3, ttbr0_el12
-[^:]*:	d55c2002 	msrr	ttbr0_el2, x2, x3
-[^:]*:	d57c2002 	mrrs	x2, x3, ttbr0_el2
-[^:]*:	d5582022 	msrr	ttbr1_el1, x2, x3
-[^:]*:	d5782022 	mrrs	x2, x3, ttbr1_el1
-[^:]*:	d55d2022 	msrr	ttbr1_el12, x2, x3
-[^:]*:	d57d2022 	mrrs	x2, x3, ttbr1_el12
-[^:]*:	d55c2022 	msrr	ttbr1_el2, x2, x3
-[^:]*:	d57c2022 	mrrs	x2, x3, ttbr1_el2
-[^:]*:	d55c2102 	msrr	vttbr_el2, x2, x3
-[^:]*:	d57c2102 	mrrs	x2, x3, vttbr_el2
\ No newline at end of file
+.*:	d5587402 	msrr	par_el1, x2, x3
+.*:	d5787402 	mrrs	x2, x3, par_el1
+.*:	d558d0c2 	msrr	rcwmask_el1, x2, x3
+.*:	d578d0c2 	mrrs	x2, x3, rcwmask_el1
+.*:	d558d062 	msrr	rcwsmask_el1, x2, x3
+.*:	d578d062 	mrrs	x2, x3, rcwsmask_el1
+.*:	d5582002 	msrr	ttbr0_el1, x2, x3
+.*:	d5782002 	mrrs	x2, x3, ttbr0_el1
+.*:	d55d2002 	msrr	ttbr0_el12, x2, x3
+.*:	d57d2002 	mrrs	x2, x3, ttbr0_el12
+.*:	d55c2002 	msrr	ttbr0_el2, x2, x3
+.*:	d57c2002 	mrrs	x2, x3, ttbr0_el2
+.*:	d5582022 	msrr	ttbr1_el1, x2, x3
+.*:	d5782022 	mrrs	x2, x3, ttbr1_el1
+.*:	d55d2022 	msrr	ttbr1_el12, x2, x3
+.*:	d57d2022 	mrrs	x2, x3, ttbr1_el12
+.*:	d55c2022 	msrr	ttbr1_el2, x2, x3
+.*:	d57c2022 	mrrs	x2, x3, ttbr1_el2
+.*:	d55c2102 	msrr	vttbr_el2, x2, x3
+.*:	d57c2102 	mrrs	x2, x3, vttbr_el2
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.s b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
index ee1d7cd..165dfa7 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
@@ -1,17 +1,14 @@
-	.arch armv9.4-a+d128+the
+	.include "sysreg-test-utils.inc"
 
-	.macro	rwreg128, name
-	msrr	\name, x2, x3
-	mrrs	x2, x3, \name
-	.endm
+	.arch armv9.4-a+d128+the
 
-	rwreg128	par_el1
-	rwreg128	rcwmask_el1
-	rwreg128	rcwsmask_el1
-	rwreg128	ttbr0_el1
-	rwreg128	ttbr0_el12
-	rwreg128	ttbr0_el2
-	rwreg128	ttbr1_el1
-	rwreg128	ttbr1_el12
-	rwreg128	ttbr1_el2
-	rwreg128	vttbr_el2
+	rw_sys_reg_128 par_el1 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 rcwmask_el1 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 rcwsmask_el1 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr0_el1 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr0_el12 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr0_el2 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr1_el1 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr1_el12 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 ttbr1_el2 xreg1=x2 xreg2=x3
+	rw_sys_reg_128 vttbr_el2 xreg1=x2 xreg2=x3